Thin Material Handling Carrier
20230253235 · 2023-08-10
Assignee
Inventors
- John W. Stayt, JR. (Schnecksville, PA, US)
- Thomas Barrie (Annandale, NJ, US)
- Raven Persaud (Old Bridge, NJ, US)
- Garrett Korpinen (Bethlehem, PA, US)
- Geoffrey Robert Hale (Darlington, GB)
Cpc classification
H01L21/6838
ELECTRICITY
H01L21/68728
ELECTRICITY
H01L21/67346
ELECTRICITY
H01L21/67294
ELECTRICITY
H01L23/544
ELECTRICITY
International classification
H01L21/687
ELECTRICITY
H01L23/544
ELECTRICITY
H01L21/673
ELECTRICITY
H01L21/67
ELECTRICITY
Abstract
A wafer carrier that exhibits a thin, low-profile includes a bottom support plate upon which a thinned semiconductor wafer may be positioned, with a holding ring disposed to surround the periphery of the wafer and engage with the bottom support plate to hold the wafer in a fixed position between the two components. The bottom support plate is formed to include a plurality of apertures for pulling a vacuum through the carrier, as well as features that engage with the holding ring and alignment fiducials for properly registering the orientation of the wafer's surface with respect to the wafer carrier and other testing equipment using the wafer carrier.
Claims
1. A wafer carrier comprising: a bottom support plate upon which a thinned wafer may be positioned, the bottom support plate having a flat top surface for maintaining contact with a facing surface of the thinned wafer, the bottom support plate including a plurality of apertures formed through the thickness thereof configured to access a vacuum force and maintain the thinned wafer in place during subsequent operations; and a holding ring disposed to surround the periphery of the thinned wafer and engage with the bottom support plate to hold the thinned wafer in a fixed position between the bottom support plate and the holding ring.
2. The wafer carrier as defined in claim 1, where the flat top surface of the bottom support plate exhibits a variation in thickness of ±5 μm or less.
3. The wafer carrier as defined in claim 1, where the plurality of apertures is disposed in a pattern of concentric circles across the flat top surface of the bottom support plate.
4. The wafer carrier as defined in claim 3, where individual apertures forming the plurality of apertures are positioned in a defined spacing between adjacent apertures on a defined circle of the plurality of concentric circles, with the spacing between adjacent circles further defined to coordinate with an arrangement of vacuum apertures included on equipment used for subsequent operations.
5. The wafer carrier as defined in claim 1, wherein the bottom support plate further comprises at least one alignment fiducial formed at a defined location at a peripheral edge location, the at least one alignment fiducial providing registration between the thinned wafer and the bottom support plate.
6. The wafer carrier as defined in claim 5, wherein the bottom support plate further comprises at least one alignment slot extending outward from the at least one alignment fiducial, the at least one alignment slot for providing positioning of the wafer carrier with respect to equipment used for subsequent operations.
7. The wafer carrier as defined in claim 1, wherein the bottom support plate further comprises at least one registration element formed on a bottom surface thereof, the at least one registration element providing alignment between the wafer carrier and the equipment used for subsequent operations such that vacuum apertures of the equipment align with the plurality of apertures of the bottom support plate, providing an effective vacuum force to secure the thinned wafer in place during subsequent operations.
8. The wafer carrier as defined in claim 1, wherein the bottom support plate is formed of a conductive material for facilitating selected testing of the thinned wafer.
9. The wafer carrier as defined in claim 1, wherein the bottom support plate is formed of an insulating material.
10. The wafer carrier as defined in claim 1, wherein the wafer carrier further comprises a releasable adhesive disposed on peripheral portions of the flat top surface of bottom support plate to facilitate fixation of the facing surface of the thinned wafer to the bottom support plate.
11. The wafer carrier as defined in claim 1, wherein the wafer carrier is configured to support thinned wafers having a thickness no greater than 100 μm.
12. The wafer carrier as defined in claim 1, wherein the holding ring is magnetized to releasably adhere to the bottom support plate, providing additional fixation between the bottom support plate and the holding ring, securing a placement of the thinned wafer therebetween.
13. The wafer carrier as defined in claim 1, wherein the holding ring is formed of a material that allows expansion/contraction of the thinned wafer in the direction of the wafer surface, accommodating release of thermal stresses associated with coefficient of thermal expansion (CTE) between different layers forming the thinned wafer.
Description
BRIEF DESCRIPTION OF THE DRAWINGS
[0017] Referring now to the drawings, where like numerals represent like parts in several views:
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DESCRIPTION OF THE INVENTION
[0027] The present invention relates to an improved wafer carrier structure that is specifically configured to handle relatively thin wafers (e.g., 90-100 μm or so), keeping the wafer flat during its handling during activities such as, testing, inspecting, shipping and the like. More generally, the present invention relates to a carrier structure that is useful for supporting and transporting any fragile material that is relatively thin (e.g., having a thickness of 100 μm or less). Thus, while the following discussion describes the use of the inventive carrier with a processed (and thinned) semiconductor wafer, and typically defines the inventive structure as a “wafer carrier”, the general scope of the invention is not so limited.
[0028] In an exemplary embodiment, an inventive wafer carrier is a thin, low-profile configuration of separable components, comprising a bottom support plate upon which a thinned semiconductor wafer is placed, with a holding ring positioned to surround the periphery of the wafer and engage with the bottom support plate to hold the wafer in a fixed position. The bottom support plate is formed to include a plurality of apertures for pulling a vacuum through the carrier, as well as features that engage with the holding ring. The holding ring is preferably formed of an ESD-safe material so as to not interfere with the properties of the wafer. Advantageously, the use of separate components to form the carrier allows for them to be dis-engaged from one another and thoroughly cleaned of accumulated debris between uses. The wafer carrier of the present invention may be utilized to flatten and hold a thin wafer as soon in the fabrication process as possible, where the wafer thereafter remains in the carrier until diced into separate components.
[0029]
[0030] Continuing with reference to
[0031] Also shown in
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[0034] In accordance with one or more embodiments of the present invention, bottom support plate 12 may be formed of a metal (such as aluminum or steel), or other electrically conductive material, and exhibits a surface with a flatness variation of only a few microns (e.g., ±5 μm or so). The use of a metal (conductive) material for bottom support plate 12 is advantageous for applications where an electrical testing contact to a metal layer on a bottom surface of the wafer is required. The presence of a conductive bottom support plate may also facilitate temperature-related testing. The use of a metal for bottom support plate 12 allows for the application of electrical test signals to wafer W, as well as for temperature cycling testing to be performed, by virtue of the efficient heat transfer properties of the metal. As mentioned above, temperature cycling during testing has been found in the prior art to lead to cleaving and subsequent breakage (from the thermal expansion stresses). In accordance with the properties of the carrier of the present invention, the wafer chuck's vacuum force may be turned off during thermal testing, without worry that the wafer will move, where the removal of the vacuum allows for the expansion/contraction of the wafer, as discussed above. Once the thermal testing is completed, the vacuum may easily be re-established via apertures 18 in bottom support plate 12.
[0035] For situations where there is no need to provide such a conductive member, bottom support plate 12 may be formed of an insulative material, such as a ceramic, or a hybrid of a metal and insulator to isolate the wafer from the wafer prober (testing device) for best noise performance. In yet another embodiment, a plating consisting of, for example, one or more layers of a nano-coating, a metal, ceramic or powder coating may be applied to bottom support plate 12 for electrical and thermal conductivity, as well as to prevent oxidation or rusting.
[0036]
[0037]
[0038] Holding ring 14 is preferably formed of an electro-static-discharge (ESD)-free material, such as polypropylene (for example) to prevent ESD damage to wafer W. Other suitable material choices are possible. Holding ring 14 is formed to be relatively thin, while still retaining a thickness sufficient to provide a clamping force (via tabs 16) on wafer W. While being sufficient to provide “fixation”, in one or more embodiments holding ring 14 may be configured to allow for wafer W to expand and/or contract (in the direction of the wafer surface) to release thermal mismatch expansion/contraction associated with the different materials forming wafer W. Indeed, the ability to control the “release” of the thermal stresses is an advantage of the carrier configuration of the present invention and functions to reduce cleavage and/or breaking of wafers during testing. In some embodiments (when used in conjunction with a metallic bottom support plate), holding ring 14 may be further configured to include one or magnets to provide an additional degree of fixation between bottom support plate 12 and holding ring 14. In general, the materials selected for bottom support plate 12 and holding ring 14 may be tailored to match the CTE of the chuck upon which the carrier will be mounted for testing.
[0039] There are known to be extremely fragile materials such as, for example, thinned semiconductor substrates of GaAs, InP, and GaN (as well as SiC substrates, graphene, carbon fiber, nano-materials, and intrinsically-conductive polymers) that require extra care when being positioned within a wafer carrier formed in accordance with the present invention. In particular, there are situations where it has been found advantageous to also utilize a type of releasable adhesive to position the fragile material on bottom support plate 12. Acceptable releasable adhesives include, for example, UV-releasable tape, adhesive tape, and adhesive spray. The tape may be disposed as individual segments around an area of bottom support plate, or may take the form of a ring.
[0040]
[0041] Clamp ring 70 is shown as further comprising a set of clamping pins 76 that are disposed around the inner periphery of clamp ring 70 and provide a spring-tension force against wafer W to hold it fixedly in place. In certain embodiments, clamping pins 76 may be designed to retract when a feature on clamp ring 70 is rotated. Alternatively, clamping pins 76 may be formed to slide in and out. These features of pins 76 are useful for configurations where the material of the wafer is too delicate for clamping. Indeed, the sliding pins can be used in conjunction with clamp ring 16 to establish the initial retention of wafer W within carrier 10.
[0042] It is to be understood that the wafer carrier of the present invention itself must also be relatively thin (i.e., exhibit a “low profile) so that it does not interfere with testing probes/needles that need to contact the top surface of the wafer as it is held in the carrier.
[0043] Additionally, the thin profile of the inventive wafer carrier allows for the storage of multiple carriers (each supporting a separate wafer) in a common wafer container.
[0044] Moreover, another advantage of the inventive wafer carrier is the ability to utilize an identification system to uniquely identify the carrier and, additionally uniquely identify a pairing of a specific wafer to a specific wafer carrier. For example, a unique ID number may be formed on carrier 10 (for example, on underside 17 of bottom support plate 12) and used for tracking and inventory purposes. A label, stamping, or laser-scribing technique may be used to form the identification.
[0045] Although the foregoing invention has been described in some detail for the purposes of clarity of understanding, it will be apparent that certain changes and modifications may be practiced within the scope of the appended claims. Accordingly, the present embodiments are to be considered as illustrative and not restrictive, and the invention is not limited to the details given herein, but may be modified within the scope and equivalents of the appended claims.