SENSOR CHIP FOR DETECTING LIGHT

Abstract

A sensor chip includes a plurality of microcells to which an xy position is assigned, composed of a photodiode D.sub.n,m, a current divider S.sub.q,nm, with outputs S.sub.q,v,nm, for the y direction and outputs S.sub.q,h,nm for the x direction, the outputs S.sub.q,h,nm being equipped with a quenching apparatus R.sub.q,h,nm for quenching the current, and the outputs S.sub.q,v,nm being equipped with a quenching apparatus R.sub.q,v,nm for quenching the current, which divides the generated photocurrent of the diodes Dn,m into two equally large fractions. The microcells are arranged in a sequence of N columns in the x direction x.sub.n,=x.sub.1, x.sub.2, x.sub.3, . . . x.sub.n with n=1, 2, 3, . . . N and M rows in the y direction y.sub.m,=y.sub.1, y.sub.2, y.sub.3, . . . y.sub.m with m=1, 2, 3, . . . M. Outputs S.sub.q,h,nm of the current dividers S.sub.q,nm for the x direction are connected to the read-out channels Ch.sub.A and Ch.sub.B for the x direction.

Claims

1: A sensor chip, comprising: a plurality of microcells to which an xy position is assigned, composed of a photodiode D.sub.n,m, a current divider S.sub.q,nm, with outputs S.sub.q,v,nm, for the y direction and outputs S.sub.q,h,nm for the x direction, the outputs S.sub.q,h,nm being equipped with a quenching apparatus R.sub.q,h,nm for quenching the current, and the outputs S.sub.q,v,nm being equipped with a quenching apparatus R.sub.q,v,nm for quenching the current, which divides the generated photocurrent of the diodes D.sub.n,m into two equally large fractions, wherein the microcells are arranged in a sequence of N columns in the x direction x.sub.n,=x.sub.1, x.sub.2, x.sub.3, . . . x.sub.n with n=1, 2, 3, . . . N and M rows in the y direction y.sub.m,=y.sub.1, y.sub.2, y.sub.3, . . . y.sub.m with m=1, 2, 3, . . . M, wherein the outputs S.sub.q,h,nm of the current dividers S.sub.q,nm for the x direction are connected to the read-out channels Ch.sub.A and Ch.sub.B for the x direction, current conductors of the same x position of the sensor chip being connected to the same signal bus N.sub.S,h,1, which leads into the read-out channel Ch.sub.A and Ch.sub.B in the x direction, and wherein a series connection of x-encoding resistors R.sub.h,0, R.sub.h,1, R.sub.h,2, . . . R.sub.h,N is located in the read-out channels Ch.sub.A and Ch.sub.B, the signal buses N.sub.S,h,i leading into nodal points K.sub.h,n with n=1, 2, 3, . . . N, which are located between the x-encoding resistors R.sub.h,0, R.sub.h,1, R.sub.h,2, . . . R.sub.h,N, thereby effecting linear encoding, the linear encoding being given when the following condition is satisfied:
Q.sub.1(ε)=c.sub.1.Math.ε.sup.c2+c.sub.3
Q.sub.2(ε)=c.sub.4.Math.ε.sup.c3+c.sub.6
c.sub.1=const.∈(0,∞)
c.sub.4=const.∈(−∞,0)
c.sub.3,c.sub.6=const.∈(−∞,∞)
0.5<c.sub.2,c.sub.5<1.5  (Formula 1)

2: The sensor chip according to claim 1, wherein the outputs of the current dividers S.sub.q,v,nm for the y direction are connected to output channels Ch.sub.C and Ch.sub.D for the y direction, which leads into the read-out channel Ch.sub.C and Ch.sub.D in the y direction, current conductors of the same y position of the sensor chip being connected to the same signal bus N.sub.S,v,1, which leads into the read-out channel Ch.sub.C and Ch.sub.D in the y direction, and a series connection of y-encoding resistors R.sub.v,0, R.sub.v,1, R.sub.v,2, . . . R.sub.v,M is located in the read-out channels Ch.sub.C and Ch.sub.D, the signal buses N.sub.S,v,1 leading into nodal points K.sub.v,m with m=1, 2, 3, . . . M, which are located between the y-encoding resistors R.sub.v,0, R.sub.v,1, R.sub.v,2, . . . R.sub.v,M, thereby effecting linear encoding
Q.sub.1(ε)=c.sub.1.Math.ε.sup.c2+c.sub.3
Q.sub.2(ε)=c.sub.4.Math.ε.sup.c3+c.sub.6
c.sub.1=const.∈(0,∞)
c.sub.4=const.∈(−∞,0)
c.sub.3,c.sub.6=const.∈(−∞,∞)
0.5<c.sub.2,c.sub.5<1.5  (Formula 1)

3: The sensor chip according to claim 1, wherein multiple photodiodes D.sub.n,m are combined with current dividers S.sub.q,nm and quenching apparatus R.sub.q,h,nm to form a microcell and lead into a signal bus N.sub.Shn for the x position.

4: The sensor chip according to claim 1, wherein multiple photodiodes D.sub.n,m are combined with current dividers S.sub.q,nm and quenching apparatus R.sub.q,v,nm to form a microcell and lead into a signal bus N.sub.Svm for the y position.

5: The sensor chip according to claim 1, wherein encoding resistance values of the x-encoding resistors R.sub.h,1, . . . R.sub.h,N-1 have the same value.

6: The sensor chip according to claim 1, wherein encoding resistance values for the y-encoding resistors R.sub.v,1, . . . R.sub.v,M-1 have the same value.

7: The sensor chip according to claim 1, wherein the encoding resistors for R.sub.h,n and for R.sub.v,m have an encoding resistance value between 0.001 ohm and 100 Mohm.

8: The sensor chip according to claim 1, wherein the number N of microcells in the x direction and the number M of microcells in the y direction are different.

9: The sensor chip according to claim 2, wherein encoding resistance values for encoding Ch.sub.A, Ch.sub.B and Ch.sub.C, Ch.sub.D are different.

10: The sensor chip according to claim 1, wherein the signal buses N.sub.S,h,1, N.sub.S,h,2 . . . N.sub.S,h,N and/or N.sub.S,v,1, N.sub.S,v,2 . . . N.sub.S,v,M are fed via summing resistors R.sub.S,h,n and/or R.sub.S,v,m in summing networks N.sub.S,h and/or N.sub.S,v, downstream of which an operational amplifier O.sub.h, O.sub.v is connected to output channels Ch.sub.E and/or Ch.sub.F.

11: The sensor chip according to claim 10, wherein the operational amplifiers O.sub.h, O.sub.v with the output channels Ch.sub.E and/or Ch.sub.F are arranged outside the sensor chip.

12: The sensor chip according to claim 10, wherein the summing networks N.sub.S,h, N.sub.S,v are arranged outside the sensor chip.

13: The sensor chip according to claim 10, wherein the summing resistors R.sub.S,h,n, R.sub.S,v,m are arranged outside the sensor chip.

14: The sensor chip according to any of claim 1, wherein at least 2 sensor chips in the x direction and/or in the y direction are connected via shared signal buses N.sub.S,h,1, N.sub.S,h,2 . . . N.sub.S,h,N and/or N.sub.S,v,1, N.sub.S,v,2 . . . N.sub.S,v,M, which lead into summing resistors R.sub.S,h,n, R.sub.S,v,m which in summing networks N.sub.S,h, N.sub.S,v.

15: The sensor chip according to claim 14, wherein the resistance values R.sub.s,h,0 and R.sub.s,h,N have the value R.sub.S,h,n/2 as well as the resistance values R.sub.s,v,0 and R.sub.s,v,M have the resistance value R.sub.S,v,m/2.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

[0024] Subject matter of the present disclosure will be described in even greater detail below based on the exemplary figures. All features described and/or illustrated herein can be used alone or combined in different combinations. The features and advantages of various embodiments will become apparent by reading the following detailed description with reference to the attached drawings, which illustrate the following:

[0025] FIG. 1 provides a representation in which individual microcells are connected via signal buses to the output channels with the linear encoding;

[0026] FIG. 2 illustrates an embodiment in which four SPADs are combined with associated quench resistors to form a microcell;

[0027] FIG. 3 illustrates a summing circuit consisting of summing networks and downstream summing amplifiers;

[0028] FIG. 4 illustrates an embodiment in which 4 sensor chips are connected over an entire row and column;

[0029] FIG. 5 illustrates a representation as in FIG. 1 with summing networks;

[0030] FIG. 6 illustrates a summing amplifier as an external circuit for summing networks integrated on the sensor chip; and

[0031] FIG. 7 illustrates a representation as in FIG. 4 with summing networks implemented on the sensor chip.

DETAILED DESCRIPTION

[0032] The present disclosure provides a sensor chip which overcomes the disadvantages of the prior art, with which the parallax errors during the determination of an LOR can be reduced. A sensor chip is to be provided which enables the use of scintillation single crystals for the detection of signals during positron emission tomography, wherein the DOI problem can be avoided by reducing the parallax error during the determination of the LOR.

[0033] The sensitivity and the resolution of the sensor chip are to be improved. Furthermore, the sensor chip is to be suitable to be operated together with an MRT, in particular with high magnetic fields and small magnet inside diameters. The accuracy of PET rings that are small-dimensioned, or in the case of PET rings that rest closely against the examination object, is to be improved. The space required by the electronics associated with the measuring system is to be reduced. The costs for the device are to be reduced. In its application, the sensor chip is not to be limited to the use in PET but should generally be usable for scintillation single crystals. Furthermore, the number of microcell positions to be encoded is to be increased. Encoding is to be made possible over a larger number of microcells than according to the prior art, wherein the limitation by resistance values achievable on the IC is to be reduced or eliminated. The area required by the resistors is to be reduced so that more space is available on the chip for microcells or SPADs. The present disclosure provides for simultaneously achieving both linear encoding of the microcell currents and quadratic encoding of the voltage drops generated by the microcell currents according to their xy position, wherein the encoding is to be achieved in particular across the boundaries of an individual sensor chip in order to achieve a successful determination of the position and depth of the detection position in the monolithic crystal of the scintillation detector, when monolithic crystals are used that are larger than a single sensor chip, and for this reason multiple sensor chips are required for registering the scintillation light. The sensor chip is to enable light detection, in particular in the IR, in the visual and UV range.

[0034] With the sensor chip, it is now possible to reduce parallax errors during the determination of the LORs, in particular in the case of scintillation single crystals. The sensitivity and the resolution of the measuring method and of the device are improved. The use of scintillation single crystals that are longer in the z direction is to be made possible.

[0035] The detector can be operated together with an MRT device. The parallax error is reduced, in particular in the case of devices with small dimensioning or when the PET ring rests closely against the examination object. Space for the associated electronics and costs are saved. The sensor chip according to the invention achieves a very high level of detail accuracy. The reason is that the number of scans of the light distribution function is significantly increased as a result since even scanning at the microcell level is possible. This increases the granularity that is available for determining the 2nd moment by a factor that, depending on the implementation methods described later, can be up to 160 or higher compared to conventional SiPMs, photomultipliers or avalanche diodes. This leads to a more precise determination of the 2nd order moment. Furthermore, the number of microcell positions to be encoded is increased. Encoding is made possible over a larger area of microcells than according to the prior art, wherein no limitation of resistor sizes exists or the limitation is reduced. The space that the resistors take up on the chip is reduced, which is why the available space for photodiodes is increased. Sensor chips with larger photosensitive surfaces (larger number of microcells) can be encoded. Linear encoding of the currents and quadratic encoding of the voltage drops are possible across multiple sensor chips. Light detection in the IR, visual and UV range is made possible.

[0036] According to the disclosure, linear encoding of currents is carried out in the case of a sensor chip in one read-out direction x or in two read-out directions x and y, wherein the linear encoding in the x and/or y directions takes place by a series connection of encoding resistors.

[0037] In this case, the linearly encoded signal for the x direction can be tapped at the outputs Ch.sub.A and Ch.sub.B, and for the y direction at the outputs Ch.sub.C and Ch.sub.D. This results in approximately linear, increasing or decreasing dependencies between the signals at the output and the xy position at which a signal injection by the microcells into the encoding network takes place.

[0038] The method can be carried out with all photosensors that contain location encoding, wherein the encoding should correspond to linear encoding to the extent possible.

[0039] In this case, the output signal of one channel or a combination of channels must change to ascend as linearly as possible with the x or y position, while the output signal of another channel or a combination of channels changes to descend as linearly as possible with the x or y position. Linear encoding is to be understood to mean any encoding that corresponds to Formula 1. Here, Q1 is the charge of the output channels ascending over the e position, and Q2 is the charge of the output channels descending over the e position. The variable e denotes the encoding direction, i.e., x or y; c.sub.1-6 denote constants.

Q.sub.1(ε)=c.sub.1.Math.ε.sup.c2+c.sub.3

Q.sub.2(ε)=c.sub.4.Math.ε.sup.c3+c.sub.6

c.sub.1=const.∈(0,∞)

c.sub.4=const.∈(−∞,0)

c.sub.3,c.sub.6=const. ∈(−∞,∞)

0.5<c.sub.2,c.sub.5<1.5  (Formula 1)

[0040] The parentheses for the expressions c.sub.1, c.sub.4, c.sub.3 and c.sub.6 in Formula 1 are open intervals in the mathematical sense.

[0041] Formula 1 takes into consideration that embodiments which do not satisfy the requirements with regard to exact linearity, i.e., produce only approximately linear encodings, may still be suitable for implementing the teachings described herein. Ideally, the linear encoding is exactly linear. In the case of exact linearity, c.sub.2=1 and c.sub.5=1.

[0042] Depending on the position of the microcell, the photocurrent is divided among the outputs and flows into positions within the series connections which have a number of encoding resistors R.sub.h corresponding to the position to be encoded in directions x, or R.sub.v in the y direction. Depending on this position, the photocurrents are distributed among the outputs Ch.sub.A, Ch.sub.B, Ch.sub.C and Ch.sub.D since, depending on the position, more or fewer resistors are located between the microcell position and the corresponding outputs, and the total resistance to the corresponding outputs thus varies with the position. In this case, only N+1 equally large resistors are required for N× positions, or only M+1 equally large resistors are required for M y positions.

[0043] In the following, terms relating to resistance are defined.

[0044] Resistance value is to be understood to mean the nominal value of the resistance in ohm. In the case of resistance materials with equal electrical conductivity, the resistance values are equally large at the same resistance geometry. In the case of resistance values with different electrical conductivities, the resistance values are differently large at the same resistance geometry. In the case of resistance materials with the same conductivity and different resistance geometries, the resistance values are also differently large.

[0045] The term “resistance” denotes the physical resistance as a bodily object having a functional designation, without the resistance value being nominally established thereby.

[0046] The sensor chip comprises a plurality of microcells, which are characterized in that a dedicated (x,y) position is assigned to each microcell. A microcell consists of at least one photodiode D.sub.n,m and a current divider S.sub.q,nm, with outputs S.sub.q,v,nm, for the y direction and outputs S.sub.q,h,nm for the x direction, with means for quenching, for example quench resistors R.sub.q,h,nm and R.sub.q,v,nm, which divides the generated photocurrent of the diodes into two equally large fractions. Alternatively, multiple photodiodes D.sub.n,m . . . D.sub.n+1,m+k can be combined with associated current dividers and quench resistors to form a microcell, where I and k are arbitrary numbers as needed. (FIG. 2)

[0047] In the abbreviations mentioned for the current dividers S and the quench resistors R.sub.q, the subscript h means that the corresponding signal buses lead to the output Ch.sub.A, Ch.sub.B, for the identification of the x position, and the subscript v means that the corresponding signal buses lead to the output Ch.sub.C, Ch.sub.D for the identification of the y position.

[0048] In particular single avalanche photodiodes (SPADs) can be used as photodiodes, wherein the quench resistors simultaneously assume the function of the current divider.

[0049] Instead of a quench resistor, the quenching process can also be initiated by active quenching, using the methods known to the person skilled in the art, or means for quenching, for example using a transistor and a comparator. In the following description, a quench resistor Rq or a current divider S implemented with the quench resistors R.sub.q,v,nm and R.sub.q,h,nm is disclosed in the disclosed embodiments. However, a different equivalent means for quenching, for example a transistor or comparator, can also be used in all embodiments so that the disclosure is not limited to the use of a quench resistor.

[0050] The microcells are arranged in a grid in which the microcells are arranged in rows in the x direction and in the y direction. The microcells are preferably arranged in rows or columns parallel to the x axis and the y axis. Typically, 10, 50, 100 or 1000 microcells are arranged in the x direction and the y direction, respectively. The arrangement then includes N columns in the x direction x.sub.n=x.sub.1, x.sub.2, x.sub.3, . . . x.sub.N, with n=1, 2, . . . N and M rows in the y direction y.sub.m=y.sub.1, y.sub.2, y.sub.3 . . . y.sub.M, with m=1, 2, . . . . M. Moreover, N and M are in each case also the number of microcells in the x and y directions. The directions x and y are preferably arranged orthogonally to each other, but they can also be arranged at an angle that deviates from 90° so that a rhombic pattern is produced.

[0051] This arrangement forms a block. A sensor chip can comprise a plurality of blocks, which are arranged in a grid. A block can be accommodated on the same substrate (or wafer, or chip), or on different ones.

[0052] The outputs of the current dividers S.sub.q,nm implemented with the quench resistors are connected via the connections C.sub.h,nm and C.sub.v,nm to signal buses N.sub.S,h,n for the x direction, and signal buses N.sub.s,v,m for the y direction. The signal buses N.sub.S,h,n lead into the nodal points K.sub.h,n (n=1, 2, 3 . . . N) and, via a series connection of encoding resistors R.sub.h,0, R.sub.h,1, . . . R.sub.h,N, are connected to the outputs Ch.sub.A, Ch.sub.B. The signal buses N.sub.S,v,m join at the nodal points K.sub.v,m (m=1, 2, 3 . . . . . M) and, via a series connection of encoding resistors R.sub.v,0, R.sub.v,1, . . . R.sub.v,NM, are connected to the outputs Ch.sub.C, Ch.sub.D.

[0053] In addition, an electrical connection of the signal buses N.sub.s,v,0, . . . N.sub.s,v,M and N.sub.s,h,0 . . . N.sub.s,h,N between different sensor chips and with external electronic or electrical circuits can be made possible via contacts of the sensor chip.

[0054] The first outputs of all current dividers in the same column n of the sensor chip are connected to the same signal bus N.sub.S,h,n of the sensor chip. Thus, all signals from one column of the sensor chip reach the same signal bus, which in addition leads at the nodal point K.sub.h,n into the series connection of encoding resistors R.sub.h,0, R.sub.h,1, . . . R.sub.h,N.

[0055] The second outputs of all current dividers in the same row h of the sensor chip are connected to the same signal bus N.sub.S,v,m of the sensor chip. Thus, all signals from one column of the sensor chip reach the same signal bus, which in addition leads at the nodal point K.sub.v,m into the series connection of encoding resistors R.sub.h,0, R.sub.h,1, . . . R.sub.v,M.

[0056] With the series connection of the encoding resistors R.sub.h,0, R.sub.h,1, . . . R.sub.h,N, the linear encoding of the currents in the horizontal read-out direction (i.e., the x direction) is ensured. With the series connection of the encoding resistors R.sub.v,0, R.sub.v,1, . . . R.sub.v,M, the linear encoding of the currents in the vertical read-out direction (i.e., the y direction) is ensured.

[0057] In order to effect linear encoding of the currents in the x direction, the encoding resistance values R.sub.h,1, . . . R.sub.h,N-1 must have the same value R.sub.h. In order to effect linear encoding of the currents in the y direction, the encoding resistance values R.sub.v,1, . . . R.sub.v,M-1 must have the same value R.sub.v.

[0058] If the numbers of pixels in the x direction and y direction are different, the encoding resistance values can differ for the x direction and the y direction.

[0059] The number of encoding resistors N for R.sub.h and M for R.sub.v per sensor chip is at least two and can take on values of 0.001 ohm to 100 Mohm. The number is in this case rather limited by practical circumstances.

[0060] The encoding resistance values for encoding Ch.sub.A and Ch.sub.B of the x direction and Ch.sub.C and Ch.sub.D corresponding to the y direction can be differently large. This can be advantageous, for example, if different numbers of microcells are present in the x and y directions so that the sensor chip or the microcells deviate from the square shape. In this case, the encoding resistance values encoding the larger number of pixels can be smaller than those along the other direction in which not as many pixel positions are to be encoded. In one embodiment, the sums of the encoding resistance values can be the same for the two directions x and y.

[0061] In order to enable multiple sensor chips to be connected among one another, the resistance values R.sub.h,0 and R.sub.h,N must have the same value R.sub.h/2. In order to enable multiple sensor chips to be connected among one another, the resistance values R.sub.v,0 and R.sub.v,M must have the same value R.sub.v/2. Once the connection is established, the two resistances R.sub.h/2 or R.sub.v/2 add up to form a resistance R.sub.h or R.sub.v.

[0062] Overall, only N+1 or M+1 encoding resistors are required for N or M x or y positions.

[0063] The X and Y mean value of the light distribution detected by the active sensor surface of the sensor chip can be calculated according to

<X>=(B−A)/(A+B)

<Y>=(C−D)/(C+D).

[0064] The total amount of light E is determined as

<E>=A+B+C+D.

[0065] A, B, C, D are the signals that can be tapped via the outputs Ch.sub.A, Ch.sub.B, Ch.sub.C, and Ch.sub.D. They are generally currents; they may be charges if the currents are integrated by corresponding electronic components over time intervals.

[0066] When using the sensor chip with a scintillator, <E> is proportional to the energy of the detected gamma photon. After calibration, <X> and <Y> provide the x and y positions of the photoconversion within the active sensor surface of the sensor chip.

[0067] In order to increase the active sensor surface of the sensor chip, the sensor chip can be increased.

[0068] Alternatively, identical chips produced in the same way can be combined without any problems. In this case, the output channels Ch.sub.A, Ch.sub.B, Ch.sub.C and Ch.sub.D of the various sensor chips are connected to one another in such a way that in each case only two channels have to be read out at the two ends of the chip per encoding direction. (FIG. 4) This makes it possible to encode over even larger surfaces since the surface to be encoded is no longer limited by the encoding resistor sizes.

[0069] For each pixel column x and/or pixel row y of the two embodiments, the potentials are tapped at the signal buses N.sub.S,h,1, N.sub.S,h,2 . . . N.sub.S,h,N or N.sub.S,v,1, N.sub.S,v,2 . . . N.sub.S,v,M via the summing resistors R.sub.S,h,n or R.sub.S,v,m and fed into a summing network N.sub.S,h or N.sub.S,v including a downstream summing amplifier O.sub.h or O.sub.v with the output channels Ch.sub.E and Ch.sub.F. An embodiment is possible in which the signal buses N.sub.S,h,1, N.sub.S,h,2, . . . N.sub.S,h,N for the x direction and/or the signal buses N.sub.S,v,1, N.sub.S,v,2, . . . N.sub.S,v,M for the y direction are connected to an external summing circuit consisting of summing networks N.sub.S,h and N.sub.S,v, downstream summing amplifiers O.sub.h and O.sub.v with the output channels Ch.sub.E and Ch.sub.F. The resistance values for the summing resistors R.sub.S,h,n or R.sub.S,v,m are in each case equally large in a summing network N.sub.S,h or N.sub.S,v. The summing resistance values can be between 1Ω and 100 MΩ. The summing resistors R.sub.S,h,n or R.sub.S,v,m must be large enough that the generated photocurrent is not substantially influenced by the microcells but small enough not to influence the quench behavior of the microcells. The summing resistors R.sub.S,h,n or R.sub.S,v,m are combined via the signal buses of the summing networks N.sub.S,h or N.sub.S,v. The signals are thus summed up. The summing amplifiers O.sub.h and/or O.sub.v can include an operational amplifier OP.sub.h or OP.sub.v, which is grounded and has negative feedback with a resistor R.sub.S,h or R.sub.S,v. The amplification of the signal of the output channels Ch.sub.E and Ch.sub.F can be set via the ratio of R.sub.S,h/R.sub.S,h,n or R.sub.S,v/R.sub.S,v,m. The summing circuit consisting of summing networks N.sub.S,h and N.sub.S,v of downstream summing amplifiers O.sub.h and O.sub.v can be integrated into the sensor chip, or parts thereof can in each case be, less preferably, situated outside of the sensor chip. In particular, the resistors R.sub.S,h,1, . . . , R.sub.S,h,n and R.sub.S,v,1, . . . , R.sub.S,v,m can be integrated onto the sensor chip so that only the summing networks N.sub.S,h and N.sub.S,v must be led out of the relevant sensor chip as signal buses and can be connected to external summing amplifiers O.sub.h and/or O.sub.v. If the entire summing circuit consisting of summing networks N.sub.S,h and N.sub.S,v of downstream summing amplifiers O.sub.h and O.sub.v is located outside the sensor chip, this results in all networks N.sub.S,h,n and/or N.sub.S,v,m being led out of the sensor chip as signal buses, which results in a very high number of output channels. If the summing resistors R.sub.S,h,n and/or R.sub.S,v,m are integrated into the sensor chip, only the summing networks N.sub.S,h and/or N.sub.S,v need to be led out of the sensor chip, which can be implemented with one output channel per network in each case. In order to enable the interconnection of multiple sensor chips, it is therefore preferable not to integrate the complete summing circuit consisting of summing networks N.sub.S,h and N.sub.S,v of downstream summing amplifiers O.sub.h and O.sub.v into the sensor chip and to lead the signal buses N.sub.S,h,1, N.sub.S,h,2, . . . , N.sub.S,h,N and N.sub.S,v,1, N.sub.S,v,2, . . . , N.sub.S,v,M out of the sensor chip but to only integrate the resistors R.sub.S,h,1, . . . , R.sub.S,h,n and R.sub.S,v,1, . . . , R.sub.S,v,m onto the sensor chip and to only lead the summing networks N.sub.S,h and N.sub.S,v out of the relevant sensor chip.

[0070] The potentials Φ(N.sub.S,h,n) or Φ(N.sub.S,v,m) at the signal buses N.sub.S,h,n and N.sub.S,v,m should each have, as precisely as possible, a quadratic dependence of the position of the photocurrents of the microcells in the x and y directions. This is required in order to obtain the 2nd order moment of the signal distribution along the x direction and along the y direction. This is approximately ensured when the resistance values of the summing resistors R.sub.S,h,1 . . . , R.sub.S,h,n and R.sub.S,v,1, . . . , R.sub.S,v,m are significantly greater (>factor 10) than the resistance values of the resistors R.sub.h,0, R.sub.h,1, . . . R.sub.h,N and R.sub.v,0, R.sub.v,1, . . . R.sub.v,M. In this case, the current flowing across the resistors R.sub.S,h,1, . . . , R.sub.S,h,N and R.sub.S,v,1, . . . , R.sub.S,v,M is negligible compared to the current flowing across the series connections R.sub.h,0, R.sub.h,1, . . . , R.sub.h,N and R.sub.v,0, R.sub.v,1, . . . R.sub.v,M. The outputs Ch.sub.A, Ch.sub.B, Ch.sub.C, and Ch.sub.D are preferably connected to the inputs of external amplifiers (not integrated on the chip) with very low input impedance, which is why the potential of the outputs Ch.sub.A, Ch.sub.B, Ch.sub.C, and Ch.sub.D relative to the nodal points K.sub.h,1, . . . , K.sub.h,N and K.sub.v,1, . . . , K.sub.v,M is 0, i.e., connected to ground. The total resistance which the current on the signal bus N.sub.S,h,i sees at the i-th position along the x direction is then:

[00001]$R_{K_{h,i}}=\frac{\left({.Math.}_{l=0}^{l=i}{R}_{h,l}\right)\left({.Math.}_{l=i+1}^{l=N}{R}_{h,l}\right)}{{.Math.}_{l=0}^{l=N}{R}_{h,l}}=\frac{\left(i+\frac{1}{2}\right)\left(N-i+\frac{1}{2}\right)R_h^2}{N.Math.R_h}$

[0071] It depends quadratically on the position i. Due to Ohm's law U=R*I, the potentials at the nodal points K.sub.h,i which result from the product of R.sub.K.sub.h,i and the current coming from the microcells connected to the signal bus N.sub.S,h,i are then also quadratically encoded in the position. As described in [5], the series connection R.sub.h,0, R.sub.h,1, . . . R.sub.h,N forms a voltage divider for the current injected into the nodal points K.sub.h,i, which leads to additional added voltage contributions, which ultimately, however, only as a proportionality factor N/2 independent of i. Equivalent observations apply to N.sub.S,v,1 at the i-th position along the y direction. When using the resistance values R.sub.h,0=R.sub.h,N=R.sub.h/2 and R.sub.v,0=R.sub.v,M=R.sub.v/2 and R.sub.h,i, . . . , R.sub.h,N-1=R.sub.h and R.sub.v,i, . . . , R.sub.v,M-1=R.sub.v, a total quadratic resistance value arises automatically at the nodal points K.sub.h,1, . . . , K.sub.h,N and K.sub.v,1, . . . , K.sub.v,M and thus the required quadratic potential distribution in the signal buses N.sub.S,v,m and/or N.sub.S,h,n. The resulting signals at the outputs Ch.sub.E, Ch.sub.F of the summing networks O.sub.h and O.sub.v are proportional to the width of the light distribution striking the sensor chip. The width of the light distribution strongly correlates to the depth of interaction of the gamma photon and therefore allows the determination of the circuits in FIGS. 1-7 after calibration thereof. At the same time, the linear encoding for the photocurrent is given, which allows a determination of the interaction position in the xy plane via the outputs Ch.sub.A, Ch.sub.B, Ch.sub.C and Ch.sub.D. The potentials Φ(N.sub.S,h,n) or Φ(N.sub.S,v,m) at the signal buses N.sub.S,h,n and N.sub.S,v,m can also deviate from an exact quadratic encoding due to corresponding additional resistances or due to modified encoding resistors. Here, (Φ.sup.2n).sup.k with n=1, 2, 3 . . . and 0.5<k<1.5 must apply to the resulting potential encoding.

[0072] The implementation of the described linear and quadratic encoding with the aid of the series connection R.sub.h,0, R.sub.h,1, . . . R.sub.h,N and R.sub.v,0, R.sub.v,1, . . . R.sub.v,M, of the lead-out of the signal buses N.sub.S,h,1, N.sub.S,h,2 . . . N.sub.S,h,N and N.sub.S,v,1, N.sub.S,v,2 . . . N.sub.S,v,M or of the integration of the summing resistors R.sub.S,h,1, . . . , R.sub.S,h,N and R.sub.S,v,1, . . . , R.sub.S,v,M on the sensor chip and of the lead-out of the signal buses N.sub.S,h and N.sub.S,v, and the use of external summing networks O.sub.h and O.sub.v or external operational amplifiers with feedback resistors R.sub.S,h and R.sub.S,v (FIG. 6) allow multiple sensor chips according to FIGS. 3 and 7 to be interconnected while maintaining the information about the depth of interaction and the interaction position along the xy plane.

[0073] The potentials Φ(N.sub.S,h,n) or Φ(N.sub.S,v,m) at the networks N.sub.S,h,n and N.sub.S,v,m can also deviate from an exact quadratic encoding due to corresponding additional resistors or due to modified encoding resistors. Here, (Φ.sup.2n).sup.k with n=1, 2, 3 . . . and 0.5<k<1.5 must apply to the resulting potential encoding.

[0074] FIG. 1 shows microcells comprising photodiodes D.sub.nm, which lead into a current divider S.sub.q,nm, which is implemented with the quench resistors R.sub.q,h,nm, R.sub.q,v,nm. The outputs of the current dividers R.sub.q,h,nm lead into signal buses N.sub.S,h,n, which lead into the nodal points K.sub.h,n and, via the series connection R.sub.h,0, R.sub.h,1, . . . R.sub.h,N, into the output channels Ch.sub.A and Ch.sub.B. The outputs of the current dividers R.sub.q,v,nm lead into signal buses N.sub.S,v,m, which lead into the nodal points K.sub.v,m and, via the series connection R.sub.v,0, R.sub.v,1, . . . R.sub.v,M, into the output channels Ch.sub.C and Ch.sub.D. A series connection including the resistors R.sub.h,0-R.sub.h,N R.sub.v,0-R.sub.v,M is present in the outputs Ch.sub.A and Ch.sub.B or Ch.sub.C and Ch.sub.D.

[0075] In FIG. 2, four SPADs with associated quench resistors are assembled to form a microcell. In this figure, the same elements of the microcell have the same designations as in FIG. 1. Within this sensor, all outputs of the current dividers with the encoding resistors R.sub.h,nm lead into a point C.sub.h,11 which is connected to the input of a signal bus N.sub.S,h,n, which is not shown. Within this sensor, all outputs of the current dividers with the resistors R.sub.v,nm lead into a point C.sub.v,11 which is connected to the input of a signal bus N.sub.S,v,M, which is not shown.

[0076] FIG. 3 shows summing circuits in which the summing networks N.sub.S,v and N.sub.S,h, which are connected to operational amplifiers OP.sub.v or OP.sub.h, are connected at their non-inverting input to ground. Negative feedback by means of the resistors R.sub.S,h or R.sub.S,v is achieved via the output channel Ch.sub.E or Ch.sub.F.

[0077] FIG. 4 shows four sensor chips M.sub.1, M.sub.2, M.sub.3, M.sub.4 connected via Ch.sub.1A, Ch.sub.1B, Ch.sub.2A and Ch.sub.2B or Ch.sub.3A, Ch.sub.3B, Ch.sub.4A and Ch.sub.4,B as well as the output channels Ch.sub.3D, Ch.sub.3C, Ch.sub.1D and Ch.sub.1C or Ch.sub.4D, Ch.sub.4C, Ch.sub.2D and Ch.sub.2C.

[0078] Analogously, the summing networks N.sub.S1,v,1-N.sub.S2,v,1, N.sub.S1,v,2-N.sub.S2,v,2, N.sub.S1,v,M-N.sub.S2,v,M as well as N.sub.S3,v,1-N.sub.S4,v,1, N.sub.S3,v,2-N.sub.S4,v,2, N.sub.S3,v,M-N.sub.S4,v,M and N.sub.S3,h,1-N.sub.S1,h,1, N.sub.S3,h,2-N.sub.S1,h,2, N.sub.S3,h,N-N.sub.S1,h,N as well as N.sub.S4,h,1-N.sub.S2,h,1, N.sub.S4,h,2-N.sub.S2,h,2, N.sub.S4,h,N-N.sub.S2,h,N are connected via the sensor chips M.sub.1, M.sub.2, M.sub.3, M.sub.4.

[0079] FIG. 5 shows microcells with photodiodes D.sub.nm, which lead into a current divider S.sub.q,nm, which is implemented with the quench resistors R.sub.q,h,nm, R.sub.q,v,nm. The outputs of the current dividers R.sub.q,h,nm lead into signal buses N.sub.S,h,n, which lead into the nodal points K.sub.h,n and, via the series connection R.sub.h,0, R.sub.h,1, . . . R.sub.h,N, into the output channels Ch.sub.A and Ch.sub.B. The outputs of the current dividers R.sub.q,v,nm lead into signal buses N.sub.S,v,m, which lead into the nodal points K.sub.v,m and, via the series connection R.sub.v,0, R.sub.v,1, . . . R.sub.v,M, into the output channels Ch.sub.C and Ch.sub.D. The resistors R.sub.h,0-R.sub.h,N or R.sub.v,0-R.sub.v,M form a series connection whose ends are the outputs Ch.sub.A and Ch.sub.B or Ch.sub.C and Ch.sub.D. The resistors R.sub.S,h,1, . . . , R.sub.S,h,n and R.sub.S,v,1, . . . , R.sub.S,v,m are integrated onto the sensor chip, and only the summing networks N.sub.S,h and N.sub.S,v are led out of the sensor chip.

[0080] In FIG. 6, summing networks N.sub.S,v and N.sub.S,h lead into the operational amplifiers OP.sub.v and OP.sub.h, which are grounded and lead into the output channels Ch.sub.F and Ch.sub.E. The operational amplifiers are negatively fed back via the resistors R.sub.S,v and R.sub.S,h.

[0081] FIG. 7 shows four sensor chips M.sub.1, M.sub.2, M.sub.3, M.sub.4 via which the output channels Ch.sub.1A, Ch.sub.1B, Ch.sub.2A and Ch.sub.2B or Ch.sub.3A, Ch.sub.3B, Ch.sub.4A and Ch.sub.4,B and the output channels Ch.sub.3D, Ch.sub.3C, Ch.sub.1D and Chic or Ch.sub.4D, Ch.sub.4C, Ch.sub.2D and Ch.sub.2C are connected.

[0082] Analogously, the summing networks N.sub.S1,v-N.sub.S4,v and N.sub.S1,h-N.sub.S4,h are connected via the sensor chips M.sub.1, M.sub.2, M.sub.3, M.sub.4.

[0083] While subject matter of the present disclosure has been illustrated and described in detail in the drawings and foregoing description, such illustration and description are to be considered illustrative or exemplary and not restrictive. Any statement made herein characterizing the invention is also to be considered illustrative or exemplary and not restrictive as the invention is defined by the claims. It will be understood that changes and modifications may be made, by those of ordinary skill in the art, within the scope of the following claims, which may include any combination of features from different embodiments described above.

[0084] The terms used in the claims should be construed to have the broadest reasonable interpretation consistent with the foregoing description. For example, the use of the article “a” or “the” in introducing an element should not be interpreted as being exclusive of a plurality of elements. Likewise, the recitation of “or” should be interpreted as being inclusive, such that the recitation of “A or B” is not exclusive of “A and B,” unless it is clear from the context or the foregoing description that only one of A and B is intended. Further, the recitation of “at least one of A, B and C” should be interpreted as one or more of a group of elements consisting of A, B and C, and should not be interpreted as requiring at least one of each of the listed elements A, B and C, regardless of whether A, B and C are related as categories or otherwise. Moreover, the recitation of “A, B and/or C” or “at least one of A, B or C” should be interpreted as including any singular entity from the listed elements, e.g., A, any subset from the listed elements, e.g., A and B, or the entire list of elements A, B and C.

CITED PRIOR ART

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