Radiation Emitting Semiconductor Chip and Radiation Emitting Semiconductor Device

Abstract

In an embodiment a radiation emitting semiconductor chip includes a semiconductor layer sequence with a plurality of active regions and a main extension plane, wherein each active region has a main extension direction, wherein each active region is configured to emit electromagnetic radiation from an emitter region extending parallel to the main extension plane, wherein at least two active regions overlap in plan view, wherein the emitter regions are arranged at grid points of a regular grid connected by at least one grid line, and wherein the main extension direction of at least one active region encloses an angle of at least 10° and at most 80° with the grid lines of the regular grid.

Claims

1.-19. (canceled)

20. A radiation emitting semiconductor chip comprising: a semiconductor layer sequence with a plurality of active regions and a main extension plane, wherein each active region has a main extension direction, wherein each active region is configured to emit electromagnetic radiation from an emitter region extending parallel to the main extension plane, wherein at least two active regions overlap in plan view, wherein the emitter regions are arranged at grid points of a regular grid connected by at least one grid line, and wherein the main extension direction of at least one active region encloses an angle of at least 10° and at most 80° with the grid lines of the regular grid.

21. The radiation emitting semiconductor chip according to claim 20, wherein the emitter regions are arranged along columns and rows.

22. The radiation emitting semiconductor chip according to claim 21, wherein the main extension directions of the active regions in at least one row enclose equal angles with the grid lines of the regular grid.

23. The radiation emitting semiconductor chip according to claim 21, wherein the main extension directions of the active regions of different rows include different angles with the grid lines of the regular grid.

24. The radiation emitting semiconductor chip according to claim 21, wherein the main extension directions of the active regions in at least one row enclose different angles with the grid lines of the regular grid.

25. The radiation emitting semiconductor chip according to claim 20, wherein a first reflective surface is arranged in a first edge region of each active region, the first reflective surface enclosing an angle of at least 35° and at most 55° with the main extension plane.

26. The radiation emitting semiconductor chip according to claim 25, wherein the first edge regions of at least two directly adjacent emitter regions in a row overlap in plan view.

27. The radiation emitting semiconductor chip according to claim 25, wherein a second reflective surface is arranged in a second edge region of each active region opposite the first edge region.

28. The radiation emitting semiconductor chip according to claim 27, wherein the second reflective surface encloses an angle of at least 35° and at most 55° with the main extension plane.

29. The radiation emitting semiconductor chip according to claim 27, wherein the second reflective surfaces are each perpendicular to the main extension plane.

30. The radiation emitting semiconductor chip according to claim 20, wherein each active region comprises an anti-reflective coating arranged on the semiconductor layer sequence in a first edge region, and wherein each active region has a reflective coating arranged on the semiconductor layer sequence in a second edge region.

31. The radiation emitting semiconductor chip according to claim 20, wherein each active region comprises a first contact layer arranged on a top surface of the semiconductor layer sequence, wherein each active region comprises a second contact layer arranged on a bottom surface of the semiconductor layer sequence, and wherein the first contact layers and the second contact layers predetermine lateral dimensions of an active zone of each active region.

32. The radiation emitting semiconductor chip according to claim 20, wherein the radiation emitting semiconductor chip is a superluminescent light emitting diode having an increased brightness and/or an increased luminous flux compared to a conventional light emitting diode.

33. The radiation emitting semiconductor chip according to claim 20, wherein the radiation emitting semiconductor chip is a laser diode.

34. The radiation emitting semiconductor chip according to claim 32, wherein the active regions are arranged as an array.

35. A radiation emitting semiconductor device comprising: a first radiation emitting semiconductor chip according to claim 20; and at least one second radiation emitting semiconductor chip according to claim 20, wherein the first radiation emitting semiconductor chip is configured to emit electromagnetic radiation of a first wavelength range, and wherein the second semiconductor radiation emitting chip is configured to emit electromagnetic radiation of a second wavelength range.

36. The radiation emitting semiconductor device according to claim 35, wherein the first radiation emitting semiconductor chip and the second radiation emitting semiconductor chip are arranged side by side.

37. The radiation emitting semiconductor device according to claim 35, further comprising a plurality of second radiation emitting semiconductor chips, wherein the second radiation emitting semiconductor chips are arranged on the first radiation emitting semiconductor chip.

38. A radiation emitting semiconductor chip comprising: a semiconductor layer sequence with a plurality of active regions and a main extension plane, wherein each active region has a main extension direction, wherein each active region is configured to emit electromagnetic radiation from an emitter region extending parallel to the main extension plane, wherein the emitter regions are arranged at grid points of a regular grid connected by at least one grid line, wherein the main extension direction of at least one active region encloses an angle of at least 10° and at most 80° with the grid lines of the regular grid, wherein a first reflective surface is arranged in a first edge region of each active region, wherein the first reflective surface encloses an angle of at least 35° and at most 55° with the main extension plane, wherein a second reflective surface is arranged in a second edge region of each active region opposite the first edge region, and wherein the second reflective surface encloses an angle of at least 35° and at most 55° with the main extension plane.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

[0091] Hereinafter, the radiation emitting semiconductor chip and the radiation emitting semiconductor device is explained in more detail with reference to the Figures with reference to exemplary embodiments.

[0092] FIG. 1 a schematic representation in plan view of a radiation emitting semiconductor chip according to an exemplary embodiment;

[0093] FIG. 2 a schematic representation in plan view of a radiation emitting semiconductor chip according to an exemplary embodiment;

[0094] FIG. 3 a schematic sectional view of a radiation emitting semiconductor chip according to an exemplary embodiment;

[0095] FIG. 4 a schematic sectional view of a radiation emitting semiconductor chip according to an exemplary embodiment;

[0096] FIG. 5 exemplary measurements of the far field of electromagnetic radiation of a radiation emitting semiconductor chip according to an exemplary embodiment; and

[0097] FIG. 6 exemplary top view infrared microscope image of an emitter region of an IR radiation emitting semiconductor chip.

DETAILED DESCRIPTION OF ILLUSTRATIVE EMBODIMENTS

[0098] Elements that are identical, similar or similar acting are given the same reference signs in the Figures. The Figures and the proportions of the elements shown in the Figures are not to be regarded as true to scale. Rather, individual elements can be shown exaggeratedly large for better representability and/or for better comprehensibility.

[0099] The schematic diagram of FIG. 1 shows an exemplary embodiment of a radiation emitting semiconductor chip 1 described herein, which comprises a semiconductor layer sequence 2 with a plurality of active regions 3 and a main extension plane 1.

[0100] The active regions 3 are spaced apart from one another in lateral direction and are not in direct contact with one another at any point. Each active region 3 has a main extension direction 5, each extending along a length of an active region 3.

[0101] The width in lateral direction of the active regions 3 in this exemplary embodiment is for example 5 micrometres. The length of the active regions 3 in the lateral direction is here, for example, 100 micrometres.

[0102] During operation, each active region 3 emits electromagnetic radiation from an emitter region 6 extending parallel to the main extension plane 4. The emitter regions 6 are each arranged along a main extension direction 5 in a first edge region 12 of an active region 3. A second edge region 14 is arranged opposite the first edge regions 12 in each case. The first edge regions 12 are marked with a white circle in FIG. 1, while the second edge regions 14 are marked with a black circle in FIG. 1.

[0103] The emitter regions 6 are arranged at grid points 7 of a regular grid, which are connected by at least one grid line 8. According to this exemplary embodiment, the regular grid is an orthogonal, two-dimensional grid. The regular grid here has first grid lines 8a and second grid lines 8b. The first grid lines 8a are orthogonal to the second grid lines 8b.

[0104] The main extension directions 5 of the active regions 3 here each have a first angle 11a of approximately 65° with the first grid lines 8a. According to this exemplary embodiment, the main extension directions 5 of the active regions 3 each enclose a second angle 11b of approximately 25° with the second grid lines 8b. The first angle 8a and the second angle 8b thus add up to approximately 90°.

[0105] The emitter regions 6 are thus arranged along columns 9 and rows 10. The rows 10 extend along the first grid lines 8a. The columns 9 extend along the second grid lines 8b.

[0106] The main extension directions 5 of the active regions 3 of each row 10 include the same first angles 11a with the first grid lines 8a of the regular grid. Thus, the main extension directions 5 of the active regions 3 in each column 9 also enclose equal second angles 11b with the second grid lines 8b of the regular grid. That is to say that all the main extension directions 5 of the active regions 3 are parallel to one another.

[0107] In a side view along the rows 10, the active regions 3 of a row 10 are formed completely overlapping. Furthermore, the active regions 3 of directly adjacent rows 10 partially overlap in a side view along the rows 10. Furthermore, the active regions 3 of a column 9 are completely overlapping in a side view along the columns 9. The active regions 3 of directly adjacent columns 9 do not overlap in a side view along the columns 9.

[0108] The second edge regions 14 are arranged at further grid points of a further regular grid. The further regular grid is displaced relative to the regular grid by a translation vector. That is to say that without a translation vector, the regular grid and the further regular grid are congruent.

[0109] According to FIG. 2, an embodiment of a radiation emitting semiconductor chip 1 described here is shown, in which active regions 3 overlap with one another in plan view. Here, directly adjacent active regions 3 of a common row 10 overlap with an active region 3 of a directly adjacent column 9. The regions overlapping in plan view each form a common active region.

[0110] Furthermore, two first regions 12 of each of two directly adjacent emitter regions 6 in a row 10 overlap in plan view. Here, the two directly adjacent emitter regions 6 completely overlap with one another and form a common emitter region.

[0111] The common emitter regions are arranged at grid points 7 of a regular grid, which are connected by at least one grid line 8. Here, the regular grid is an orthogonal grid, analogous to the exemplary embodiment according to FIG. 1.

[0112] In contrast to the exemplary embodiment of FIG. 1, the second edge regions 14 are arranged at further grid points of a further regular grid which cannot be aligned congruently with the regular grid.

[0113] Alternatively, according to FIG. 2, a radiation emitting device comprising a first radiation emitting semiconductor chip and a second radiation emitting semiconductor chip can be described. The second radiation emitting semiconductor chips are arranged on the first radiation emitting semiconductor chip, for example. The first radiation emitting semiconductor chip is arranged downstream of the second radiation emitting semiconductor chip in this case. The emitter regions of the first radiation emitting semiconductor chip and the emitter regions of the second radiation emitting semiconductor chip overlap here in plan view.

[0114] In the schematic sectional view of FIG. 3, an exemplary embodiment of an active region 3 is shown along a main extension direction of a radiation emitting semiconductor chip 1 described herein, which has a semiconductor layer sequence 2 comprising the active region 3.

[0115] A first reflective surface 13 is arranged in a first edge region 12, wherein an angle between the first reflective surface 13 and the main extension plane is approximately 45°. Furthermore, an anti-reflective coating 16 is arranged on the top surface of the semiconducting layer sequence 2 in the first edge region 12.

[0116] A second reflective surface 15 is arranged in a second edge region 14, wherein an angle between the second reflective surface 15 and the main extension plane is approximately 45°. Furthermore, a reflective coating 17 is arranged on the top surface of the semiconducting layer sequence 2 in the second edge region 14.

[0117] Between the anti-reflective coating 16 and the reflective coating 17, a second contact layer 19 is arranged on the top surface of the semiconductor layer sequence 2 along the main extension direction 5. A first contact layer 18 is arranged on the opposite bottom surface of the semiconductor layer sequence 2 along the main extension direction 5. The first contact layer 18 and the second contact layer 19 predetermine the lateral dimension of an active zone 20 of the active region 3.

[0118] According to the arrows shown in FIG. 3, directions of propagation of electromagnetic radiation are depicted. The electromagnetic radiation generated in the active zone 20 forms in each case a beam with a beam profile which, in cross-section perpendicular to a main extension direction 5 of the active region 3, has a lateral and a vertical extension. Electromagnetic radiation propagating in the direction of the second reflective surface 15 is directed towards the first reflective surface 13 by means of the reflective coating 17 and further reflection at the second reflective surface 15. Emitted electromagnetic radiation propagating in the direction of the first reflective surface 13 is superimposed on the radiation reflected at the second reflective surface 15. The electromagnetic radiation of the active zone 20 superimposed in this way is superimposed in the area of the anti-reflective coating 16 and is coupled out. The coupled out radiation is thus amplified and has an increased brightness and an increased luminous flux.

[0119] In contrast to the exemplary embodiment in connection with FIG. 3, the active region 3 according to FIG. 4 does not have a reflective coating 17. Furthermore, a second reflective surface 15 is arranged perpendicular to the main extension plane 4. Thus, electromagnetic radiation propagating in the direction of the second reflective surface 15 is directed directly at the second reflective surface 15 in the direction of the first reflective surface 13. The beam profile of the coupled out electromagnetic radiation has, for example, an aperture angle which is predetermined by a material system of the semiconductor chip 1 used. When an AlGaN material system is used, the aperture angle is usually about 34°.

[0120] In this exemplary embodiment, no anti-reflective coating 16 is arranged on the top surface of the semiconductor layer sequence 2.

[0121] The radiation emitting semiconductor chip 1 according to the exemplary embodiments of FIGS. 1, 2, 3 and 4 is configured in each case as a superluminescent light-emitting diode.

[0122] In FIG. 5, a measurement of the far field of electromagnetic radiation of a single active region of a semiconductor radiation emitting chip described herein is plotted in a diagram, in which a normalised radiant power L.sub.norm of the radiation is plotted in arbitrary units versus polar coordinates θ in degrees [°]. The measured radiant power of the radiation in the far field is here produced by a single active region.

[0123] Preferably, the radiation in a far field has a fast axis and a slow axis. In the far field, the radiation propagates as a plane wave in space. The direction of oscillation of the radiation in which the plane wave has the greater propagation speed is called the “fast axis”, the direction of oscillation which is perpendicular to the fast axis and has a smaller propagation speed is called the “slow axis”.

[0124] The normalised radiant power L.sub.norm is measured along a fast axis and has a full width half maximum (FWHM) of, for example, 32°.

[0125] FIG. 6 shows a top view of a radiation emitting semiconductor chip in the region of a single emitter region. By means of the width B of the first contact, the slow axis can be predetermined.

[0126] The invention is not limited to the exemplary embodiments by the description based thereon. Rather, the invention encompasses any new feature as well as any combination of features, which in particular includes any combination of features in the claims, even if this feature or combination itself is not explicitly indicated in the claims or embodiments.