DETERMINING A FAULT LOCATION ON A POWERLINE

Abstract

A method for determining a location of a fault on a powerline, comprising: obtaining, using a measuring device at a measurement location on the powerline, time-dependent data of a voltage on the powerline and of a current through the powerline at the measurement location, wherein the time-dependent data is obtained during a time period after fault inception; removing fundamental frequency components from the time-dependent data; calculating, from the time-dependent data, a virtual fault inductance for at least two different potential fault locations, by inputting the time-dependent data into an equivalent circuit model, by means of time-domain calculations on the nonfundamental frequency waveform components; and deriving, from the virtual fault inductance for each of the potential fault locations, a location on the line at which the virtual fault inductance is substantially zero.

Claims

1. A method for determining a location of a fault, having a fault type, on a powerline that is at a first end connected to an electricity grid and that is at a second end connected to a power source for applying an alternating electrical signal with a fundamental frequency to the powerline, the method comprising: a) obtaining, using a measuring device at a measurement location on the powerline, time-dependent data of a voltage on the powerline and of a current through the powerline at the measurement location, wherein the time-dependent data is obtained during a time period after fault inception, wherein the time-dependent data comprises fundamental and nonfundamental frequency waveform components, and wherein a duration of the time period is at least a duration of one full period of the fundamental frequency, b) removing the fundamental frequency components from the time-dependent data, c) calculating, from the time-dependent data, a virtual fault inductance for at least two different potential fault locations, by inputting the time-dependent data into an equivalent circuit model suitable for the fault type, and by means of time-domain calculations on the nonfundamental frequency waveform components, and d) deriving, from the virtual fault inductance for each of the potential fault locations, a location on the line at which the virtual fault inductance is substantially zero.

2. The method according to claim 1, wherein the time-dependent data comprises time series data of the voltage and the current acquired over the time period, and wherein the time-domain calculations of step b comprise discrete time-domain calculations.

3. The method according to claim 1, wherein deriving the location of the fault comprises fitting a fit curve to the virtual fault inductance as a function of the potential fault location on the line, thereby yielding the location at which the fault inductance equals substantially zero.

4. The method according to claim 1, wherein in step a) the time-dependent data of three phases of the voltage and the current is obtained.

5. The method according to claim 1, wherein the time-dependent data comprises a time resolution of at least 1 ms.

6. The method according to claim 1, wherein the time-dependent data comprises recorded time-dependent data from historical events.

7. The method according to claim 1, wherein the power source comprises a converter.

8. The method according to claim 7, wherein the converter comprises the measuring device.

9. A circuit element for determining a location of a fault, having a fault type, on a powerline connected to an electricity grid, the circuit element comprising: an acquisition system configured for obtaining time-dependent data of a voltage on the powerline and of a current through the powerline at a measurement location on the powerline, wherein the time-dependent data is obtained during a time period after fault inception, wherein the time-dependent data comprises fundamental and nonfundamental frequency waveform components, and wherein a duration of the time period is at least a duration of one full period of the fundamental frequency, a means configured for determining the fault type, and a processing device configured for performing the steps of: removing the fundamental frequency components from the time-dependent data, calculating, from the time-dependent data, a virtual fault inductance for at least two different potential fault locations, by inputting the time-dependent data into an equivalent circuit model suitable for the fault type, and by means of time-domain calculations on the nonfundamental frequency waveform components, and deriving, from the virtual fault inductance for each of the potential fault locations, a location on the line at which the virtual fault inductance is substantially zero.

10. The circuit element according to claim 9, comprising means for controlling a circuit breaker.

11. The circuit element according to claim 9, comprising a communication system for communicating a determined location of the fault.

12. The circuit element according to claim 11, comprising a processor for determining the fault location using at least two determine locations of the fault.

13. A converter comprising the circuit element of claim 9.

14. A computer comprising means for carrying out the steps of the method of claim 1.

15. The computer according to claim 14, comprising means for communicating with a circuit element comprising: an acquisition system configured for obtaining time-dependent data of a voltage on the powerline and of a current through the powerline at a measurement location on the powerline, wherein the time-dependent data is obtained during a time period after fault inception, wherein the time-dependent data comprises fundamental and nonfundamental frequency waveform components, and wherein a duration of the time period is at least a duration of one full period of the fundamental frequency, a means configured for determining the fault type, and a processing device configured for performing the steps of: removing the fundamental frequency components from the time-dependent data, calculating, from the time-dependent data, a virtual fault inductance for at least two different potential fault locations, by inputting the time-dependent data into an equivalent circuit model suitable for the fault type, and by means of time-domain calculations on the nonfundamental frequency waveform components, and deriving, from the virtual fault inductance for each of the potential fault locations, a location on the line at which the virtual fault inductance is substantially zero.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

[0045] FIG. 1 is a schematic representation of a circuit topology, comprising a powerline, a measuring device, an electricity grid, and a power source comprising a converter.

[0046] FIG. 2 is a symbol circuit diagram of an equivalent circuit model that may be used in embodiments of the first aspect of the present invention if the fault type is a three-phase fault.

[0047] FIG. 3A and FIG. 3B are symbol circuit diagrams of an equivalent circuit model that may be used in embodiments of the first aspect of the present invention if the fault type is a three-phase fault.

[0048] FIG. 4 is a graph of a virtual fault inductance versus location on a powerline.

[0049] FIG. 5 is a symbol circuit diagram of an equivalent circuit model that may be used in embodiments of the first aspect of the present invention if the fault type is a phase-to-phase fault.

[0050] FIG. 6 is a schematic representation of a circuit topology comprising a circuit element according to an embodiment of the second aspect of the present invention.

[0051] FIG. 7 is a schematic representation of a circuit element according to embodiments of the second aspect of the present invention comprising a hard-wired connection.

[0052] FIG. 8 is a schematic representation of a circuit element comprising a busbar according to embodiments of the second aspect of the present invention comprising a process-bus.

[0053] FIG. 9 is a schematic representation of a circuit topology comprising a converter according to embodiments of the third aspect of the present invention.

[0054] FIG. 10 is a schematic representation of a converter according to embodiments of the third aspect of the present invention.

[0055] FIG. 11 is a schematic representation of a network control centre comprising a computer according to embodiments of the fourth aspect of the present invention.

DESCRIPTION OF ILLUSTRATIVE EMBODIMENTS

[0056] The present invention will be described with respect to particular embodiments and with reference to certain drawings but the invention is not limited thereto but only by the claims. The drawings described are only schematic and are non-limiting. In the drawings, the size of some of the elements may be exaggerated and not drawn on scale for illustrative purposes. The dimensions and the relative dimensions do not correspond to actual reductions to practice of the invention.

[0057] Furthermore, the terms first, second, third and the like in the description and in the claims, are used for distinguishing between similar elements and not necessarily for describing a sequence, either temporally, spatially, in ranking or in any other manner. It is to be understood that the terms so used are interchangeable under appropriate circumstances and that the embodiments of the invention described herein are capable of operation in other sequences than described or illustrated herein.

[0058] Moreover, the terms top, bottom, over, under and the like in the description and the claims are used for descriptive purposes and not necessarily for describing relative positions. It is to be understood that the terms so used are interchangeable under appropriate circumstances and that the embodiments of the invention described herein are capable of operation in other orientations than described or illustrated herein.

[0059] It is to be noticed that the term “comprising”, used in the claims, should not be interpreted as being restricted to the means listed thereafter; it does not exclude other elements or steps. It is thus to be interpreted as specifying the presence of the stated features, integers, steps or components as referred to, but does not preclude the presence or addition of one or more other features, integers, steps or components, or groups thereof. The term “comprising” therefore covers the situation where only the stated features are present and the situation where these features and one or more other features are present. The word “comprising” according to the invention therefore also includes as one embodiment that no further components are present. Thus, the scope of the expression “a device comprising means A and B” should not be interpreted as being limited to devices consisting only of components A and B. It means that with respect to the present invention, the only relevant components of the device are A and B.

[0060] Similarly, it is to be noticed that the term “coupled”, also used in the claims, should not be interpreted as being restricted to direct connections only. The terms “coupled” and “connected”, along with their derivatives, may be used. It should be understood that these terms are not intended as synonyms for each other. Thus, the scope of the expression “a device A coupled to a device B” should not be limited to devices or systems wherein an output of device A is directly connected to an input of device B. It means that there exists a path between an output of A and an input of B which may be a path including other devices or means. “Coupled” may mean that two or more elements are either in direct physical or electrical contact, or that two or more elements are not in direct contact with each other but yet still co-operate or interact with each other.

[0061] Reference throughout this specification to “one embodiment” or “an embodiment” means that a particular feature, structure or characteristic described in connection with the embodiment is included in at least one embodiment of the present invention. Thus, appearances of the phrases “in one embodiment” or “in an embodiment” in various places throughout this specification are not necessarily all referring to the same embodiment, but may. Furthermore, the particular features, structures or characteristics may be combined in any suitable manner, as would be apparent to one of ordinary skill in the art from this disclosure, in one or more embodiments.

[0062] Similarly it should be appreciated that in the description of exemplary embodiments of the invention, various features of the invention are sometimes grouped together in a single embodiment, figure, or description thereof for the purpose of streamlining the disclosure and aiding in the understanding of one or more of the various inventive aspects. This method of disclosure, however, is not to be interpreted as reflecting an intention that the claimed invention requires more features than are expressly recited in each claim. Rather, as the following claims reflect, inventive aspects lie in less than all features of a single foregoing disclosed embodiment. Thus, the claims following the detailed description are hereby expressly incorporated into this detailed description, with each claim standing on its own as a separate embodiment of this invention.

[0063] Furthermore, while some embodiments described herein include some but not other features included in other embodiments, combinations of features of different embodiments are meant to be within the scope of the invention, and form different embodiments, as would be understood by those in the art. For example, in the following claims, any of the claimed embodiments can be used in any combination.

[0064] Furthermore, some of the embodiments are described herein as a method or combination of elements of a method that can be implemented by a processor of a computer system or by other means of carrying out the function. Thus, a processor with the necessary instructions for carrying out such a method or element of a method forms a means for carrying out the method or element of a method. Furthermore, an element described herein of an apparatus embodiment is an example of a means for carrying out the function performed by the element for the purpose of carrying out the invention.

[0065] In the description provided herein, numerous specific details are set forth. However, it is understood that embodiments of the invention may be practiced without these specific details. In other instances, well-known methods, structures and techniques have not been shown in detail in order not to obscure an understanding of this description.

[0066] The invention will now be described by a detailed description of several embodiments of the invention. It is clear that other embodiments of the invention can be configured according to the knowledge of persons skilled in the art without departing from the true spirit or technical teaching of the invention, the invention being limited only by the terms of the appended claims.

[0067] According to a first aspect, the present invention relates to a method for determining a location of a fault, having a fault type, on a powerline that is at a first end connected to an electricity grid and at a second end to a power source for applying an alternating electrical signal with a fundamental frequency to the line. The method comprises: a) obtaining, using a measuring device at a measurement location on the powerline, time-dependent data of a voltage on the powerline and of a current through the powerline at the measurement location, wherein the time-dependent data is obtained during a time period after fault inception, wherein the time-dependent data comprises fundamental and nonfundamental frequency waveform components, and wherein a duration of the time period is at least a duration of one full period of the fundamental frequency; b) removing the fundamental frequency components from the time-dependent data; c) calculating, from the time-dependent data, a virtual fault inductance for at least two different potential fault locations, by inputting the time-dependent data into an equivalent circuit model suitable for the fault type, and by means of time-domain calculations on the nonfundamental frequency waveform components; and d) deriving, from the virtual fault inductance for each of the potential fault locations, a location on the line at which the virtual fault inductance is substantially zero.

[0068] As an example of an embodiment of the first aspect, reference is made to FIG. 1, which shows a circuit topology comprising a powerline 11 with a measuring device 15 on the powerline 11, wherein the powerline 11 is connected at a first end to an electricity grid 12, and at a second end, via a wye-delta transformer 14, to a power source comprising a converter 13. The measuring device 15, located substantially at the second end of the powerline 11, obtains time-dependent data of a voltage on the powerline 11 and of a current on the powerline 11. In the method of the first aspect of the present invention, the measuring device 15 obtains time-dependent data at the measuring location.

[0069] In this example, at fault inception, a fault of the three-phase fault type with a fault resistance occurs at a fault location 16 on the powerline 11. The ratio of the distance between the measuring device 15 and the fault location 16 to the total length of the powerline is in this example expressed by a factor k. Therefore, the factor k is proportional to the fault distance. The factor k may be determined by embodiments of the method of the first aspect, which thereby yields the location of the fault on the powerline.

[0070] Reference is made to FIG. 2, where part of the circuit topology of FIG. 1 is represented by an equivalent circuit model. The electricity grid is represented by a synchronous voltage source 221 in series with an impedance 222, wherein the impedance 222 comprises an inductance L.sub.S and a resistance R.sub.S. The powerline 11, which connects the measuring device 15 at the measurement location with the grid, has an impedance comprising an inductance L.sub.l and a resistance R.sub.l. The powerline 11 is divided in two parts by the fault location 16. Therefore, the powerline comprises a first part with a first impedance 211, and a second part with a second impedance 212, wherein the impedance of the first part and of the second part is proportional to the length of each part. Finally, the fault at the fault location 16, that is purely resistive, has a fault resistance R.sub.F.

[0071] In the method of the first aspect of the present invention, the fundamental frequency components are removed from the time-dependent data obtained by the measuring device. Removing the fundamental frequency components may facilitate calculations on the equivalent circuit model, for the reason explained in the following text. It follows from Fourier analysis and superposition principles that the equivalent circuit model of FIG. 2 is equivalent to the sum of two separate equivalent circuit models. In the present example, the equivalent circuit model is divided into a fundamental frequencies equivalent circuit model, comprising an electrical signal alternating at the fundamental frequency, shown in FIG. 3A, and a nonfundamental frequencies equivalent circuit model comprising an electrical signal alternating at nonfundamental frequencies, shown in FIG. 3B. In the nonfundamental frequencies equivalent circuit model, the voltage source, which only generates an electrical signal at the fundamental frequency, is absent. The method of the first aspect of the present invention only considers performing calculations on the nonfundamental frequency components of the time-dependent data: these calculations may therefore be performed in this example on the nonfundamental frequencies equivalent circuit model of FIG. 3B.

[0072] The nonfundamental frequencies equivalent circuit model may not be solvable analytically since both the factor k and the fault resistance R.sub.F have an unknown value. Instead, in embodiments according to the method of the first aspect of the present invention, a virtual fault inductance is calculated for multiple different potential fault locations, or equivalently, for different values of the factor k. The virtual fault inductance for the present example may be calculated by an algorithm that is described below—however, the person skilled in the art will realise that also other ways of calculating the virtual fault inductance may be used.

[0073] In this example, for all different values of the factor k, the time-dependent voltage at the potential fault location v.sub.F(t) in the nonfundamental frequencies equivalent circuit model can be expressed by:

[00001]$\begin{array}{cc}{v}_F\left(t\right)=v_{\mathrm{pnf}}\left(t\right)-k.Math.\left(R_l.Math.i_{\mathrm{pnf}}\left(t\right)+L_l.Math.\frac{{\mathrm{di}}_{\mathrm{pnf}}\left(t\right)}{\mathrm{dt}}\right)& \left(1\right)\end{array}$

wherein t is the time, v.sub.pnf(t) is the time-dependent data of the voltage at the measuring location consisting of the nonfundamental frequency components, and i.sub.pnf(t) is the time-dependent data of the current at the measuring location consisting of the nonfundamental frequency components. However, as the obtained time-dependent data are time-series data, equation (1) is preferably expressed discretely. In that case, the time-dependent voltage at the potential fault location, comprising time-series data comprising data points n, may be expressed as:

[00002]$\begin{array}{cc}{v}_F\left(n\right)=v_{\mathrm{pnf}}\left(n\right)-k.Math.\left(R_l.Math.i_{\mathrm{pnf}}\left(n\right)+L_l.Math.\frac{i_{\mathrm{pnf}}\left(n\right)-i_{\mathrm{pnf}}\left(n-1\right)}{T_s}\right)& \left(2\right)\end{array}$

wherein v.sub.pnf(n) is the nonfundamental frequency voltage at data point n, i.sub.pnf(n) is the nonfundamental frequency current at data point n, and T.sub.s is the time interval between subsequent data points, subsequent with respect to time, in the time-dependent data.

[0074] Furthermore, the time-dependent voltage at the potential fault location can be expressed as a function of the time-dependent source current i.sub.s(t):

[00003]$\begin{array}{cc}{v}_F\left(t\right)=R_{\mathrm{eq}}.Math.i_s\left(t\right)+L_{\mathrm{eq}}.Math.\frac{{\mathrm{di}}_s\left(t\right)}{\mathrm{dt}}\mathrm{where}& \left(3\right)\\ R_{\mathrm{eq}}=\left(1-k\right)R_l+R_s{L}_{\mathrm{eq}}=\left(1-k\right)L_l+L_s& \left(4\right)\end{array}$

[0075] From equation (3), the time-dependent electricity grid current i.sub.g consisting of nonfundamental frequency components can be expressed in a discrete manner as:

[00004]$\begin{array}{cc}{i}_g\left(n\right)=\frac{1}{L_{\mathrm{eq}}+\frac{R_{\mathrm{eq}}.Math.T_s}{2}}.Math.\left(\left(v_F\left(n\right)+v_F\left(n-1\right)\right)\frac{T_s}{2}+\left(L_{\mathrm{eq}}-\frac{R_{\mathrm{eq}}.Math.T_s}{2}\right).Math.i_g\left(n-1\right)\right)& \left(5\right)\end{array}$

[0076] The time-dependent virtual fault current i.sub.F (virtual in the sense that it is the current within the assumption that the fault is at the potential fault location) through the fault impedance at the potential fault location can be expressed as:

i.sub.F(t)=i.sub.pnf(t)−i.sub.g(t)   (6)

[0077] Finally, from the virtual current i.sub.F of equation (6) and the voltage v.sub.F of equation (3), the virtual fault resistance R.sub.Fv (which is virtual in the sense that it is a resistance assuming that the fault is at the potential fault location) and the virtual fault inductance L.sub.F can be calculated:

[00005]$\begin{array}{cc}{v}_F\left(t\right)=R_{\mathrm{Fv}}.Math.i_F\left(t\right)+L_F.Math.\frac{{\mathrm{di}}_F\left(t\right)}{\mathrm{dt}}& \left(7\right)\end{array}$

[0078] This equation can be solved discretely with equation (8), using at least three time-dependent data points n obtained by the measuring device:

[00006]$\begin{array}{cc}\left[\begin{array}{cc}{i}_F\left(n-1\right)-i_F\left(n-2\right)& \frac{i_F\left(n-1\right)+i_F\left(n-2\right)}{2}.Math.T_s\\ i_F\left(n\right)-i_F\left(n-1\right)& \frac{i_F\left(n\right)+i_F\left(n-1\right)}{2}.Math.T_s\end{array}\right].Math.\left[\begin{array}{c}{L}_F\left(n\right)\\ R_{\mathrm{Fv}}\left(n\right)\end{array}\right]=\hspace{1em}\left[\begin{array}{c}\frac{v_F\left(n-1\right)+v_F\left(n-2\right)}{2}.Math.T_s\\ \frac{v_F\left(n\right)+v_F\left(n-1\right)}{2}.Math.T_s\end{array}\right]& \left(8\right)\end{array}$

[0079] For every value of k, equation (8) will provide a different array of values for the virtual fault inductance L.sub.F and the virtual fault resistance R.sub.Fv. However, it is known that faults are almost purely resistive, that is, the inductance at the fault location may be assumed to be substantially zero. To find the distance to the fault, L.sub.F and R.sub.Fv are calculated for the multiple values of k. The distance to the fault corresponds to the value of the factor k where L.sub.F is substantially, or equal to, zero.

[0080] Next, to test the above algorithm, a simulation is performed on the nonfundamental frequencies equivalent circuit model, wherein a three-phase fault has been applied at 75% of the powerline with a fault resistance of R.sub.F=2 ohm. In the simulation, the time-dependent current and the time-dependent voltage are calculated at the measurement location. Subsequently, the fundamental frequency component of the time-dependent data is removed. The time-dependent data, consisting of nonfundamental frequency components, is inputted in the algorithm to calculate the virtual fault inductance for different values for the factor k.

[0081] Reference is made to FIG. 4, in which the black circular markers are the virtual fault inductance calculated as a function of k. To find the value for k at which the virtual fault inductance is equal to zero, curve fitting is applied to the calculated virtual fault inductances, wherein the black line is the fitted curve. The fit curve equals zero at k=0.75. The algorithm thus determines that the fault location is at 75% of the line, which is precisely the location where the fault has been applied in the transient simulation. In addition, the equation (8) yields the fault resistance i.e. which is the virtual fault resistance at k=0, which may yield insight in the severity and cause of the fault.

[0082] Reference is made to FIG. 5, which shows, as a further example, an equivalent circuit model that may be used for calculating a location of a fault in a powerline, using a method according to embodiments of the first aspect of the present invention, in the case the fault type is a phase-to-phase fault. In the case of such a fault, time-dependent data on a voltage and a current must be obtained for each of the three wires of the powerline, i.e. with respect to the voltage, v.sub.pof,a, v.sub.pof,b, and v.sub.pof,c should be obtained, and with respect to the current, i.sub.pof,a, i.sub.pof,b, and i.sub.pof,c should be obtained, to determine the fault location using the method of the present invention. For each of the time-dependent data, independently, a fundamental frequency component is removed. The equivalent circuit model comprises, also in this case, no voltage source, as the time-dependent data used for the calculations of the fault type consist of nonfundamental frequency components.

[0083] Although in the above examples, a three-phase fault and a phase-to-phase fault are considered, the invention is not limited to these types of faults, and any type of fault may be considered.

[0084] According to a second aspect, the present invention relates to a circuit element for determining a location of a fault, having a fault type, on a powerline connected to an electricity grid. The circuit element comprises an acquisition system configured for obtaining time-dependent data of a voltage on the powerline and of a current through the powerline at a measurement location on the powerline, wherein the time-dependent data is obtained during a time period after fault inception, wherein the time-dependent data comprises fundamental and nonfundamental frequency waveform components, and wherein a duration of the time period is at least a duration of one full period of the fundamental frequency. The circuit element further comprises a means configured for determining the fault type, and a processing device configured for performing the steps of: removing the fundamental frequency components from the time-dependent data; calculating, from the time-dependent data, a virtual fault inductance for at least two different potential fault locations, by inputting the time-dependent data into an equivalent circuit model suitable for the fault type, and by means of time-domain calculations on the nonfundamental frequency waveform components; and deriving, from the virtual fault inductance for each of the potential fault locations, a location on the line at which the virtual fault inductance is substantially zero.

[0085] As an example of the second aspect of the present invention, FIG. 6 is a schematic representation of a circuit topology, comprising a powerline 11, a circuit element 67 according to an embodiment of the second aspect of the present invention, an electricity grid 12, and a power source comprising a converter 13.

[0086] The circuit element 67 e.g. a protective relay comprises means to communicate with a circuit breaker 68 on the powerline 11. The purpose is to protect the powerline 11 connecting the power source comprising the converter 13, for instance a wind power plant, to an electricity grid 12. The method for determining a fault location according to embodiments of the first aspect of the present invention offers the benefit that protection at a distance becomes possible using existing protective relay technology. In contrast, methods of the state of the art fail in such a case, due to the influence of the converter on the electrical signal, so that more expensive protection concepts, such as current differential protection, are needed to achieve a great safety of supply.

[0087] In this example, the circuit element 67 is installed in the proximity of the power source comprising the converter 13. An acquisition system of the circuit element 67 acquires time-dependent data on the voltage (v.sub.d) on, and current (i.sub.d) through, the powerline 11. For this, an instrument transformer may be present between the powerline 11 and the acquisition system: instrument transformers convert i.e. reduce magnitude of the currents and voltages on the powerline 11 to smaller signals that can safely be processed by electronic equipment. A processing device of the circuit element 67 processes the reduced signals with a method according to embodiments of the first aspect. Means for controlling a circuit breaker of the circuit element 67 control the circuit breaker 68, preferably such that the circuit breaker 68 isolates the fault immediately when the circuit element 67 locates a fault on the powerline 11, and preferably with a time delay when the fault is located further away.

[0088] Reference is made to FIG. 7, which is a schematic representation of a circuit element according to embodiments of the second aspect of the present invention comprising a hard-wire connection. In case the circuit element comprises the hard-wired connection, time-dependent data obtained on a current and a voltage are analogue quantities, typically ranging from a root-mean square current of from 0 A to 50 A and a root-mean-square voltage of from 0 to 100 V. An analogue-to-digital converter 771 processes the time-dependent data at a sampling frequency f.sub.s, thereby generating a stream of time-series data values. For instance, the sampling frequency may be between 1 kHz and 10 kHz, allowing to acquire sufficient harmonic content for performing a method according to embodiments of the first aspect to be effective. Furthermore, such a sampling frequency may be easily reached by electronic components involved in the data acquisition.

[0089] The method for determining the fault location from the time-dependent data i.e. the time-series data may be implemented in software-code and deployed on a microprocessor 772. The time-dependent data are obtained from the analogue-to-digital converter 771 by the microprocessor 772. The microprocessor 772 first corrects the time-dependent data for the conversion performed by the instrument transformer, which has reduced the magnitude of the signal. Also, the technical specification of the powerline, such as length and impedance, have been integrated in the method to be performed by the microprocessor 772, which is typically done before setting the circuit element into operation. The method for calculating the fault location is then performed in a processing device 775 on the time-dependent data. In embodiments, the method may be continuously performed: as soon as a fault is detected on the powerline, a signal is issued to a logic 773. The logic 773 decides whether the circuit breaker 68 is opened instantaneously or after a time delay: the time delay has been configured by the user before setting the circuit element 67 into operation. When the circuit breaker 68 is to be opened, the logic 773 issues the command for opening the circuit breaker, via an output, to the circuit breaker 68. Typically, the output is linked to a contact, typically an opto-coupler, that activates a so-called trip-coil of the circuit breaker 68.

[0090] Reference is made to FIG. 8, which is a schematic representation of a circuit element according to embodiments of the second aspect of the present invention comprising a process bus 874. By using the process bus 874, the circuit element receives a time-dependent voltage and current data as streams of time-series data point, i.e. sampled values. Therefore, in contrast to the previous example of a circuit element comprising a hard-wired connection, in this example, no analogue-to-digital conversion is required. Instead, a process bus interface is required that makes the microprocessor compatible with the process bus protocol. A typical process bus protocol is IEC61850-9-2. A microprocessor 872 comprises a processing device 775 for determining a fault location. Finally, the command to open the circuit breaker is sent to the process bus 874 as a numerical value: the corresponding circuit breaker is connected 88 to the process bus 874. It recognizes this command and will open to clear the fault.

[0091] According to a third aspect, the present invention relates to a converter comprising a circuit element according to embodiments of the second aspect of the present invention.

[0092] Reference is made to FIG. 9, which is a schematic representation of a circuit topology comprising an example of a power source comprising a converter 93 according to embodiments of the third aspect of the present invention. The converter is connected to a second end of a powerline 91, wherein the powerline 91 is at a first end connected to an electricity grid 92. The converter 93 comprises a circuit element according to an embodiment of the second aspect of the present invention, with the aim of selective protection of the powerline 91 connecting the power source comprising the converter 93 to the electricity grid 92. Integrating the circuit element in the converter 93 offers the benefit of, first, allowing a distance protection which ensures a great safety of supply at low costs. Second, additional costs are saved by omitting an additional circuit element, an additional instrument transformer, and an additional circuit breaker. Indeed, apparatus may be shared between the converter and the circuit element.

[0093] The circuit element obtains time-dependent data on a current through, and on a voltage on, the powerline 91, using an acquisition system of the converter. On the detection of a fault located on the powerline 91, the converter 96 stops injecting current, either instantaneously or after a time delay, thereby implements a concept of selective fault clearing of distance protection.

[0094] Reference is made to FIG. 10, which is a schematic representation of the converter. As the circuit element 67 is integrated in the converter, a method for determining a fault location may be implemented as software-code on a processing device 775 present in the converter. It obtains the time-dependent data from an acquisition system 1076 connected to the three wires of the three-phase powerline 101, and an analogue-to-digital converter 1077, that are present in the converter as they are required for the control of the power electronic switches 1031 of the converter. The sampling frequency of the analogue-to-digital converter is preferably greater than 1 kHz so that it acquires sufficient harmonics content of the electrical signal on the powerline 101. Also, the processing device 775 must comprise sufficient computational resources so that the method for determining the location of the fault can be executed in real-time.

[0095] A logic 1073 coupled with the processing device 775 decides about the response of the converter to a fault. It compares the fault location determined by the processing device 775 to a pre-set configuration of the logic 1073 and then may initiate the converter to stop injecting current, either instantaneously or with a time delay. Therefore, it sends a command to a control 1078 that then opens the power electronic switches 1031. This ultimately prevents the converter from injecting current and the fault is selectively cleared.

[0096] According to a fourth aspect, the present invention relates to a computer comprising means for carrying out the steps of the method according to embodiments of the first aspect of the present invention.

[0097] Reference is made to FIG. 11. A method according to embodiments of the first aspect of the present invention can also be performed in a network control center (NCC). An NCC may be based on servers that gather information from powerlines. With this information, the NCC determines the state of the powerlines and presents it to a grid operator. This allows one grid operator to take decisions and control a plurality of powerlines from a distance. Advantageously, the method for determining a fault location allows a grid operator to locate faults more accurately in powerlines wherein an electrical signal for a large part is generated by a power source comprising a converter. As such, the grid operator can find and repair faults on powerlines quicker, which reduces the duration of power-outages and makes the maintenance more efficient.

[0098] The method for determining a fault location may be implemented as software-code and deployed on a server of the NCC and executed using remote time-dependent data on a voltage and a current obtained at several locations on a powerline, or on a plurality of powerlines, and present the fault locations determined with the method to the grid operator.

[0099] The method on the NCC can either operate online or offline.

[0100] Operating online, the time-dependent data from several locations are continuously read from a wide-area network and instantaneously processed. As soon as a fault occurs the grid operator receives, with a delay of a possibly only few seconds, the fault locations determined by the method. The time delay may in general be limited by the transmission rate of the wide area network.

[0101] Operating offline, data may be processed from several locations that have been recorded during historical events. This may help grid operators to analyse faults in powerlines wherein an electrical signal for a large part is generated by a power source comprising a converter. Because of a high accuracy that may be reached, the method may even determine fault locations that had not been discovered yet.

[0102] It is to be understood that although preferred embodiments, specific constructions and configurations, as well as materials, have been discussed herein for devices according to the present invention, various changes or modifications in form and detail may be made without departing from the scope and spirit of this invention. For example, any formulas given above are merely representative of procedures that may be used. Functionality may be added or deleted from the block diagrams and operations may be interchanged among functional blocks. Steps may be added or deleted to methods described within the scope of the present invention.