METHOD OF FORMING A CATHODE LAYER, METHOD OF FORMING A BATTERY HALF CELL

Abstract

A method of forming a layer of a cathode is provided. The method includes generating a plasma remote from one or more sputter targets, sputtering material from the target or targets using the plasma, and depositing the sputtered material on the substrate to which a bias voltage has been applied, thereby forming the layer of cathode.

Claims

1. A method of forming a layer of a cathode, optionally for a solid-state battery, on a substrate, the method comprising: generating a plasma remote from one or more sputter targets, sputtering material from the target or targets using the plasma, and depositing the sputtered material on the substrate to which a bias voltage has been applied, thereby forming the layer of cathode.

2. The method according to claim 1, wherein the voltage bias is negative.

3. The method according to claim 1, wherein the voltage bias is supplied by a RF power generator.

4. The method according to claim 1, wherein the power density associated with the voltage bias of the substrate is at least 0.2 Wcm.sup.−2.

5. The method according to claim 1, wherein the power density associated with the voltage bias of the substrate is no more than 3.5 Wcm.sup.−2.

6. The method according to claim 1, wherein the layer of cathode comprises an alkali metal-based or alkaline earth metal based material.

7. The method according to claim 6, wherein the layer of cathode comprises at least one transition metal and a counter-ion.

8. The method according to claim 1, wherein the layer of cathode is selected from the group consisting of: LiCoO.sub.2, LiNiO.sub.2, LiNbO.sub.2, LiVO.sub.2, LiMnO.sub.2, LiMn.sub.2O.sub.4, Li.sub.2MnO.sub.3, LiFePO.sub.4, LiNiCoAlO.sub.2 and Li.sub.4Ti.sub.5O.sub.12.

9. The method according to claim 1, wherein the layer of cathode that forms comprises a deposited material, the deposited material being able to exist in a lower energy crystal structure and a higher energy crystal structure, the layer of cathode comprising the deposited material in the higher energy crystal structure.

10. The method according to claim 9, wherein the layer of cathode that forms comprises a volume fraction of the higher energy crystal structure, and optionally a volume fraction of the lower energy crystal structure, wherein the volume fraction of the higher energy crystal structure present in the layer of cathode is higher than the volume fraction of the lower energy crystal structure.

11. The method according to claim 9, wherein the higher energy crystal structure has a characteristic first X-ray diffraction pattern, and the lower energy crystal structure has a characteristic second X-ray diffraction pattern, wherein the first X-ray diffraction pattern comprises a first characteristic peak indicative of the presence of the higher energy crystal structure and the second X-ray diffraction pattern comprises a second characteristic peak indicative of the presence of the lower energy crystal structure.

12. The method according to claim 11, wherein the area under the first characteristic peak is higher than the area under the second characteristic peak.

13. The method according to claim 1, wherein the layer of cathode has a characteristic X-ray diffraction pattern, wherein the X-ray diffraction pattern optionally comprises at least one peak, the at least one peak having a Full Width at Half Maximum (FWHM) value, and wherein the FWHM is from 0.05 to 0.2 degrees.

14. The method according to claim 1, wherein the ratio of the power used to generate the plasma to a power associated with a bias on the target is greater than 1:1.

15. The method according to claim 1, wherein the substrate comprises a flexible substrate.

16. The method according to claim 15, wherein the temperature of the substrate is no more than 200° C.

17. The method of claim 1, wherein the working distance between the target and the substrate is within +/−50% of the theoretical mean free path of the system.

18. The method of claim 1, wherein the process occurs inside a deposition chamber, and a working pressure is defined as the chamber pressure prior to the igniting of the remote plasma, said working pressure being at a substantially constant value throughout the deposition process, said value being between 0.00065 mBar and 1e-2 mBar.

19. The method of claim 18, wherein the sputtering is at least partially caused by bombardment of ions of a sputter gas, and wherein the flow rate of said sputter gas into the chamber is at a substantially constant value throughout the deposition process, said value being between 5 sccm and 200 sccm.

20. A method of forming a layer of cathode optionally for a solid-state battery on a substrate, the layer of cathode comprising deposited material, the deposited material being capable of existing in a lower energy crystal structure and a higher energy crystal structure, the method comprising: generating a plasma remote from one or more sputter targets, sputtering material from the target or targets using the plasma, and depositing the sputtered material on the substrate to which a bias voltage has been applied, thereby forming the layer of cathode, the layer of cathode comprising deposited material in the higher energy crystal structure.

21. A method of forming a solid state battery half-cell, the method comprising: forming a layer of cathode in accordance with the method of forming a layer of cathode of claim 1; and depositing an electrolyte material suitable for a solid state battery cell on the cathode layer.

22. A method of forming a solid state battery cell, the method comprising: forming a solid state battery half-cell in accordance with claim 21; and contacting anode material suitable for a solid state battery cell on the electrolyte material.

23. A substrate provided with a layer of cathode of a solid-state battery, the layer of cathode being made in accordance with the method of claim 1.

24. A solid-state battery half-cell made in accordance with the method of claim 21.

25. A solid-state battery cell made in accordance with the method of claim 22.

26. A method of forming a crystalline layer of cathode, optionally for a solid-state battery, on a substrate, the method comprising: generating a plasma remote from one or more sputter targets, sputtering material from the target or targets using the plasma, and depositing the sputtered material on the substrate to which a bias voltage has been applied, thereby forming the crystalline layer, the power density associated with the bias voltage having been determined to provide the crystalline layer of a desired crystallinity.

27. A method of determining a function which describes the crystallinity of a layer of cathode of material as a result of a change in voltage bias applied to a substrate during the deposition of said cathode material, comprising; generating a plasma remote from one or more sputter targets, sputtering material from the target or targets using the plasma, and depositing the sputtered material on a first portion of substrate to which a bias voltage has been applied, thereby forming a first crystalline layer, the first power density associated with the bias voltage producing the crystalline layer having a first crystallinity; and generating a plasma remote from one or more sputter targets, sputtering material from the target or targets using the plasma, and depositing the sputtered material on a second portion of substrate to which a bias voltage has been applied, thereby forming a second crystalline layer, the second power density associated with the bias producing the second crystalline layer having a second crystallinity, and based on the crystallinity of the first and second crystalline layers, determining a function which describes the relationship between the power density associated with the bias on the substrate and the crystallinity of the layer of cathode.

28. A method of forming a layer of cathode on a substrate, the method comprising: generating a plasma remote from one or more sputter targets; sputtering material from the target or targets using the plasma; depositing the sputtered material on the substrate to which a bias voltage has been applied, thereby forming the layer of cathode, further including the steps of: selecting a desired crystallinity, using the method of claim 27 to determine a voltage bias to be applied to the substrate such that the material forms with the desired crystallinity.

29. A method of forming a crystalline layer of cathode, optionally for a solid-state battery, on a substrate, the crystalline layer comprising a deposited material, the deposited material being capable of existing in a lower energy crystal structure and a higher energy crystal structure, the method comprising: generating a plasma remote from one or more sputter targets, sputtering material from the target or targets using the plasma, and depositing the sputtered material on the substrate to which a bias voltage has been applied, thereby forming the crystalline layer, the power density associated with the bias voltage having been determined to provide the desired lower energy or higher energy crystal structure.

30. The method of forming a crystalline layer of cathode according to claim 29, wherein the ratio of the area under the first characteristic peak and the area under the second characteristic peak positively correlated to the volume fraction of the high-energy crystal structure in the layer of cathode, wherein the volume fraction of the high energy crystal structure present in the layer of cathode is higher than the volume fraction of the low energy crystal structure when the voltage bias on the substrate is above a critical value, and the method further comprises, initially: selecting a desired volume fraction of high energy crystal structure, if the desired volume fraction of the high energy crystal structure is higher than half (i.e. higher than 50%), selecting a voltage bias higher than the critical value, and if the desired volume fraction of the high energy crystal structure is lower than half (i.e. lower than 50%), selecting a voltage bias lower than the critical value.

31. A method of determining a function which describes the phase distribution of a layer of cathode of material, which comprises a volume fraction of a high energy crystal structure and a volume fraction of a low energy crystal structure, as a result of a change in voltage bias applied to a substrate during the deposition of said cathode material, comprising; generating a plasma remote from one or more sputter targets, sputtering material from the target or targets using the plasma, and depositing the sputtered material on a first portion of substrate to which a bias voltage has been applied, thereby forming a first crystalline layer, and determining the crystal structure of the first crystalline layer; and generating a plasma remote from one or more sputter targets, sputtering material from the target or targets using the plasma, and depositing the sputtered material on a second portion of substrate to which a bias voltage has been applied, thereby forming a second crystalline layer, and determining the structure of the second crystalline layer and, based on the structures of the first and second crystalline layers, determining a function which describes the relationship between the power density associated with the bias on the substrate and the volume fraction of the high energy crystal structure in the cathode layer.

32. A method of forming a layer of cathode on a substrate, the method comprising: generating a plasma remote from one or more sputter targets; sputtering material from the target or targets using the plasma; depositing the sputtered material on the substrate to which a bias voltage has been applied, thereby forming the layer of cathode, further including the steps of: selecting a desired volume fraction of high energy crystal structure to be present in the layer of cathode, using the method of claim 31 to determine a voltage bias to be applied to the substrate such that the material forms with the desired volume fraction of high energy crystal structure.

33. A method of determining the voltage bias at which a high energy crystal structure would be present in a layer of cathode of material, wherein the method comprises repeatedly performing steps (1), (2) and (3) until a voltage bias is found that results in the formation of the high energy crystal structure, as determined by X-ray diffraction, wherein: Step (1) comprises forming a layer of cathode according to the method of claim 1, Step (2) comprises performing X-ray diffraction on the layer of cathode, to determine the if the high energy crystal structure is present, and Step (3) comprises adjusting the voltage bias to be applied to the substrate before returning to Step (1).

Description

DETAILED DESCRIPTION

[0208] Embodiments of the present invention will now be described by way of example only with reference to the accompanying schematic drawings which can be briefly summarised as follows.

[0209] FIG. 1a is a schematic side-on view of a plasma deposition chamber used in accordance with a first example of the first aspect of the invention;

[0210] FIG. 1b shows the steps of a method of manufacturing a battery cathode in accordance with the first example of the first aspect of the invention;

[0211] FIG. 2a shows X-ray diffraction Full Width at Half Maximum (FWHM) values of layers deposited in accordance with several examples of the present invention, plotted against the electrical power applied to the substrate;

[0212] FIG. 2b shows the Full Width at Half maximum values for several layers of cathode deposited using examples of methods of the first aspect of the present invention at different electrical powers applied to the substrate;

[0213] FIG. 2c shows a plot of the normalised Full Width at Half Maximum values obtained from layers of cathode deposited using examples of the method of the first aspect of the invention;

[0214] FIG. 3 shows the X-ray diffractions peaks of the (003) reflection of LiCoO.sub.2 from which the FWHM values shown in FIG. 2a are derived;

[0215] FIG. 4 shows the intensity of the (003) reflection of LiCoO.sub.2 as a function of the power applied to the substrate;

[0216] FIG. 5 is schematic representation of an example of a method of forming a layer of cathode optionally for a solid-state battery on a substrate in accordance with a first example of the second aspect of the invention;

[0217] FIG. 6 shows the position and FWHM of the 111 peak obtained from LiCoO.sub.2 deposited in accordance with examples of a method of the present invention, as a function of the power applied to the substrate;

[0218] FIG. 7a shows a schematic representation of an apparatus used in a second example method of the first aspect of the invention;

[0219] FIG. 7b shows a schematic representation of an apparatus used in a third example method of the first aspect of the invention;

[0220] FIG. 8 is a schematic representation of an example of a method of forming a solid state battery half-cell in accordance with a first example of a third aspect of the invention;

[0221] FIG. 9 is a schematic representation of an example of a method of forming a solid state battery cell in accordance with a fourth aspect of the invention;

[0222] FIG. 10 is a schematic representation of an example of a method of making a solid-state battery in accordance with a fifth aspect of the invention;

[0223] FIG. 11 shows a schematic representation of an example of a substrate in accordance with a sixth aspect of the present invention;

[0224] FIG. 12 is a schematic representation of an example of a substrate provided with a layer of cathode of a solid-state thin film device in accordance with a seventh aspect of the present invention;

[0225] FIG. 13a is a schematic representation of an example of a solid-state battery half-cell according to an eighth aspect of the invention so made according to an example of the third aspect of the invention;

[0226] FIG. 13b is a schematic representation of example of a solid-state battery half-cell according to an eighth aspect of the invention so made according to an example of the third aspect of the invention;

[0227] FIG. 14a is a schematic representation of an example of a solid-state battery according to a tenth aspect of the invention so made according to an example of the fifth aspect of the invention;

[0228] FIG. 14b is a schematic representation of an example of a solid-state battery according to a tenth aspect of the invention so made according to an example of the fifth aspect of the invention;

[0229] FIG. 15 is a schematic representation of an example of a method of forming a crystalline layer of cathode, optionally for a solid-state battery, on a substrate, in accordance with an eleventh aspect of the invention;

[0230] FIG. 16 is a schematic representation of an example of a method of determining a function which describes the crystallinity of a layer of cathode of material as a result of a change in voltage bias applied to a substrate during the deposition of said cathode material, on a substrate, in accordance with an twelfth aspect of the invention;

[0231] FIG. 17 is a schematic representation of an example of a method of forming a crystalline layer of cathode, in accordance with a thirteenth aspect of the invention;

[0232] FIG. 18 is a schematic representation of an example of a method of forming a crystalline layer of cathode optionally for a solid-state battery on a substrate in accordance with an fourteenth aspect of the invention;

[0233] FIG. 19 is a schematic representation of an example of a method of determining a function which describes the phase distribution of a layer of cathode of material in accordance with an fifteenth aspect of the invention;

[0234] FIG. 20 is a schematic representation of an example of a method of forming a layer of cathode in accordance with a method of the sixteenth aspect of the invention; and

[0235] FIG. 21 is a schematic representation of an example of a method of determining the power of a voltage bias at which a higher energy crystal structure would be present in a layer of cathode of material in accordance with a seventeenth aspect of the invention.

DETAILED DESCRIPTION

[0236] FIG. 1a is a schematic side-on view of a plasma deposition process apparatus which is used in a method of depositing a crystalline material onto a substrate to form a layer of cathode in accordance with a first example of the first aspect of the present invention. The method is denoted generally by reference numeral 1001 and is shown schematically in FIG. 1b, and comprises generating 1002 a plasma remote from one or more targets, generating 1003 sputtered material from the target or targets using the plasma, and depositing 1004 the sputtered material on the substrate to which a bias voltage has been applied, thereby forming the layer of cathode. The method of depositing an optionally crystalline layer of cathode onto the substrate may be performed as a part of a method of manufacturing a battery cathode.

[0237] The layer of cathode in this first example takes the form ABO.sub.2. In the first example, the ABO.sub.2 material takes a layered oxide structure. In the first example, the ABO.sub.2 material is LiCoO.sub.2. However, the method of the first example has been shown to work on a wide range of ABO.sub.2 materials. In other examples, the ABO.sub.2 material structure comprises at least one of the following compounds (described here with non-specific stoichiometry): LiCoO, LiCoAlO, LiNiCoAlO, LiMnO, LiNiMnO, LiNiMnCoO, LiNiO and LiNiCoO. These materials are potential candidates for manufacturing a battery cathode. Those skilled in the art will realise that the stoichiometry may be varied.

[0238] In this first example, the ABO.sub.2 material is LiCoO.sub.2 and is deposited as a layer that is approximately 1 micron thick. In other examples, the ABO.sub.2 material is deposited as layer that is approximately 5 microns or 10 microns thick.

[0239] With reference to FIG. 1a, the plasma deposition process apparatus is denoted generally by reference numeral 100 and comprises a plasma target assembly 102 comprising a target 104, a remote plasma generator 106, a series of electromagnets 108 for confining the plasma generated by the remote plasma generator 106, a target power supply 110, a remote plasma source power supply 112 and a housing 114. Remote plasma generator 106 comprises two pairs of radio frequency (RF) antennae 116. Housing 114 comprises a vacuum outlet 120 which is connected to a series of vacuum pumps located outside the chamber so that the chamber 122 defined by housing 114 can be evacuated. Housing 114 is also provided with a gas inlet 124 which may be connected to a gas supply (not shown) for the introduction of one or more gases into the chamber 122. In other examples, the gas inlet 124 may be positioned over the surface of the target assembly 102. As can be seen from FIG. 1a, the plasma is generated remote from the target 104.

[0240] In this example, the target 104 comprises LiCoO.sub.2. Briefly, the chamber 122 is evacuated until a sufficiently low pressure is reached. Power provided by power supply 112 is used to power the remote plasma generator 106 to generate a plasma. Power is applied to the target 104 such that plasma interacts with target 104, causing LiCoO.sub.2 to be sputtered from the target 104 and onto the substrate 128. In the present example, the substrate 128 comprises a polymer sheet which is introduced into the housing 114 via inlet 130 and out of the housing 114 via outlet 132. A powered roller 134 is used to help move the substrate 128. The LiCoO.sub.2 is deposited onto the substrate 128 as a crystalline (non-amorphous) material.

[0241] The apparatus 100 also comprises a shutter 136, for restricting deposition of sputtered material onto the substrate 128, and an input 138 for cooling the roller 134. Shutter 136 allows a portion of the substrate 128 to be exposed to the sputtered material.

[0242] As mentioned above, a powered roller 134 is used to help move the substrate 128 into and out of the plasma deposition apparatus 100. Powered roller 134 is part of a roll-to-roll substrate handling apparatus (not shown) which comprises at least a first storage roller upstream of the plasma deposition apparatus 100 and a second storage roller downstream of the plasma deposition apparatus 100. The roll-to-roll substrate handling apparatus is a convenient way of handling, storing and moving thin, flexible substrates such as the polymer substrate used in this example. Such a roll-to-roll system has a number of other advantages. It allows for a high material throughput and allows a large cathode area to be deposited on one substrate, throughout a series of depositions at a first portion of the substrate, followed by a second portion of the substrate, and so on. Furthermore, such roll-to-roll processing allows for a number of depositions to occur without breaking vacuum. This saves both time and energy compared to systems in which the chamber needs to be taken back up to atmospheric pressure from vacuum after deposition in order to load a new substrate 128. In other examples, sheet-to-sheet processing is used instead of roll-to-roll processing, wherein the substrate 128 is provided with a support. Alternatively, the substrate may be supplied in discrete sheets that are handled and stored in relatively flat sheets. The substrate may be planar in shape as the material is deposited thereon. This may be the case, when the substrate is provided in the form of discrete sheets, not being transferred to or from a roll. The sheets may each be mounted on a carrier, having greater structural rigidity. This may allow for thinner substrates to be used than in the case of substrate film held on a roller. It may be that the substrate is a sacrificial substrate. It may be that the substrate is removed before the layer(s) of material. Part or all of the substrate may be removed before integrating the cathode layer or a part thereof in an electronic product package, component or other end product. For example, the layer of cathode may be lifted off from the substrate. There may be a layer of other intervening material between the base substrate and the crystalline material. This layer may lift off with the layer of cathode or assist in the separation of the layer of cathode from the base substrate. A laser-based lift-off technique may be used. The substrate may be removed by a process that utilises laser ablation. In other examples, another suitable processing regime is used, provided it is capable of sufficiently high production throughput.

[0243] The polymer substrate 128 is under tension when moving through the system, for example withstanding a tension of at least 0.001N during at least part of the processing. The polymer is robust enough such that when the polymer is fed through the roll-to-roll machine, it does not experience deformation under tensile stress. In this example, the polymer is Polyethylene terephthalate (PET), and the substrate 128 has a thickness of 1 micron or less, in examples the thickness is 0.9 microns. The substrate 128 is pre-coated with a current collecting layer, which is made of an inert metal, which is in this case nickel. The yield strength of the PET film is sufficiently strong that the substrate does not yield or plastically deform under the stresses of the roll-to-roll handling apparatus.

[0244] The use of such thin polymer substrates is beneficial because this facilitates batteries with a higher energy density to be manufactured. In other examples, a material, which is not polymeric, is used, providing that it can be manufactured in a sufficiently thin and flexible manner to allow for a high battery density and ease of handling post-deposition. The plasma deposition process and subsequent manufacturing processes are however subject to the technical challenges that working with such thin layers impose.

[0245] Before the substrate 128 is so pre-coated, it has a surface roughness that is carefully engineered so as (a) to be great enough to mitigate the undesirable effects that would otherwise result from electrostatic forces (such as increasing the force required to unwind the polymer film from the drum on which it is held) and (b) to be small enough that the roughness does not cause problems when depositing material onto the substrate. In this example, the surface roughness is engineered to be about 50 nm. It will be noted that the product of the thickness of the substrate (0.9 microns) and the surface roughness is 4.5×10.sup.4 nm.sup.2 and is therefore less than 10.sup.5 nm.sup.2 and less than 5×10.sup.4 nm.sup.2 in this example. It has been found that that the roughness needed for easing handling of thin films rises with decreasing thickness. Generally, it has been found that the roughness required to improve handling of thinner substrates (i.e. less than 10 microns, particularly less than 1 micron) increases as the substrate thickness decreases.

[0246] The remotely generated plasma is created by the power supplied to the antennae 116 by power supply 112. There is therefore a measurable power associated with that used to generate the plasma. The plasma is accelerated to the target by means of electrically biasing the target 104, there being an associated electrical current as a result. There is thus a power associated with the bias on the target 104. In this first example the ratio of the power used to generate the plasma to the power associated with the bias on the target is 5:2. Note that in this example, the ratio is calculated on the assumption that the power efficiency of the plasma-generating source is taken to be 50%. The power associated with the bias on the target is at least 1 Wcm.sup.−2.

[0247] When the LiCoO.sub.2 film is deposited onto the substrate to form the layer of cathode, it forms a crystalline film of LiCoO.sub.2. The crystalline structure which forms onto the substrate is in the R3m space group. This structure is a layered oxide structure. This structure has a number of benefits, such as having a high accessible capacity and high rate of charge and discharge compared to the low energy structure of LiCoO.sub.2, which has a structure in the Fd3m space group. Crystalline LiCoO.sub.2 in the R3m space group is often favoured for solid state battery applications.

[0248] Throughout the plasma deposition process, the temperature of the substrate 128 does not exceed the degradation point of the polymer substrate 128. Moreover, the temperature of the substrate is sufficiently low throughout the deposition process such that the temperature adjusted yield stress of the polymer substrate remains sufficiently high such that the polymer substrate does not deform under the stresses exerted by the roll-to-roll processing machine.

[0249] The general shape of the confined plasma made from the remote plasma generator 106 is shown by the dashed lines B in FIG. 1a. The series of electromagnets 108 is used to and confine the plasma to a desired shape/volume.

[0250] It should be noted that, whilst in this first example, substrate 128 is fed into the chamber at inlet 130, and exits the chamber at outlet 132, alternative arrangements are possible. For example, the roll or other store upstream of shutter 136 may be inside the process chamber 122. The roll or other store downstream of shutter 136 may be inside or could be stored inside the process chamber 122.

[0251] In addition the means 112 of powering the plasma source, may be of RF, (Direct Current) DC, or pulsed-DC type.

[0252] In this first example, the target assembly 102 comprises only one target 104. This target is made of LiCoO.sub.2. It should be appreciated that alternative and/or multiple target assemblies may be used, for example, comprising a distinct region of elemental lithium, a distinct region of elemental cobalt, a distinct region of lithium oxide, a distinct region of cobalt oxide, a distinct region of a LiCo alloy, a distinct region of LiCoO.sub.2, or any combination thereof. In other examples, the ABO.sub.2 material may not be LiCoO.sub.2. In these examples, the target assembly or assemblies contain distinct regions of A, distinct regions of B, distinct regions of a compound containing A and/or B, and/or distinct regions containing ABO.sub.2.

[0253] For the avoidance of doubt, the target 104 of the target assembly 103 acts as a source of material alone and does not function as a cathode when power is applied to it from the RF, DC or pulsed DC power supply.

[0254] The substrate 128, is placed near a charged plate 135. Charged plate 135 is supplied with a voltage bias by an RF voltage generation device (not shown). The voltage bias transfers from the charged plate 135 to the substrate 128. In other embodiments, the voltage is instead applied directly to the roller 134.

[0255] The power density associated with the voltage bias of the substrate is simply the power observed as being drawn to power the substrate.

[0256] The voltage bias being applied so close to the substrate increases the velocity of the positive sputtered ions in the plasma. It is believed, without wishing to be bound by theory, that an increase in velocity results in an increased arrival force and hence increased “ad-atom” energy. The end result is improved crystallinity in a film that is deposited on the substrate, compared to a film deposited onto a substrate where a voltage bias is not applied.

[0257] The power associated with the voltage bias applied to the substrate is 600 W. The substrate (or the part of the substrate to which a voltage is applied) has a surface area of 177 cm.sup.2. Therefore, the power density associated with the bias on the substrate is roughly 3.4 Wcm.sup.−2.

[0258] The applicant has discovered that the crystallinity of a layer of cathode increases with increased voltage bias applied to the substrate. By this, what is meant is that the layer of cathode has an improve crystallinity compared to a layer of cathode formed under substantially the same process conditions as the present example, wherein there is no voltage bias applied to the substrate.

[0259] Assessment of crystallinity as a function of bias power was assessed by measuring the FWHM of an x-ray reflection obtained from a layer of cathode as a function of the bias power applied to the substrate. In this connection, FIG. 2a shows Full Width at Half Maximum (FWHM) values of the (003) reflection in X-ray diffraction patterns obtained from cathode layers deposited using the example methods of the present invention as a function of the measure power associated with the voltage bias applied to the substrate. All samples were deposited using a working distance of 9 cm. The structure of each layer of cathode deposited was characterised by X-ray diffraction using a diffractometer (Panalytical-Empyrean) with CuKα radiation (λ=1.5406 Å) equipped with a Pix3D detector. The diffraction pattern was taken at room temperature in the range 12-100° 2θ. Data were collected using continuous scans with a resolution of 0.02°/step and a count time of 100 s/step.

[0260] The (003) reflection is a characteristic reflection from LiCoO.sub.2 when in its hexagonal structure, which is part of the R3m space group. The absolute FWHM was measured in relation to this peak for each of the examples 210 220 230 deposited. Those skilled in the art will realise that the absolute Full Width at Half Maximum value comprises an instrument component that is derived from the specific characterisation parameters used during the collection of the X-ray diffraction pattern, and a sample component that is derived from the material properties of the sample being measured. Those skilled in the art would realise that it would also be possible to deconvolute the instrument component from the absolute FWHM.

[0261] For the avoidance of doubt, the FWHM is the width of the diffraction peak measured between those points on the y-axis which are half the maximum intensity measured from baseline. The Full Width at Half Maximum values measured for these examples 210 220 230 shown in FIG. 2a are absolute Full Width at Half Maximum values i.e. without the instrument component having been deconvoluted.

[0262] The FWHM of a diffraction peak is inversely proportional to the size of sub-micrometre crystallites in a solid. As the skilled person would be well aware, this relationship can be described by the Scherrer equation, which also takes into account instrument parameters that may affect the broadening of an X-ray diffraction peak. A large number of factors contribute to the width of a diffraction peak (other than instrument parameters and crystallite size) which relate to the structure of the material. These structural sources of peak broadening are include inhomogeneous strain, and crystal lattice imperfections such as dislocations, twinning, stacking faults, grain boundaries, and others not listed here. These and other imperfections may also result other peak shape effects, for example asymmetry of a peak. If all of these other contributions to the peak width, including instrumental broadening, were zero, then the peak width would be determined solely by the crystallite size. However in reality, the contributions to the width are non-zero, and the crystallite size can be larger than that inferred by FWHM values, with the “extra” peak width coming from the structural factors previously described. Crystallinity, as a concept, can be used to collectively describe the effect of crystal size and imperfections (such as dislocations, stacking faults, etc.) on peak broadening. As previously stated, crystallinity refers to the degree of structural order in a solid. Therefore, a smaller FWHM value infers that there are fewer of these structural imperfections in the material, and that the material has a higher degree of crystallinity.

[0263] FIG. 2a shows that there is an inverse relationship between the power associated with the voltage bias applied to the substrate and the FWHM of the (003) reflection obtained from the layer deposited using said bias voltage on the substrate. As the power associated with the bias voltage is increased, the FWHM of the (003) reflection decreases in an approximately linear manner as shown by dotted line 250.

[0264] The FWHM as a function of applied power associated with a bias voltage may be compared to the FWHM when no bias voltage is applied to the substrate to provide a rationalised FWHM, the rationalised FWHM being the FWHM at a particular applied power divided by the FWHM when no power is applied to the substrate. In this connection, FIG. 2c shows a plot of a rationalised Full Width at Half Maximum as a function of applied power used to deposit the cathode layer. As for previous examples described, the reflection from which Full Width at Half maximum values were obtained was the (003) reflection. FIG. 2b shows the Full Width at Half maximum values obtained from layers of cathode deposited using examples of methods of the present invention 215 225 235 245 255 265. Here, the layers of cathode were deposited at a working distance of 14 cm. The FWHM of the (111) peak was measured. There is a linear trend showing a reduction in absolute Full Width at Half Maximum (and thus an increase in crystallinity) as the power associated with the voltage bias applied to the substrate is increased. The applicant has observed that at some working distances (such as 14 cm), there may be effectively an upper limit in the voltage bias applied to the substrate, above which the reduction in Full Width at Half maximum is negligible. In the layers of cathode that were deposited by the methods of examples 215 225 235 245 255 265 of the invention, the applicant has discovered that the upper limit on the voltage bias applied to the substrate is 350-400 W, for the particular process parameters of these examples of the invention.

[0265] FIGS. 2a and 2b show how the application of a bias voltage to the substrate on which the cathode layer is deposited may cause increased crystallinity of the deposited cathode layer, there being an inverse linear relationship between the power associated with the applied voltage and the crystallinity. The application of a bias voltage may also facilitate the deposition and/or growth of a higher energy phase structure, as will now be discussed. LiCoO.sub.2 can exist in at least two crystal structures, a lower energy crystal structure having a cubic or spinel structure and a higher energy crystal structure having a hexagonal structure. Higher energy crystal structures are more ordered than lower energy crystal structures, which often results in improved electrical properties for the higher energy crystal structure. Additionally, high energy crystal structures often form in layers, where the alkali metal ion is separated from its counter ion. This allows for alkali metal ions to intercalate and de-intercalate easily, which improves the capacity and ease of charging of the battery. An example of such a high energy crystal structure is LiCoO.sub.2 in the R3m space group, the benefits of which (compared to a less ordered, cubic structure) have previously been described. High-energy crystal structures normally require a large amount of heat applied to them, to overcome entropic and/or diffusion related barriers to their formation. In thin-film devices, a high energy crystal structure such as this is normally formed by an annealing step that occurs post deposition. For lithium containing compounds, this often requires heating the lithium-containing material to temperatures of about 400° C. in order to promote formation of the high energy crystal structure. This requires a lot of energy and exposes any other materials associated with the lithium-containing material, such as underlying substrates to such temperatures which may not be desirable.

[0266] FIG. 3 shows the X-ray diffractions peaks of the (003) reflection of LiCoO.sub.2 of the examples shown in FIG. 2a (the last 2 digits of the reference numeral indicating which example of FIG. 2a the diffraction peak belongs to). The presence of the (003) reflection peak indicates the presence of the hexagonal form of LiCoO.sub.2, which is a high-energy crystal structure. It is understood that the volume fraction of the high energy structure of LiCoO.sub.2 present in the layer of cathode that forms is positively correlated to the area under the reflection peak. Therefore, the layer of cathode formed through the present example 330 of the invention contains more high energy crystal structure than the layer of cathode of the other example 320 of the present invention, or that of the example where no voltage bias was applied to the substrate 310. The applicant has therefore discovered that it is possible to encourage the formation of a higher energy crystal structure by the application of a bias voltage.

[0267] FIG. 4 shows how the height of the (003) peak, and therefore the volume fraction of the higher energy crystal phase, varies with the power associated with the applied voltage. The plot follows a distinctive shape, indicating that the height of the (003) peak changes markedly over a relatively small range of power, in this case between about 400 W and 450 W. Below an estimated critical value of about 400-450 W, there is a relatively small amount of the higher energy crystal structure, and above that value, there is a relatively large amount of the higher energy crystal structure. Under different process conditions, for some examples (characterised examples of which are not shown here), the critical value is around 300 W or 350 W (or around 1.97 Wcm.sup.−2). It should be noted that some of the higher energy crystal structure is typically formed when a bias voltage is applied, even if the power associated with that bias voltage is lower than the critical value. Referring to FIG. 3, the height of a peak of one example 320 carried out with a voltage bias of 300 W, being slightly higher than that of another example 310 where no voltage bias was applied, shows that slightly more of the high energy crystal structure was formed in the example 320 carried out with a voltage bias of 300 W compared to the case where no voltage was applied. Therefore, even below the critical value, in the case where the critical value is the value at which substantially 50% of the volume of the layer of cathode is in the higher energy crystal structure, and substantially 50% of the volume of the layer of cathode is in the low energy crystal structure), the amount of high energy crystal structure that forms, although small, is higher than the amount that formed at lower voltage biases applied to the substrate, or where no voltage bias is applied at all.

[0268] A method of forming a layer of cathode optionally for a solid-state battery on a substrate, the layer of cathode comprising deposited material, the deposited material being capable of existing in a lower energy crystal structure and a higher energy crystal structure in accordance with a first example of the second aspect of the invention will now be described with reference to FIG. 5. The method, generally described by reference numeral 2001, comprises generating 2002 a plasma remote from one or more sputter targets, generating 2003 sputtered material from the target or targets using the plasma, and depositing 2004 the sputtered material on the substrate to which a bias voltage has been applied, thereby forming the layer of cathode, the layer of cathode comprising deposited material in the higher energy crystal structure.

[0269] An example of the method of the second aspect of the present invention may comprise any of the features described above in relation to examples of the method of the first aspect of the present invention. For example, the substrate, the deposited material, the lower energy crystal structure and the higher energy crystal structure may have the features described above in relation to the method of the first aspect of the present invention. As mentioned above in relation to the second and third examples of the first aspect of the present invention, the bias voltage may be applied to a support on which the substrate rests, or to the substrate itself.

[0270] As previously mentioned, the applicant has discovered that applying a voltage bias to the substrate is beneficial because it can increase crystallinity of the deposited substrate and can promote the formation of high energy crystal structures. FIG. 6 shows that an upper limit can exist in relation to the voltage bias applied to the substrate, above which unfavourable oxides can form. In the example of the invention characterised in FIG. 6, the working distance between target and the substrate is 14 cm. In examples where the material being sputtered is LiCoO.sub.2, the unfavourable oxide that may form may be Co(II)O. The upper limit is characterised by a scenario where a method substantially the same as the present invention (wherein the voltage bias applied to the substrate may be greater than any aforementioned upper limit) was used to deposit layers of cathode, which were characterised with X-ray diffraction. In this connection, FIG. 6 shows the FWHM (circles) and position of the (111) reflection (squares) as a function of the power associated with the voltage applied to the substrate. The position of the (111) reflection and the FWHM of the (111) reflection appear to change markedly when a power of more than 350 W is applied to the substrate. In this connection, above 350 W, the position of the (111) peak is lower than at or below 350 W, indicative of the formation of Co(II)O and Li.sub.2O. The increased FWHM above 350 W is also consistent with the formation of a film of Co(II)O and Li.sub.2O. Therefore FIG. 6 shows a clear transition 601 at a substrate power of between 350 W and 400 W, indicating that the upper limit of the power to be applied to the substrate is between 350 W and 400 W when the working distance between the target and the substrate is 14 cm.

[0271] The working distance in some examples of the invention is 9 cm. The working distance between the target 104 and the substrate 128 is shorter than the theoretical mean free path of the system.

[0272] In other examples, instead of the voltage being applied to charged plates proximal to the substrate, the roller 134 may have a voltage bias applied to it. In other examples, an RF voltage generation device may be configured to apply voltage directly to the substrate 128. In these, or further examples, the ratio of the power used to generate the plasma to the power associated with the bias on the target is greater than 1:1, and no more than 7:2. The power efficiency of the plasma generating source is taken to be 80%. The power associated with the bias on the target is 10 Wcm.sup.−2, or 100 Wcm.sup.−2. The power associated with the voltage bias applied to the substrate is for example 100 W, 300 W or 700 W. The power density associated with the bias on the substrate is for example 0.1 Wcm.sup.−2 or 2.3 Wcm.sup.−2. A normalised power density (i.e. that has been adjusted in view of one or more process parameters of the method, as previously described in this specification.) is used. In alternative examples of the invention, the working pressure of the system is, for example, 0.0020 mBar, 0.0050 mBar or 0.0065 mBar. The theoretical mean free path of the system is, for example 7.5 cm, 10 cm or 15 cm. The working distance between the target 104 and substrate 128 is 8.5 cm, 9.5 cm, or 14 cm.

[0273] A second example method of the first aspect of the invention uses the apparatus shown in FIG. 7a. The main differences between the apparatus of FIG. 1a and the apparatus of FIG. 7a will now be described. FIG. 7a shows that instead of the flexible substrate 128 presented in the first example, an inflexible planar glass substrate 728 is used. Furthermore, no shutter is present in this example. The thickness of the glass substrate is in the order of millimetres. A single target 704 is used. A thermal indicator sticker (not shown) was attached to the face of the glass substrate opposite to that on which the cathode material was deposited. The thermal indicator sticker is configured to indicate whether or not the substrate 728 experienced a temperature of 270° C. or more during the plasma deposition process. Substrate 728 is placed on a substrate stage 735, to which is applied a voltage bias supplied from RF generator 737. The voltage bias then passes from the substrate stage 735 to the substrate 728. After deposition, the sticker indicated that the substrate did not experience a temperature of 270° C. or more during the deposition process. The general shape of the plasma is indicated by the area enclosed by the broken line B′ in FIG. 7a.

[0274] A third example method of the first aspect of the invention uses the apparatus shown in FIG. 7b. The main differences between the apparatus of FIG. 7a and the apparatus of FIG. 7b will now be described. FIG. 7b shows that instead of the RF generator 737 applying the voltage bias to the substrate stage 735, the RF generator 737′ applies a voltage bias directly to the substrate 728′.

[0275] A method of forming a solid state battery half-cell in accordance with a first example of a third aspect of the invention will now be described with reference to FIG. 8. The method, generally described by reference numeral 3001, comprises forming 3002 a layer of cathode in accordance with the method of the first or second aspect of the present invention wherein the layer of cathode is a cathode layer, and depositing 3003 an electrolyte material suitable for a solid state battery cell on the cathode layer.

[0276] The material deposited for the electrolyte is lithium phosphorous oxy-nitride (LiPON). The method comprises generating a plasma remote from one or more targets comprising target material (such as Li.sub.3PO.sub.4); exposing the plasma target or targets to the plasma, thereby sputtering material from the target or targets, optionally in a reactive atmosphere comprising nitrogen, thereby forming LiPON on the battery cathode.

[0277] The LiPON is deposited in substantially the same way as the ABO.sub.2 materials in the examples of the first and second aspects of the invention, using a remotely-generated plasma. The target material used is Li.sub.3PO.sub.4, with deposition occurring in a reactive nitrogen atmosphere.

[0278] A step of depositing 3004 a current collecting material, in this case nickel, onto electrolyte material is also performed.

[0279] As an alternative to Li.sub.3PO.sub.4 the target assembly may include a number of targets, with distinct regions of lithium and/or phosphorous containing compounds, elemental lithium, or lithium oxide. The deposition additionally occurs in a reactive oxygen atmosphere. The electrolyte comprises a polymer, or another suitable electrolyte material. The method comprises depositing a polymer onto said battery cathode, or depositing a precursor onto said battery cathode and forming a polymer from the precursor.

[0280] An example of a method of forming a solid state battery cell in accordance with a fourth aspect of the invention will now be described with reference to FIG. 9. The method is denoted generally by reference numeral 4001 and comprises forming 4002 a cathodic half-cell in accordance with the third aspect of the present invention and, contacting 4003 anode material suitable for a solid state battery cell on the electrolyte material. The anode is deposited by a convenient method, such as remote plasma sputtering, magnetron sputtering, CVD etc. The anode material is a lithium alloy or a metal, such as lithium or copper.

[0281] An example of a method of making a solid-state battery in accordance with a fifth aspect of the invention will now be described with reference to FIG. 10. The method is denoted generally by reference numeral 5001 and comprises repeatedly forming 5002 a layer of cathode of a solid-state battery, depositing 5003 electrolyte material on the layer of cathode; and depositing 5004 anode material on the electrolyte material wherein at least one step of forming a layer of cathode of a solid-state battery comprises a method in accordance with the first or second aspect of the present invention.

[0282] An example of a substrate provided with a layer in made in accordance with the method of the first or second aspect of the present invention, in accordance with a sixth aspect of the present invention, shall now be described with reference to FIG. 11. Referring to FIG. 11, reference numeral 1128 is the substrate (in this case PEN) and reference numeral 1129 is the layer of cathode material made in accordance with examples of the method of the first or second aspect of the present invention.

[0283] An example of a substrate provided with a layer of cathode of a solid-state thin film device, the layer of cathode being made in accordance with the method of the first or second aspect of the present invention, in accordance with a seventh aspect of the present invention, wherein the layer of cathode is a cathode of a solid state battery, shall now be described with reference to FIG. 12. Referring to FIG. 12, reference numeral 1228 is the substrate and reference numeral 1229 is the layer of cathode material made in accordance with an example of the method of the first or second aspect of the present invention.

[0284] An example of a solid-state battery half-cell according to an eighth aspect of the invention so made according to an example of the third aspect of the invention is shown schematically in FIGS. 13a and 13b. Referring to FIG. 13a, which shows a battery cathode 1342 on a substrate 1328 (which in this example comprises a current collecting layer 1329). FIG. 13b additionally shows electrolyte 1344 deposited on top of the battery cathode 1342. The material deposited for the electrolyte 1344 is lithium phosphorous oxy-nitride (LiPON). In some examples, electrolyte 1344 also acts as a current collecting layer.

[0285] An example of a solid-state battery according to a tenth aspect of the invention so made according to an example of the fifth aspect of the invention is shown schematically in FIG. 14a. Referring to FIG. 14a, which shows 1428 and 1428′ are substrate materials 1428 1428′, current collecting layers 1429 1429′, cathode layer 1442 in this case, LiCoO.sub.2, and LiPON 1444, which acts as both electrolyte and anode Alternatively, in other examples, the current collector material acts as an anode material.

[0286] Alternatively, in a second example, a further anode material may be deposited. This is shown schematically in FIG. 14b. Referring to FIG. 14b, which shows the same components as FIG. 14a, and additionally shows an anode 1446. The schematics relating to examples of the solid state battery of the tenth aspect of the invention may equally be applicable to examples of the solid state battery cell of the ninth aspect of the invention.

[0287] An example of a method of forming a crystalline layer of cathode, optionally for a solid-state battery, on a substrate, in accordance with an eleventh aspect of the invention will now be described with reference to FIG. 15. The method is denoted generally by reference numeral 6001 and comprises repeatedly generating 6002 a plasma remote from one or more sputter targets, generating 6003 sputtered material from the target or targets using the plasma, and depositing 6004 the sputtered material on the substrate to which a bias voltage has been applied, thereby forming the crystalline layer, the power density associated with the bias voltage having been determined to provide the crystalline layer of a desired crystallinity.

[0288] The relationship between the power density and the desired crystallinity is not known, so the method comprises: generating a plasma remote from one or more sputter targets, sputtering material from the target or targets using the plasma, and depositing the sputtered material on a first portion of substrate to which a bias voltage has been applied, thereby forming a first crystalline layer, the first power density associated with the bias voltage producing the crystalline layer having a first crystallinity; and generating a plasma remote from one or more sputter targets, sputtering material from the target or targets using the plasma, and depositing the sputtered material on a second portion of substrate to which a bias voltage has been applied, thereby forming a second crystalline layer, the second power density associated with the bias producing the second crystalline layer having a second crystallinity, and based on the crystallinity of the first and second crystalline layers, determining a power density to provide a crystalline layer of the desired crystallinity.

[0289] The crystallinity is measured using Full Width at Half Maximum values obtained from one or more X-ray diffraction peaks, where the Full Width at Half Maximum values are normalised by de-convoluting any contribution from the X-ray diffraction apparatus (such as may result from finite beam width, detector imperfections etc.). In other examples absolute Full Width at Half maximum values are known, and the steps as described in the previous paragraph are not required.

[0290] An example of a method of determining a function which describes the crystallinity of a layer of cathode of material as a result of a change in voltage bias applied to a substrate during the deposition of said cathode material, on a substrate, in accordance with an twelfth aspect of the invention will now be described with reference to FIG. 16. The method is denoted generally by reference numeral 7001 and comprises repeatedly generating 7002 a plasma remote from one or more sputter targets, generating 7003 sputtered material from the target or targets using the plasma, and depositing 7004 the sputtered material on a first portion of substrate to which a bias voltage has been applied, thereby forming a first crystalline layer, the first power density associated with the bias voltage producing the crystalline layer having a first crystallinity; and, generating 7005 a plasma remote from one or more sputter targets, generating 7006 sputtered material from the target or targets using the plasma, and depositing 7007 the sputtered material on a second portion of substrate to which a bias voltage has been applied, thereby forming a second crystalline layer, the second power density associated with the bias producing the second crystalline layer having a second crystallinity, and based on the crystallinity of the first and second crystalline layers, determining 7008 a function which describes the relationship between the power density associated with the bias on the substrate and the crystallinity of the layer of cathode.

[0291] The function takes the form of a linear regression function. The function can be used to predict the value of voltage bias, or value of power density associated with the voltage bias on the substrate, required in order to form a layer of cathode with a desired degree of crystallinity or desired Full Width at Half Maximum value.

[0292] An example of a method of forming a crystalline layer of cathode, according to an example of a first or second aspect of the invention, in accordance with an thirteenth aspect of the invention, will now be described with reference to FIG. 17. The method is denoted generally by reference numeral 8001 and further includes the steps of selecting 8002 a desired degree of crystallinity, and using the method of the twelfth aspect of the invention to determine 8003 a voltage bias to be applied to the substrate such that the material forms with the desired crystallinity.

[0293] An example of a method of forming a crystalline layer of cathode optionally for a solid-state battery on a substrate, the crystalline layer comprising a deposited material, the deposited material being capable of existing in a lower energy crystal structure and a higher energy crystal structure, in accordance with an fourteenth aspect of the invention, will now be described with reference to FIG. 18. The method is denoted generally by reference numeral 9001 and comprises the steps of generating 9002 a plasma remote from one or more sputter targets, generating 9003 sputtered material from the target or targets using the plasma, and depositing 9004 the sputtered material on the substrate to which a bias voltage has been applied, thereby forming the crystalline layer, the power density associated with the bias voltage having been determined to provide the desired lower energy or higher energy crystal structure.

[0294] The method includes selecting the lower energy or higher energy crystal structure and based on said selection, determining the power density associated with the bias voltage required to provide the selected lower energy or higher energy crystal structure. The layer of cathode has substantially all of its volume being the high energy crystal structure.

[0295] The relationship between the power density and the crystal structure is not known, and the method additionally comprises depositing a first crystalline layer using a bias voltage associated with a first power density and determining the crystal structure of the first crystalline layer, and depositing a second crystalline layer using a bias voltage associated with a second power density and determining the crystal structure of the second crystalline layer, the second power density being different from the first power density, and based on the crystal structures of the first and second crystalline layers, determining a power density to provide a crystalline layer of the desired lower energy or higher energy crystal structure.

[0296] The method comprises generating a plasma remote from one or more sputter targets, sputtering material from the target or targets using the plasma, and depositing the sputtered material on a first portion of substrate to which a bias voltage has been applied, thereby forming a first crystalline layer, and determining the crystal structure of the first crystalline layer; and generating a plasma remote from one or more sputter targets, sputtering material from the target or targets using the plasma, and depositing the sputtered material on a second portion of substrate to which a bias voltage has been applied, thereby forming a second crystalline layer, and determining the structure of the second crystalline layer, and based on the structures of the first and second crystalline layers, determining a power density to provide the desired lower or higher energy crystal structure.

[0297] In other examples, the layer of cathode may have a volume of high energy crystal structure, and a volume of low energy crystal structure, where the layer cathode has a higher volume of high energy crystal structure than low energy crystal structure. In some examples, the ratio of the area under the first characteristic peak and the area under the second characteristic peak for the layer of cathode of material directly indicate the volume fraction of the high energy crystal structure in the layer of cathode. For example, in some examples the ratio being 3:1 indicates that 75% of the layer of cathode, by volume, is the high energy crystal structure.

[0298] An example of a method of determining a function which describes the phase distribution of a layer of cathode of material, which comprises a volume fraction of a high energy crystal structure and a volume fraction of a low energy crystal structure, as a result of a change in voltage bias applied to a substrate during the deposition of said cathode material in accordance with an fifteenth aspect of the invention, will now be described with reference to FIG. 19. The method is denoted generally by reference numeral 9101 and comprises the steps of generating 9102 a plasma remote from one or more sputter targets, generating 9103 sputtered material from the target or targets using the plasma, and depositing 9004 the sputtered material on a first portion of substrate to which a bias voltage has been applied, thereby forming a first crystalline layer, and determining the crystal structure of the first crystalline layer and generating 9104 a plasma remote from one or more sputter targets, generating 9105 sputtered material from the target or targets using the plasma, and depositing 9106 the sputtered material on a second portion of substrate to which a bias voltage has been applied, thereby forming a second crystalline layer, and determining 9107 the structure of the second crystalline layer and based on the structures of the first and second crystalline layers, determining 9108 a function which describes the relationship between the power density associated with the bias on the substrate and the volume fraction of the high energy crystal structure in the cathode layer.

[0299] The function may be used to predict the volume fraction high energy crystal structure will form for a proposed value of voltage bias.

[0300] In some examples the ratio of the area under the first characteristic peak and the area under the second characteristic peak is positively correlated to the volume fraction of the high-energy crystal structure in the layer of cathode, wherein the volume fraction of the high energy crystal structure present in the layer of cathode is higher than the volume fraction of the low energy crystal structure when the voltage bias on the substrate is above a critical value, and the method further comprises, initially: selecting a desired volume fraction of high energy crystal structure, and if the desired volume fraction of the high energy crystal structure is higher than half (i.e. higher than 50%), selecting a voltage bias higher than the critical value, and if the desired volume fraction of the high energy crystal structure is lower than half (i.e. lower than 50%), selecting a voltage bias lower than the critical value.

[0301] An example of a method of a method of forming a layer of cathode according to the first or second aspect of the invention, in accordance with a method of the sixteenth aspect of the invention, will now be described with reference to FIG. 20. The method is denoted generally by reference numeral 9201 and further comprises the steps of: selecting 9202 a desired volume fraction of high energy crystal structure to be present in the layer of cathode, using 9203 the method of the fifteenth aspect of the invention to determine a voltage bias to be applied to the substrate such that the material forms with the desired volume fraction of high energy crystal structure.

[0302] An example of a method of determining the power of a voltage bias at which a higher energy crystal structure would be present in a layer of cathode of material, will now be described with reference to FIG. 21. The method is denoted generally by reference numeral 9301 and comprises repeatedly performing 9302 steps (1), (2) and (3) until a voltage bias is found that results in the formation of the higher energy crystal structure, wherein Step 1 9303 comprises forming a layer of cathode according to the first aspect of the invention, Step 2 9304 comprises performing X-ray diffraction on the layer of cathode, to determine if the high energy crystal structure is present, and Step 3 9305 comprises adjusting the voltage bias to be applied to the substrate before returning to step 1.

[0303] Throughout the description, references are made to voltage biases applied to substrates, and power density associated with the voltage bias on a substrate. In many examples discussed in the detailed description, a substrate surface area of 177 cm.sup.−2 was used. Therefore, references to a voltage bias applied to a substrate in the detailed description implicitly refer to a power density associated with a voltage bias applied to a substrate that is the value of the voltage bias applied to the substrate divided by 177 cm.sup.−2. Where a reference is made to a power density associated with the voltage bias on a substrate, that passage of the description implicitly refers to a voltage bias applied to the substrate that is the value of the power density associated with the voltage bias of the substrate multiplied by 177 cm.sup.−2.

[0304] Throughout the description, reference is made to the voltage bias applied to a substrate. The measurement associated with the application of a voltage to the substrate is the electrical power applied to the substrate, and that is why the application as filed refers to power associated with the bias voltage.

[0305] Throughout the description, references are made to voltage biases applied to substrates. Voltage biases applied to substrates can refer to the case where a voltage bias is applied to the substrate itself directly (i.e. the power supply is directly applied to the substrate), or to a case where a voltage bias is applied to a indirectly, i.e. onto a platform on which the substrate sits, or is otherwise in close proximity to the substrate such that an electrical field is created for accelerating particles to the substrate.

[0306] The above examples are to be understood as illustrative examples of the invention. It is to be understood that any feature described in relation to any one example may be used alone, or in combination with other features described, and may also be used in combination with one or more features of any other of the examples, or any combination of any other of the examples. Where in the foregoing description, integers or elements are mentioned which have known, obvious or foreseeable equivalents, then such equivalents are herein incorporated as if individually set forth. It will also be appreciated by the reader that integers or features of the invention that are described as preferable, advantageous, convenient or the like are optional and do not limit the scope of the independent claims. Moreover, it is to be understood that such optional integers or features, whilst of possible benefit in some embodiments of the invention, may not be desirable, and may therefore be absent, in other embodiments. Equivalents and modifications not described above may also be employed without departing from the scope of the invention, which is defined in the accompanying claims.