MEMS resonator with co-located temperature sensor

Abstract

A microelectromechanical system (MEMS) resonator includes a substrate having a substantially planar surface and a resonant member having sidewalls disposed in a nominally perpendicular orientation with respect to the planar surface. Impurity dopant is introduced via the sidewalls of the resonant member such that a non-uniform dopant concentration profile is established along axis extending between the sidewalls parallel to the substrate surface and exhibits a relative minimum concentration in a middle region of the axis.

Claims

1. A semiconductor device comprising: a crystal silicon layer having first and second regions, the first region being doped in a manner not shared by the second region; a first microelectromechanical systems (MEMS) resonator having a first movable body formed from the first region; a second MEMS resonator having a second movable body formed from the second region; wherein the first movable body and the second movable body have respective first-order temperature coefficients of frequency that differ from one another due, at least in part, to the doping of the first region relative to the second region; and wherein the first region has a dopant concentration of at least 1E19/cm.sup.3 and the second region of the first silicon layer has less than 1E18/cm.sup.3 of the dopant concentration.

2. The semiconductor device of claim 1 wherein the semiconductor device further comprises a lid layer and one or more lateral walls, the lid layer and the one or more lateral walls enclosing the first movable body and the second movable body relative to the substrate, the lid layer having one or more oxide-release vents, and wherein the semiconductor device further comprises a material that plugs the one or more oxide-release vents so as to seal the first movable body and the second movable body relative to an environment external to the semiconductor device.

3. The semiconductor device of claim 1 wherein the semiconductor device further comprises circuitry to output a clock signal dependent on a resonance frequency of at least one of the first MEMS resonator and the second MEMS resonator.

4. The semiconductor device of claim 3 wherein the circuitry comprises at least one of a phase-locked loop (PLL) or a delay locked loop (DLL) or a digital frequency synthesizer to generate the clock signal.

5. The semiconductor device of claim 1 wherein the semiconductor device further comprises circuitry to generate a temperature-dependent signal dependent on a difference between a resonance frequency of the first MEMS resonator and a resonant frequency of the second MEMS resonator.

6. The semiconductor device of claim 5 wherein the semiconductor device further comprises circuitry to generate a clock signal dependent on at least one of the resonance frequency of the first MEMS resonator and the resonance frequency of the second MEMS resonator and circuitry to output a temperature-corrected clock signal dependent on the temperature-dependent signal.

7. The semiconductor device of claim 1 wherein: the crystal silicon layer is a single crystal silicon layer having a first crystalline axis; the first movable body has a longitudinal dimension that is coplanar with the first crystalline axis and extends at a first angle relative to the first crystalline axis; and the second movable body has a longitudinal dimension that is coplanar with the first crystalline axis and extends at a second angle relative to the first crystalline axis.

8. The semiconductor device of claim 7 wherein the respective first-order temperature coefficients of frequency differ from one another due, at least in part, to a difference between the first angle and the second angle.

9. The semiconductor device of claim 1 wherein the dopant is one of phosphorus, arsenic or antimony.

10. A semiconductor device comprising: a crystal silicon layer having first and second regions, the first region being doped in a manner not shared by the second region; a first microelectromechanical systems (MEMS) resonator having a first movable body formed from the first region; a second MEMS resonator having a second movable body formed from the second region; wherein the first movable body and the second movable body have respective first-order temperature coefficients of frequency that differ from one another due, at least in part, to the doping of the first region relative to the second region; and wherein the first movable body and the second movable body are each doped with the dopant at respective dopant concentrations that differ from each other by a factor of ten or more.

11. A semiconductor device comprising: a crystal silicon layer having first and second regions, the first region being doped in a manner not shared by the second region; a first microelectromechanical systems (MEMS) resonator having a first movable body formed from the first region; a second MEMS resonator having a second movable body formed from the second region; wherein the first movable body and the second movable body have respective first-order temperature coefficients of frequency that differ from one another due, at least in part, to the doping of the first region relative to the second region; and wherein the first movable body has a dopant concentration that is at least 10E21 per cubic centimeter, wherein the second movable body has a dopant concentration that no more than 10E18 per cubic centimeter, and wherein each of the first movable body and the second movable body are doped with one of phosphorus, arsenic or antimony.

12. A semiconductor device comprising: a crystal silicon layer having first and second regions, the first region being doped in a manner not shared by the second region; a first microelectromechanical systems (MEMS) resonator having a first movable body formed from the first region; a second MEMS resonator having a second movable body formed from the second region; wherein the first movable body and the second movable body have respective first-order temperature coefficients of frequency that differ from one another due, at least in part, to the doping of the first region relative to the second region; and wherein the first movable body is characterized by a first surface that is coplanar with the substrate, and a second surface that is not coplanar with the first surface, and wherein the first movable body is formed using a process that drives dopant into the first movable body via each of the first surface and the second surface, so as to establish a dopant profile that provides for declining dopant concentration as a function of distance within the first movable body from each of the first surface and the second surface.

13. A semiconductor device comprising: a crystal silicon layer having first and second regions, the first region having a dopant and the second region having a dopant, wherein the first region and the second region differ in at least one of a dopant type or a dopant concentration; a first microelectromechanical systems (MEMS) resonator having a first movable body formed from the first region; and a second MEMS resonator having a second movable body formed from the second region; wherein the first movable body and the second movable body have respective first-order temperature coefficients of frequency that differ from one another due, at least in part, to the doping of the first region relative to the second region; and wherein the first movable body has a dopant, at the dopant concentration that is at least 10E21 per cubic centimeter and wherein the second movable body also has the dopant, at a dopant concentration that no more than 10E18 per cubic centimeter.

14. The semiconductor device of claim 13 wherein: the crystal silicon layer is a single crystal silicon layer having a first crystalline axis; the first movable body has a longitudinal dimension that is coplanar with the first crystalline axis and extends at a first angle relative to the first crystalline axis; the second movable body has a longitudinal dimension that is coplanar with the first crystalline axis and extends at a second angle relative to the first crystalline axis; and the respective first-order temperature coefficients of frequency differ from one another due, at least in part, to a difference between the first angle and the second angle.

15. The semiconductor device of claim 13 wherein the first movable body is characterized by a first surface that is coplanar with the substrate, and a second surface that is not coplanar with the first surface, and wherein the first movable body is formed using a process that drives dopant into the first movable body via each of the first surface and the second surface, so as to establish a dopant profile that provides for declining dopant concentration as a function of distance within the first movable body from each of the first surface and the second surface.

16. The semiconductor device of claim 13 wherein the semiconductor device further comprises a lid layer and one or more lateral walls, the lid layer and the one or more lateral walls enclosing the first movable body and the second movable body relative to the substrate, the lid layer having one or more oxide-release vents, and wherein the semiconductor device further comprises a material that plugs the one or more oxide-release vents so as to seal the first movable body and the second movable body relative to an environment external to the semiconductor device.

17. The semiconductor device of claim 16 wherein the circuitry comprises clock generation circuitry and wherein the semiconductor device is to output a clock signal dependent on at least one of the first MEMS resonator and the second MEMS resonator.

18. The semiconductor device of claim 16 wherein the semiconductor device further comprises circuitry to generate a temperature-dependent signal dependent on a difference between a resonance frequency of the first MEMS resonator and a resonant frequency of the second MEMS resonator.

19. A method of fabricating a semiconductor device comprising: doping a crystal silicon layer having first and second regions in a manner such that the first region is doped in a manner not shared by the second region; forming a first microelectromechanical systems (MEMS) resonator having a first movable body, wherein the first movable body is formed from the first region; and forming a second MEMS resonator having a second movable body, wherein the second movable body is formed from the second region; wherein the first movable body and the second movable body have respective first-order temperature coefficients of frequency that differ from one another due, at least in part, to the doping of the first region relative to the second region; wherein forming the first MEMS resonator and forming the second MEMS resonator are performed such that the first region has a dopant concentration of at least 1E19/cm3 and the second region of the first silicon layer has less than 1E18/cm3 of the dopant concentration.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

(1) In the course of the detailed description to follow, reference will be made to the attached drawings. These drawings show different aspects of the present inventions and, where appropriate, reference numerals illustrating like structures, components, materials and/or devices in different figures are labeled similarly. It is understood that various combinations of the structures, components, and/or devices, other than those specifically shown, are contemplated and are within the scope of the present inventions.

(2) Moreover, there are many inventions described and illustrated herein. The present inventions are neither limited to any single aspect nor embodiment thereof, nor to any combinations and/or permutations of such aspects and/or embodiments. Moreover, each of the aspects of the present inventions, and/or embodiments thereof, may be employed alone or in combination with one or more of the other aspects of the present inventions and/or embodiments thereof. For the sake of brevity, certain permutations and combinations are not discussed and/or illustrated separately herein.

(3) FIG. 1 illustrates a block diagram representation of a microelectromechanical structures (for example, one or more gyroscopes, resonators and/or accelerometers) manufactured according to the present inventions;

(4) FIG. 2 illustrates a top view of an exemplary microelectromechanical structure according to certain aspects and embodiments of the present inventions wherein the exemplary microelectromechanical structure includes moveable members and stationary members (for example, drive and/or sense electrodes) or field areas (hereinafter, collectively, “stationary members”); notably, the present inventions are applicable to any microelectromechanical structure, including structures where it is advantageous and/or desirable to provide, manage and/or control the sensitivity of the temperature dependent characteristics of the microelectromechanical structure;

(5) FIGS. 3A-3F illustrate cross-sectional views of a portion of the exemplary microelectromechanical structure of FIG. 2 (along dotted line A-A) at various stages of manufacturing, in accordance with certain aspects and/or embodiments of the present inventions, wherein FIG. 3A illustrates a cross-sectional view of substrate prior to formation of the microelectromechanical structure (wherein in this exemplary illustration, the starting substrate may be a semiconductor-on-insulator), FIG. 3B illustrates a cross-sectional view of the microelectromechanical structure after definition or formation (using, for example, well-known lithographic and etching techniques), FIG. 3C illustrates the forming, depositing and/or growing a dopant carrier layer on the moveable or resonating members of the microelectromechanical structure, FIG. 3D illustrates transformation of the semiconductor material of the moveable or resonating members to a highly doped semiconductor material (for example, by transferring and/or driving in impurities from the dopant carrier layer to the semiconductor material of the moveable or resonating members via thermal annealing or heating), FIG. 3E illustrates the moveable or resonating member after removal of dopant carrier layer thereby providing moveable or resonating member comprising a semiconductor material having a high concentration of impurities (for example, a highly doped monocrystalline silicon), and FIG. 3F illustrates release of the moveable member of the microelectromechanical structure via removal of a sacrificial layer of the substrate, in accordance with certain aspects and/or embodiments of the present inventions;

(6) FIG. 4A illustrates a cross-sectional view, along dotted line A-A, of the exemplary microelectromechanical structure illustrated in FIG. 2 wherein the exemplary microelectromechanical structure is disposed in a cavity via thin-film encapsulation structure, in accordance with certain aspects and/or embodiments of the present inventions;

(7) FIG. 4B illustrates a cross-sectional view, along dotted line A-A, of the exemplary microelectromechanical structure illustrated in FIG. 2 wherein the exemplary microelectromechanical structure is sealed, for example, in a TO-8 “can” (or like structure) and/or in a cavity via a silicon glass substrate or wafer bonded to the microelectromechanical structure die or substrate, in accordance with certain aspects and/or embodiments of the present inventions;

(8) FIGS. 5A-5D illustrate cross-sectional views, along dotted line A-A of the exemplary microelectromechanical structure illustrated in FIG. 2, at various stages of manufacturing, in accordance with certain aspects and/or embodiments of the present inventions, wherein FIG. 5A illustrates a cross-sectional view of the microelectromechanical structure after transfer of impurities from the dopant carrier layer to the moveable or resonating members and prior to release of such members from the substrate (for example, according to the process illustrated in FIGS. 3A-3E, and the text associated therewith), and after providing or depositing a sacrificial layer on the microelectromechanical structure, FIG. 5B illustrates a cross-sectional view after forming, depositing, growing and/or providing an encapsulation layer on and/or over sacrificial layer and prior to release of the microelectromechanical structure from the substrate (via removal or etching of the sacrificial layer from around the microelectromechanical structure), and FIG. 5C illustrates a cross-sectional view after releasing of the microelectromechanical structure from the substrate wherein the sacrificial layers are removed or etched from around microelectromechanical structure thereby substantially or entirely releasing (vertically and horizontally) the moveable or resonating members of the microelectromechanical structure; in one embodiment, the vents are closed and the cavity sealed after releasing microelectromechanical structure, for example, via deposition forming, depositing, growing and/or providing another encapsulation layer (see FIG. 5D); notably, in one embodiment, vents (not illustrated in this series of figures) are formed in encapsulation layer wherein the sacrificial layer is removed around microelectromechanical structure, via the vents, using well known processing techniques;

(9) FIGS. 5E-5G illustrate cross-sectional views, along dotted line A-A of the exemplary microelectromechanical structure illustrated in FIG. 2, at various stages of manufacturing, in accordance with certain aspects and/or embodiments of the present inventions, wherein the dopant carrier layer is removed concurrently with sacrificial layers; FIG. 5E illustrates a cross-sectional view of the microelectromechanical structure after providing or depositing a sacrificial layer on the dopant transfer layer, FIG. 5F illustrates a cross-sectional view after releasing of the microelectromechanical structure from the substrate wherein the sacrificial layers and the dopant carrier layer are removed or etched thereby substantially or entirely releasing (vertically and horizontally) the moveable or resonating members of the microelectromechanical structure; in one embodiment, the vents are closed and the cavity sealed after releasing microelectromechanical structure, for example, via deposition forming, depositing, growing and/or providing another encapsulation layer (see FIG. 5G); again, the vents (not illustrated in this series of figures) may be formed in encapsulation layer and the sacrificial layer is removed or etched around microelectromechanical structure using well known processing techniques;

(10) FIGS. 6A-6D illustrate cross-sectional views of a portion of the exemplary microelectromechanical structure of FIG. 2 (along dotted line A-A) at various stages of manufacturing using a substrate of FIG. 3A and the microelectromechanical structure defined or formed as in FIG. 3B, in accordance with certain aspects and/or embodiments of the present inventions, wherein FIG. 6A illustrates the forming, depositing and/or growing a dopant carrier layer on the moveable or resonating members of the microelectromechanical structure, FIG. 6B illustrates transformation of a portion of the semiconductor material of the moveable or resonating members to a highly doped semiconductor material (for example, by transferring and/or driving in impurities from the dopant carrier layer to the semiconductor material of the moveable or resonating members via thermal annealing or heating) thereby providing a portion that is highly doped via transfer of dopants from the carrier layer and a portion that is substantially unaffected by the dopants from the carrier layer, FIG. 6C illustrates a cross-sectional view after removal of the dopant carrier layer from the moveable or resonating members of the microelectromechanical structure, and FIG. 6D illustrates the moveable member of the microelectromechanical structure after release from the substrate via removal of a sacrificial layer of the substrate, in accordance with certain aspects and/or embodiments of the present inventions;

(11) FIG. 7 illustrates a top view of an exemplary microelectromechanical structure according to certain aspects and embodiments of the present inventions wherein the exemplary microelectromechanical structure includes moveable members and stationary members (for example, drive and/or sense electrodes), and/or field area (as noted above, such features are collectively described hereinafter as “stationary members”); notably, a moveable member of the structure may be fabricated from a highly doped semiconductor (for example, silicon) having different gradients of doping than a different moveable members of the structure;

(12) FIG. 8 is a graphical illustration of a relationship of an impurity doping concentration in silicon versus temperature coefficient of frequency (TCF) for silicon, wherein the dashed arrows reflect potential changes in TCF due to changes in impurity concentrations within the material of the includes moveable or resonating members of an exemplary microelectromechanical structure;

(13) FIG. 9 illustrates a top view of an exemplary microelectromechanical structure according to certain aspects and embodiments of the present inventions wherein the exemplary microelectromechanical structure includes one or more moveable members fabricated from a highly doped semiconductor having a first doping density (of a first dopant type) and one or more moveable members having a doping density (of the first dopant type) which is different from the first doping density;

(14) FIGS. 10A-10D illustrate cross-sectional views of a portion of the exemplary microelectromechanical structure of FIG. 9 (along dotted line A-A) at various stages of manufacturing using a substrate of FIG. 3A and the microelectromechanical structure defined or formed as in FIG. 3B, in accordance with certain aspects and/or embodiments of the present inventions, wherein FIG. 10A illustrates the forming, depositing and/or growing a dopant carrier layer on the moveable or resonating members of the microelectromechanical structure and FIG. 10B illustrates transformation of a portion of the semiconductor material of the moveable or resonating members to a highly doped semiconductor material (for example, by transferring and/or driving in impurities from the dopant carrier layer to the semiconductor material of the moveable or resonating members, for example, via thermal annealing or heating) thereby providing moveable or resonating members having different doping concentrations, in accordance with certain aspects and/or embodiments of the present inventions, FIG. 10C illustrates a cross-sectional view after removal or etching of the dopant carrier layer from the moveable or resonating members of the microelectromechanical structure, and FIG. 10D illustrates the moveable member of the microelectromechanical structure after release from the substrate via removal of a sacrificial layer of the substrate, in accordance with certain aspects and/or embodiments of the present inventions;

(15) FIGS. 11A-11D illustrate cross-sectional views of a portion of the exemplary microelectromechanical structure of FIG. 2 (along dotted line A-A) at various stages of manufacturing using a substrate of FIG. 3A and the microelectromechanical structure defined or formed as in FIG. 3B, in accordance with certain aspects and/or embodiments of the present inventions, wherein FIG. 11A illustrates a cross-sectional view after releasing of the microelectromechanical structure from the substrate wherein the sacrificial layer is removed or etched thereby substantially or entirely releasing (vertically and horizontally) the moveable or resonating members of the microelectromechanical structure, FIG. 11B illustrates forming, depositing and/or growing a dopant carrier layer on the moveable or resonating members of the microelectromechanical structure, FIG. 11C illustrates transformation of a portion of the semiconductor material of the moveable or resonating members to a highly doped semiconductor material (for example, by transferring and/or driving in impurities from the dopant carrier layer to the semiconductor material of the moveable or resonating members via thermal annealing or heating) thereby providing a portion that is highly doped via transfer of dopants from the carrier layer and a portion that is substantially unaffected by the dopants from the carrier layer, and FIG. 11D illustrates a cross-sectional view after removal or etching of the dopant carrier layer from the moveable or resonating members of the microelectromechanical structure;

(16) FIG. 12A illustrates a MEMS device including one or more microelectromechanical structures (for example, one or more gyroscopes, resonators and/or accelerometers), manufactured in accordance with aspects and/or embodiments of the present inventions, and fabricated, manufactured or integrated on a die with a circuitry;

(17) FIG. 12B illustrates a MEMS device and thermistor having one or more micromachined thermistor structures (in accordance with aspects and/or embodiments of the inventions of Provisional Application Ser. No. 61/533,148, which is incorporated in its entirety herein by reference) fabricated, manufactured or integrated on a die with a circuitry, wherein the MEMS device is fabricated using the techniques/embodiments of the present inventions and the thermistor structures may be fabricated using or include any of the aspects and/or embodiments of the inventions of Provisional Application Ser. No. 61/533,148;

(18) FIG. 12C illustrates a MEMS device and circuitry (which may be related to, employed to operate and/or distinct from the MEMS device) disposed or integrated on a die, wherein the MEMS device is fabricated using the techniques/embodiments of the present inventions; notably, the integrated circuitry may be fabricated during, before and or after manufacture/fabrication of the MEMS device;

(19) FIG. 12D illustrates a die containing a MEMS device, a thermistor having one or more micromachined thermistor structures (as described above) and integrated circuitry (as described above);

(20) FIGS. 12E and 12F illustrate a die containing a MEMS device and a temperature sensing diode;

(21) FIG. 13 illustrates a cross-sectional view of an exemplary microelectromechanical structure wherein the exemplary microelectromechanical structure is disposed in a cavity via thin-film encapsulation structure and a temperature sensing diode is disposed in field region which is laterally displaced from the microelectromechanical structure (see, for example, FIGS. 12E and 12F), in accordance with certain aspects and/or embodiments of the present inventions;

(22) FIGS. 14A and 14B illustrate cross-sectional views of a portion of the exemplary microelectromechanical structure of FIG. 2 (along dotted line A-A) at various stages of manufacturing using a substrate of FIG. 3A and the microelectromechanical structure defined or formed as in FIG. 3B, in accordance with certain aspects and/or embodiments of the present inventions, wherein FIG. 14A illustrates transformation of a portion of the semiconductor material of the moveable or resonating members to a highly doped semiconductor material (for example, by transferring and/or driving in impurities from the dopant carrier layer to the semiconductor material of the moveable or resonating members, for example, via thermal annealing or heating) thereby providing a portion that is highly doped via transfer of dopants from the carrier layer and a portion that is substantially unaffected by the dopants from the carrier layer, and FIG. 14B illustrates the moveable or resonating member after removal of dopant carrier layer and release of the moveable member of the microelectromechanical structure via removal of a sacrificial layer of the substrate, wherein the removal of the dopant carrier layer and release of the moveable or resonating members are performed substantially concurrently using the substantially the same process and etch materials, in accordance with certain aspects and/or embodiments of the present inventions;

(23) FIGS. 15A-15D illustrate cross-sectional views of a portion of the exemplary microelectromechanical structure of FIG. 2 (along dotted line A-A) at various stages of manufacturing using a substrate of FIG. 3A, in accordance with certain aspects and/or embodiments of the present inventions, wherein FIG. 15A illustrates a cross-sectional view of the microelectromechanical structure after definition or formation (using, for example, well-known lithographic and etching techniques—see, for example, FIG. 3B) and forming, depositing and/or growing a dopant carrier layer on the moveable or resonating members of the microelectromechanical structure, FIG. 15B illustrates impurity dopant of the dopant carrier layer at the surface of the moveable members after removal of the dopant carrier layer but before the dopant is driven from the surface of the moveable members into substantial portions of the semiconductor material of the moveable members via, for example, thermally annealing and/or heating and thereby substantially increasing the doping concentrations of a significant portion of the semiconductor material of the moveable members, FIG. 15C illustrates transformation of the semiconductor material of the moveable or resonating members to a highly doped semiconductor material (for example, by transferring and/or driving-in the dopant impurities from the surface of the semiconductor material of the moveable members, and FIG. 15D illustrates release of the moveable member of the microelectromechanical structure via removal of a sacrificial layer of the substrate, in accordance with certain aspects and/or embodiments of the present inventions;

(24) FIG. 16 illustrates a top view of an exemplary microelectromechanical structure according to certain aspects and embodiments of the present inventions wherein the exemplary microelectromechanical structure includes moveable or resonating members and stationary members (for example, drive and/or sense electrodes) or field areas (hereinafter, collectively, “stationary members”) and wherein the moveable members includes one or more slots therein to, for example, provide for more thorough doping of the moveable or reasoning members; and

(25) FIGS. 17A-17E illustrate cross-sectional views of a portion of the exemplary microelectromechanical structure of FIG. 2 (along dotted line A-A) at various stages of manufacturing using a substrate of FIG. 3A, in accordance with certain aspects and/or embodiments of the present inventions, wherein FIG. 17A illustrates a cross-sectional view of the microelectromechanical structure after definition or formation (using, for example, well-known lithographic and etching techniques), FIG. 17B illustrates the forming, depositing and/or growing a dopant carrier layer on the moveable or resonating members of the microelectromechanical structure, FIG. 17C illustrates transformation of the semiconductor material of the moveable or resonating members to a highly doped semiconductor material (for example, by transferring and/or driving in impurities from the dopant carrier layer to the semiconductor material of the moveable or resonating members via thermal annealing or heating), FIG. 17D illustrates the moveable or resonating member after removal of dopant carrier layer thereby providing moveable or resonating member comprising a semiconductor material having a high concentration of impurities (for example, a highly doped monocrystalline silicon), and FIG. 17E illustrates release of the moveable member of the microelectromechanical structure via removal of a sacrificial layer of the substrate, in accordance with certain aspects and/or embodiments of the present inventions;

(26) FIG. 18 illustrates a top view of an exemplary microelectromechanical structure according to certain aspects and embodiments of the present inventions wherein the exemplary microelectromechanical structure includes one or more moveable members fabricated from highly doped semiconductor, wherein one or more of the moveable members include a first portion having a first width and first doping density and a second portion having a second width and a second doping density;

(27) FIG. 19A illustrate cross-sectional view, along dotted line A-A, of a portion of the exemplary microelectromechanical structure of FIG. 18 (in particular, the first portion of the moveable member having the first width and the first doping density) after manufacturing in accordance with, for example, any of the processes described herein;

(28) FIG. 19B illustrate cross-sectional view, along dotted line B-B, of a portion of the exemplary microelectromechanical structure of FIG. 18 (in particular, the second portion of the moveable member having the second width and the second doping density) after manufacturing in accordance with, for example, any of the processes described herein;

(29) FIGS. 20A-20F illustrate cross-sectional views of a portion of the exemplary microelectromechanical structure of FIG. 2 (along dotted line A-A) at various stages of manufacturing, in accordance with certain aspects and/or embodiments of the present inventions, wherein FIG. 20A illustrates a cross-sectional view of substrate prior to formation of the microelectromechanical structure (wherein in this exemplary illustration, the starting substrate may be a semiconductor-on-insulator) wherein the active substrate includes a first, background and/or initial doping concentration, FIG. 20B illustrates a cross-sectional view of the microelectromechanical structure after definition or formation (using, for example, well-known lithographic and etching techniques), FIG. 20C illustrates the forming, depositing and/or growing an impurity removal or absorption layer on the moveable or resonating members of the microelectromechanical structure, FIG. 20D illustrates transformation of the semiconductor material of the moveable or resonating members by removing impurities from the semiconductor material (for example, via thermal annealing or heating), FIG. 20E illustrates the moveable or resonating member after removal of impurity removal layer thereby providing moveable or resonating member comprising a semiconductor material having a high concentration of impurities (for example, a highly doped monocrystalline silicon), and FIG. 20F illustrates release of the moveable member of the microelectromechanical structure via removal of a sacrificial layer of the substrate, in accordance with certain aspects and/or embodiments of the present inventions;

(30) FIGS. 21A-21E illustrate cross-sectional views of an exemplary process sequence that dopes the structure 16 in a vertically symmetrical way; and

(31) FIGS. 22A-22D illustrate cross-sectional views of another exemplary process sequence that dopes the structure 16 in a vertically symmetrical way; notably, there may be benefits to keeping the structure 16 symmetrical; that is, with the same or similar dopant concentration profiles at the top and the bottom of structure 16; for instance doing this may balance the stress on the structure that may be associated with the doping, and thereby help keep the structure from warping up or down.

(32) Again, there are many inventions described and illustrated herein. The present inventions are neither limited to any single aspect nor embodiment thereof, nor to any combinations and/or permutations of such aspects and/or embodiments. Each of the aspects of the present inventions, and/or embodiments thereof, may be employed alone or in combination with one or more of the other aspects of the present inventions and/or embodiments thereof. For the sake of brevity, many of those combinations and permutations are not discussed separately herein.

DETAILED DESCRIPTION

(33) At the outset, it should be noted that there are many inventions described and illustrated herein. The present inventions are neither limited to any single aspect nor embodiment thereof, nor to any combinations and/or permutations of such aspects and/or embodiments. Moreover, each of the aspects of the present inventions, and/or embodiments thereof, may be employed alone or in combination with one or more of the other aspects of the present inventions and/or embodiments thereof. For the sake of brevity, many of those permutations and combinations will not be discussed separately herein.

(34) Further, in the course of describing and illustrating the present inventions, various architectures, structures, components, functions and/or elements, as well as combinations and/or permutations thereof, are set forth. It should be understood that architectures, structures, components, functions and/or elements other than those specifically described and illustrated, are contemplated and are within the scope of the present inventions, as well as combinations and/or permutations thereof.

(35) With that in mind, in one aspect, the present inventions are directed to a method of manufacturing a microelectromechanical structure having one or more moveable or resonating members. The method of manufacture fabricates moveable or resonating members from a substrate (for example, monocrystalline silicon) having a first dopant concentration, using, for example, conventional lithographic and etching techniques. After formation of one or more of the moveable or resonating members, the method of the present inventions deposits, forms, grows and/or provides a dopant carrier layer on the moveable or resonating members. The dopant carrier layer includes n-type or p-type impurities to be incorporated into the material of the moveable or resonating members to substantially increase the impurity doping concentrations of the material of the moveable or resonating members by at least one order of magnitude. In this way, the sensitivity of temperature dependent characteristics of the one or more moveable or resonating members of the microelectromechanical structure is/are reduced, controlled and/or maintained within a predetermined range.

(36) The present inventions may employ any impurity dopant to provide a highly doped semiconductor material of the moveable or resonating members. For example, in one embodiment, the dopant provides excessive n-type carriers in the moveable or resonating members (for example, one or more elements of Group 15 of the periodic table—such as phosphorous, arsenic and/or antimony). In another embodiment, the dopant provides excessive p-type carriers in the moveable or resonating members (for example, one or more elements of Group 13 of the periodic table—such as boron, gallium and/or indium).

(37) The impurity dopant in the dopant carrier layer, during and/or after depositing, forming, growing and/or providing the dopant carrier layer on the moveable or resonating members, is transferred from the dopant carrier layer and to the semiconductor material (for example, monocrystalline silicon) of the moveable or resonating members. In one embodiment, after the dopant carrier layer is deposited on the semiconductor material of the moveable or resonating members, the dopant in the carrier layer is transferred into the semiconductor material of the moveable or resonating members, via thermally annealing and/or heating, to substantially increase the doping concentrations of the semiconductor material of the moveable or resonating members and thereby reduce and/or control the sensitivity of the temperature dependent characteristics of the one or more moveable or resonating members of the microelectromechanical structure. For example, in one embodiment, where the semiconductor material of the moveable or resonating members is formed from monocrystalline silicon and includes an initial n-type impurity concentration of about 10.sup.13 cm.sup.−3, the present inventions increase the n-type impurity concentration of the monocrystalline silicon of significant portions of the one or more moveable or resonating members to greater than 10.sup.15 cm.sup.−3 (and preferably, between 10.sup.15 cm.sup.−3 and 10.sup.21 cm.sup.−3), and more preferably, to greater than 10.sup.19 cm.sup.−3 (and preferably, between 10.sup.19 cm.sup.−3 and 10.sup.21 cm.sup.−3). Indeed, in yet another embodiment, where the semiconductor material of the moveable or resonating members is formed from monocrystalline silicon and includes an initial n-type impurity concentration of about 10.sup.19 cm.sup.−3, the present inventions increase the n-type impurity concentration of the monocrystalline silicon of the one or more moveable or resonating members to greater than 6×10.sup.19 cm.sup.−3, and preferably between 10.sup.20 cm.sup.−3 and 10.sup.21 cm.sup.−3 (i.e., between one-half and two orders of magnitude).

(38) Of course, the aforementioned impurity concentrations are exemplary and the maximum concentration may exceed 10.sup.21 cm.sup.−3. The concentration may even be at or above the solid-solubility limit. If it is above the solid-solubility limit the dopant may form precipitates, which may be an acceptable condition. The discussion herein of a preferable dopant range does not preclude higher levels. Indeed, if higher levels are found to be advantageous they can be formed as described herein. Values provided here should not be considered limiting to the fabrication processes described here but only exemplary of the values that are presently known to be advantageous. Any concentrations and especially high concentrations of dopant, weather now known to be useful or later determined to be so are considered within the scope of this work. Notably, in another exemplary embodiment, after depositing the dopant carrier layer on the moveable or resonating members—but before the dopant is driven into significant portions of the semiconductor material of the moveable or resonating members, the dopant carrier layer is removed from the moveable or resonating members. In this embodiment, the dopant is driven into the semiconductor material of the moveable or resonating members during or after removal of the dopant carrier layer, for example, via thermally annealing and/or heating. In this way, the doping concentrations of a significant portion of the semiconductor material of the moveable or resonating members are substantially increased. Here, the dopant from the dopant carrier layer is transferred to the exposed surface of the semiconductor material of the moveable or resonating members during deposition of the dopant carrier layer—and, after removal of the dopant carrier layer, the dopant which is substantially at the surface of the semiconductor material of the moveable or resonating members is driven deeper into the semiconductor material of the moveable or resonating members (via, for example, thermally annealing and/or heating) to thereby reduce and/or control the sensitivity of the temperature dependent characteristics of the one or more moveable or resonating members of the microelectromechanical structure.

(39) With reference to FIGS. 1 and 2, in one embodiment, MEMS device 10 includes microelectromechanical structure 12 which is fabricated or formed in and/or on from substrate 14, for example, a semiconductor on insulator (SOI) substrate (for example, silicon or germanium region/layer/material disposed on or over an insulator region/layer/material (for example, a silicon oxide, silicon nitride and/or combination thereof)) or silicon, (for example, a standard bulk silicon), silicon-germanium, gallium-arsenide. The microelectromechanical structure 12 may include one or more moveable or resonating members and one or more stationary members (for example, drive and/or sense electrodes) and/or field areas (as noted above, such features are collectively described hereinafter as “stationary members”). In this illustrated exemplary embodiment, microelectromechanical structure 12 includes two moveable or resonating members 16 (which are illustrated as moving in-plane—see D) and a plurality of stationary members 18a and 18b (for example sense and/or drive electrodes) to induce and/or sense the motion of moveable or resonating members 16. It should be noted that microelectromechanical structure 12 may include any shape, architecture and/or configuration now known or later developed.

(40) Note that the structure may be a resonator and may be another mechanical or electrical component. Indeed, the structure may be a gyroscope, an accelerometer, a pressure sensor, a microphone, a light sensor, or any of a wide range of devices.

(41) With reference to FIGS. 3A and 3B, the manufacture of microelectromechanical structure 12, in one exemplary embodiment, includes forming or fabricating moveable or resonating member 16 from a semiconductor on insulator (SOI) substrate 14 having a silicon layer 14c disposed on an insulating or sacrificial layer 14b, which is disposed on a “handle” layer 14a (for example, silicon). In this exemplary embodiment, silicon layer 14c may be monocrystalline silicon having a first concentration of n-type impurities (for example, an n-type impurity concentration of about 10.sup.13 cm.sup.−3). The moveable or resonating member 16 may be formed or fabricated in substrate 14c using conventional lithographic and etching techniques (see channels 20 which defines the moveable or resonating member 16). Indeed, any technique, now known or later developed, may be employed to form or fabricate moveable or resonating member 16 and stationary members 18.

(42) After initially defining or forming one or more of the moveable or resonating members (and, in this exemplary embodiment, the stationary members 18), with reference to FIG. 3C, the method of the present inventions deposits, forms, grows and/or provides dopant carrier layer 22 on moveable or resonating members 16. The dopant carrier layer 22 includes one or more dopants and/or dopant types (n-type or p-type impurities) which are to be incorporated into moveable or resonating members 16. In this exemplary embodiment, dopant carrier layer 22 may be phosphorus oxychloride (POCl.sub.3) which is employed as a source of phosphorus (an n-type impurity) to increase the concentration of dopant or impurities in the material of moveable or resonating members 16.

(43) In another embodiment, phosphorus doped silicon glass, PSG, or phosphorus doped spin on glass, SOG may be employed to form carrier layer 22. Similarly, analogs of these with other doping types may be possible.

(44) The carrier layer 22 may or may not fill the trenches and bridge the gaps. When the thickness of carrier layer 22 is large compared to the trench or gap with, as it often is with SOG, then the carrier layer 22 may tend to fill the trenches.

(45) In another embodiment, dopant carrier layer 22 may be a boron doped glass (for example, BSG) which may also be employed as a phosphorus source to increase the amount of dopant in the material of moveable or resonating members 16. In yet another embodiment, the dopant source in the dopant carrier layer 22 may include arsenic—for example, indium arsenide, gallium arsenide, aluminum arsenide or combinations thereof (for example, indium gallium arsenide). Indeed, dopant carrier layer 22 may include any material having one or more dopants and/or dopant types (n-type or p-type impurities) which, during and/or after deposition on the moveable or resonating members 16 is transferred (concurrently or subsequently to layer formation) to the material of moveable or resonating members 16.

(46) With reference to FIG. 3D, during and/or after providing, depositing, forming and/or growing dopant carrier layer 22 on moveable or resonating members 16, the dopants in dopant carrier layer 22 is transferred to or driven into moveable or resonating members 16 (which after transfer or drive-in portions are identified as 16″ to reflect or indicate an increase in concentration of dopant within such portion of the material of members 16). In one embodiment, thermally annealing or heating is employed to induce the transfer of the n-type or p-type impurities. For example, where dopant carrier layer 22 is POCl.sub.3 and the material of moveable or resonating members 16 is silicon, the phosphorous in the POCl.sub.3 dopant carrier layer 22 is transferred from layer 22 to the material of moveable or resonating members 16 thereby increasing the concentration of n-type dopants by one or more orders of magnitude (and preferably, 2-8 orders of magnitude, and more preferably, 6-8 order of magnitude) of the concentration of n-type dopants in the material of moveable or resonating members 16. Indeed, where the base or initial impurity concentration of the material of moveable or resonating members 16 includes an initial n-type impurity concentration of about 10.sup.19 cm.sup.−3, the increase of the concentration of n-type impurity dopants may be between one-half and two orders of magnitude.

(47) The thickness of the dopant carrier layer 22 may be selected based on, among other things, the amount of dopant to be introduced into the material of moveable or resonating members 16, the transfer or driven processes and/or parameters (for example, the amount of time, atmosphere and/or temperature employed to drive in or transfer the dopant from the carrier layer 22 to the material of moveable or resonating members 16), certain material and structural parameters of moveable or resonating members 16 (for example, the type of material and the height, width and length of the moveable or resonating members 16), and/or the desired temperature dependent characteristics of the one or more moveable or resonating members of the microelectromechanical structure (for example, temperature coefficient of frequency (TCF) of such moveable or resonating members). Indeed, in one embodiment, the concentration of impurities in the material of the moveable or resonating members and/or gradients of such concentrations within the members are/is defined to provide one or more predetermined temperature dependent characteristics of the one or more moveable or resonating members (for example, TCF).

(48) It should be noted that the amount of dopant driven into the structure from carrier layer 22 may be limited and/or controlled by the density of the dopant in carrier layer 22 and/or by the thickness of the carrier layer 22, and/or by other properties of the material of carrier layer 22. The amount of dopant driven into structure 16 may also be limited and or controlled by the time and temperature of the drive-in step and by the material of structure 16. By selecting the limit or control of delivered dopant with one or more of these factors, or in other ways, may lead to more predictable manufacturing or product specification. With these techniques the doping density may be optimized.

(49) In one embodiment, where the height of the moveable or resonating member 16 is about 18 μm, dopant carrier layer 22 of POCl.sub.3 may include a thickness of about 90 nm. With reference to FIG. 3E, after transfer of the impurities or dopants from dopant carrier layer 22 to portions 16″ of moveable or resonating members 16, in one embodiment, dopant carrier layer 22 is removed, using, for example, conventional removal techniques—for example, a wet etch process. Concurrently with the removal of the dopant carrier layer, or after such removal, moveable or resonating member 16 may be released (vertically and/or horizontally) from substrate 14 via removal of insulating or sacrificial layer 14b. (See, FIG. 3F).

(50) In another embodiment, the height of moveable or resonator member 16 is about 10 μm the POCl.sub.3 carrier layer 22 of may include a thickness of about 50 nm. In some applications the thickness of carrier layer 22 may be thinner or thicker, e.g. nanometers to microns.

(51) Notably, microelectromechanical structure 12 (or selected portions thereof—for example, portions 16″ of moveable or resonating members 16) may be sealed or encapsulated in a chamber—thereby protecting microelectromechanical structure 12 from the external environment and/or controlling the environment/conditions (for example, pressure) in which microelectromechanical structure 12 operates/resides. Indeed, prior to, during and/or after sealing the chamber, the environment within the chamber may be defined, for example, via materials and processing techniques that provide predetermined characteristics of the environment in the chamber, for example, predetermined pressure and/or fluid (for example, an inert gas or anti-stiction fluid). (See, for example, U.S. Pat. Nos. 6,930,367, 7,449,355 and 7,514,283). The environment within the chamber may be defined using any technique now known or later developed.

(52) In one embodiment, microelectromechanical structure 12 may be sealed in a cavity via thin-film encapsulation process and structure. (See FIG. 5A). Briefly, in one exemplary embodiment, after transfer of impurities or dopants from dopant carrier layer 22 to portions 16″ of moveable or resonating members 16 and removal of dopant carrier layer 22 using, for example, a wet etch technique (see, for example, the processes of FIGS. 3A-3E, and the text associated therewith—which, for the sake of brevity, will not be repeated here), a process of fabricating a thin-film encapsulation structure may start with depositing or providing sacrificial layer 24 over microelectromechanical structure 12 (see FIG. 5A). Thereafter, encapsulation layer 26 is provided, for example, formed, deposited and/or grown (see FIG. 5B). Vents (not illustrated in this series of figures) may then be formed in encapsulation layer 26 and sacrificial layers 24 and 14b are removed or etched around moveable or resonating members 16 of microelectromechanical structure 12 (for example, using a vapor etch technique) thereby substantially or entirely releasing (vertically and horizontally) moveable or resonating members 16. (See FIG. 5C). After releasing moveable or resonating members 16, in one embodiment, the vents may be closed and the cavity sealed via another deposition of a layer 28. (See FIG. 5D). A detailed discussion of an exemplary thin film encapsulation technique is described and illustrated in U.S. Pat. Nos. 6,936,491, 7,075,160, and 7,514,283. Notably, the microelectromechanical structure 12 may be sealed or encapsulated using any technique now known or later developed. In one embodiment, the vents may be sealed via attaching a die, wafer or glass substrate (which may include other structures or integrated circuitry thereon) to encapsulation layer 26.

(53) In another exemplary embodiment, the process of fabricating a thin-film encapsulation structure may start with depositing or providing sacrificial layer 24 over microelectromechanical structure 12 prior to removal of dopant carrier layer 22. (See FIG. 5F). Here, before or during depositing or providing sacrificial layer 24 over microelectromechanical structure 12, the impurities or dopants of dopant carrier layer 22 are transferred to portions 16″ of moveable or resonating members 16. After encapsulation layer 26 is provided, for example, formed, deposited and/or grown (see FIG. 5F), vents (not illustrated in this series of figures) may then be formed therein and the dopant carrier layer 22 may be concurrently removed with the release of the moveable or resonating member 16, via etching of sacrificial layer 24, dopant carrier layer 22 and sacrificial layer 14b. (See, FIG. 5F). Here, dopant carrier layer 22 is removed substantially concurrently with the release of the moveable or resonating member 16, via etching of sacrificial layers 24 and 14b. (See, FIG. 5G).

(54) In one embodiment, the microelectromechanical structure is unsealed or not encapsulated and thereby directly exposed to the external atmosphere/environment. Indeed, in those embodiments where the microelectromechanical structure is unsealed or not encapsulated, it may be advantageous to include a passivation layer on selected portions of the microelectromechanical structure. In one embodiment, the passivation layer is a silicon oxide and/or a silicon nitride material which is deposited or thermally grown. Such a passivation layer may improve long term stability of the microelectromechanical structure wherein the relationship between temperature and resistance is more stable over the life of the microelectromechanical structure.

(55) In another embodiment, microelectromechanical structure 12 may be sealed, for example, in a TO-8 “can” (or like structure) and/or in a cavity via a wafer or glass substrate 30 bonded to the MEMS device die or substrate. (See, FIG. 4B). In this regard, microelectromechanical structure 12 may be sealed in a chamber, for example, a hermetically sealed metal container (see, for example, U.S. Pat. No. 6,307,815) or bonded to a semiconductor, metal or glass-like substrate having a chamber to house, accommodate or cover microelectromechanical structure 12 (see, for example, U.S. Pat. Nos. 6,146,917, 6,352,935, 6,477,901, and 6,507,082). In the context of the hermetically sealed metal container, the substrate on, or in which, the resistive structure would reside may be disposed in and affixed to the metal container. The hermetically sealed metal container typically serves as a primary package as well.

(56) Notably, as intimated above, after or during sealing of the chamber, an anti-stiction fluid may be incorporated into the chamber. (See, for example, U.S. Pat. Nos. 6,930,367 and 7,449,355). In this way, the anti-stiction characteristics of the moveable or resonating members of the microelectromechanical structure 12 may be enhanced.

(57) In one embodiment, a manufacturing process in accordance with the present invention provides an impurity concentration gradient within the material of the moveable or resonating members of the microelectromechanical structure. For example, in one embodiment, the impurity concentration gradient is greater than one order of magnitude from an exposed portion of the moveable or resonating members to a more inner or core portion thereof; in other embodiments the impurity concentration gradient is greater than two and three orders of magnitude. In this regard, the impurity concentration gradient within the material of the moveable or resonating members is substantial.

(58) With reference to FIGS. 6A-6D, in one embodiment, after formation of the moveable or resonating members of the microelectromechanical structure, dopant carrier layer 22 is deposited, formed, grown and/or provided on the moveable or resonating members 16 (and, in this embodiment, on stationary members 18a and 18b as well—although such regions may be masked if desired). Here again, dopant carrier layer 22 may include n-type or p-type impurities to be incorporated into the material of moveable or resonating members 16 to substantially increase the impurity doping concentrations of the material of moveable or resonating members 16 by at least one order of magnitude.

(59) During and/or after depositing, forming, growing and/or providing the dopant carrier layer on moveable or resonating members 16, the impurity dopant in dopant carrier layer 22 is transferred to the semiconductor material (for example, monocrystalline silicon) of moveable or resonating members 16. In one embodiment, dopant in carrier layer 22 is transferred into the semiconductor material of moveable or resonating member via thermally annealing and/or heating. (See, for example, FIG. 6B). In this embodiment, the concentration of impurities in portion 16″ of moveable or resonating member is substantially greater than in portion 16′ of the moveable or resonating member. As such, in this embodiment, the impurity concentration gradient within the material of the moveable or resonating member is substantial (greater than or equal to one or more of magnitude). For example, where the semiconductor material of the moveable or resonating members is formed from monocrystalline silicon and includes an initial n-type impurity concentration of about 10.sup.13 cm.sup.−3, in one embodiment, after thermal annealing or drive-in, the n-type impurity concentration of the monocrystalline silicon of portion 16″ of moveable or resonating member is greater than 10.sup.19 cm.sup.−3 (and preferably, between 10.sup.19 cm.sup.−3 and 10.sup.21 cm.sup.−3) and the n-type impurity concentration of the monocrystalline silicon of portion 16′ is less than 10.sup.18 cm.sup.−3 (and, in another embodiment, is less than 10.sup.17 cm.sup.−3 or 10.sup.16 cm.sup.−3). In another exemplary embodiment, where the semiconductor material of the moveable or resonating members is formed from monocrystalline silicon and includes an initial n-type impurity concentration of about 10.sup.19 cm.sup.−3, after thermal annealing or drive-in, the n-type impurity concentration of the monocrystalline silicon of portion 16″ of moveable or resonating member is greater than 10.sup.20 cm.sup.−3 (and preferably, between 10.sup.20 cm.sup.−3 and 10.sup.21 cm.sup.−3) and the n-type impurity concentration of the monocrystalline silicon of portion 16′ is less than 10.sup.20 cm.sup.−3. (and preferably, between 10.sup.19 cm.sup.−3 and 10.sup.20 cm.sup.−3).

(60) As in the previous embodiment, dopant carrier layer 22 may be removed before or concurrently with release of moveable or resonating members 16. (See, FIGS. 6C and 6D). For the sake of brevity that discussion will not be repeated in detail.

(61) Notably, the impurity concentration gradient (for example, phosphorous, boron or arsenic) in the moveable or resonating members may be determined based on, among other things, the thickness of the dopant carrier layer, the concentration of dopant in the carrier layer to be introduced into the material of moveable or resonating members, the transfer or driven processes and/or parameters (for example, the amount of time, atmosphere and/or temperature employed to drive in or transfer the dopant from the carrier layer to the material of moveable or resonating members), certain base material and structural parameters of moveable or resonating members (for example, the type of material and the height, width and length of the moveable or resonating members), and/or the desired, selected and/or predetermined temperature dependent characteristics of the one or more moveable or resonating members of the microelectromechanical structure (for example, temperature coefficient of frequency (TCF) of such moveable or resonating members).

(62) In one embodiment, manufacturing processes according to another aspect of the present inventions provides different (i) concentrations of dopant impurities, (ii) dopant impurities and/or (iii) impurity concentration gradient in the materials of different moveable or resonating members of the microelectromechanical structure. For example, with reference to FIG. 7, in one embodiment, moveable or resonating member 16a includes a first concentration of dopant impurities, first dopant impurities and/or first impurity concentration gradient in the materials thereof whereas moveable or resonating member 16b includes a second concentration of dopant impurities, second dopant impurities and/or second impurity concentration gradient in the materials thereof. In one embodiment, the processes (which may employ multiple masking processes) of the microelectromechanical structure may include a plurality of different dopant carrier layers (each having, for example, different impurity dopant types and/or doping concentrations). For example, after formation of the moveable or resonating members of the microelectromechanical structure, the different dopant carrier layers may be sequentially deposited, formed, grown and/or provided on associated selected portions of the moveable or resonating members using multiple masking steps (and, in this embodiment, on stationary members as well—although such regions may be masked if desired).

(63) For example, with reference to FIG. 7, in one embodiment, microelectromechanical structure 12 may be fabricated by providing, depositing, forming and/or growing a dopant carrier layer on moveable or resonating member 16a while a mask layer protects moveable or resonating member 16b. Thereafter, the mask layer protecting moveable or resonating member 16b may be removed and a second dopant carrier layer may be provided, deposited, formed and/or grown on moveable or resonating member 16b. In this way, the moveable members may include different (i) concentrations of dopant impurities, (ii) dopant impurities and/or (iii) impurity concentration gradient in the materials of different moveable or resonating members of the microelectromechanical structure.

(64) Notably, a second masking layer may or may not be provided on and/or over the dopant carrier layer on moveable or resonating member 16a while the second dopant layer is provided, deposited, formed and/or grown on moveable or resonating member 16b. Moreover, the impurity dopants of the first dopant carrier layer may be transferred to moveable or resonating member 16a before, during and/or after impurity dopants of the second dopant carrier layer are transferred to moveable or resonating member 16b.

(65) Indeed, in one embodiment, the impurity concentration(s) in the material of the moveable or resonating members and/or gradients of such concentrations within the members are/is defined to provide predetermined net temperature dependent characteristics of the one or more moveable or resonating members (for example, TCF) so that over a given manufacturing tolerance and operating temperature range, the one or more predetermined temperature dependent characteristics are within a predetermined range. Here, the microelectromechanical structure may be manufactured (using, for example, the techniques described herein) to provide a (1) first moveable or resonating member having a first impurity concentration and/or a first impurity gradient and (2) a second moveable or resonating member includes a second impurity concentration having a second impurity gradient. The impurity concentrations and impurity gradients may be selected to provide a net temperature dependent characteristics of the one or more moveable or resonating members (for example, TCF) so that over a given manufacturing tolerance and operating temperature range. For example, with reference to FIG. 8, the materials of one or more of the moveable or resonating members may include impurity concentration which provides a TCF associated with “1” and the materials of one or more other/different moveable or resonating members of the microelectromechanical structure may include impurity concentration which provides a TCF associated with “2”. In this way, where the doping impurity concentrations changes due to, for example, manufacturing tolerances of the various processes, the overall or net temperature dependent characteristics of the one or more moveable or resonating members (for example, TCF) remain relatively constant and/or within a predetermined range. Here, any changes in impurity concentration(s) in moveable or resonating members associated with “1”, due to, for example, manufacturing controllability and/or tolerances, may offset related changes in impurity concentration(s) in moveable or resonating members associated with “2”.

(66) Notably, although the impurity concentration(s) and/or gradients of such concentrations may not provide a maximum or preferred reduction in the sensitivity of the temperature dependent characteristic of the moveable or resonating structure, such impurity concentration(s) and/or gradients of such concentrations provide a sensitivity of the temperature dependent characteristic (for example, thermally-induced changes to the Young's modulus which tends to cause considerable drift or change in the frequency of the output of a microelectromechanical resonator) over manufacturing variations or tolerances in processes which is within a predetermined range or limits.

(67) In another embodiment, the microelectromechanical structure is designed and manufactured such that a first moveable or resonating member includes a first impurity concentration having a first impurity gradient and a second moveable or resonating member includes a second impurity concentration having a second impurity gradient. In this way, the first and second moveable or resonating members include one or more different temperature dependent characteristics. For example, with reference to FIG. 9, in one embodiment, moveable or resonating member 16a includes an impurity concentration having a first impurity gradient which is different from second moveable or resonating member 16b includes a second impurity concentration having a second impurity gradient. With reference to FIGS. 10A-10D, in one embodiment, microelectromechanical structure 12 of FIG. 9 may be manufactured using techniques similar to those described above with respect to FIG. 6. That is, after formation of the moveable or resonating members 16a and 16b, dopant carrier layer 22 is deposited, formed, grown and/or provided thereon (and, in this embodiment, on stationary members 18a and 18b as well—although such regions may be masked if desired). As noted herein, dopant carrier layer 22 may include n-type or p-type impurities to be incorporated into the material of moveable or resonating members 16a and 16b to increase the impurity doping concentrations of the material thereof.

(68) During and/or after depositing, forming, growing and/or providing dopant carrier layer 22 on moveable or resonating members 16a and 16b, the impurity dopant in dopant carrier layer 22 is transferred to the semiconductor material (for example, monocrystalline silicon) of moveable or resonating members. (See, for example, FIG. 10B). In one embodiment, impurities in carrier layer 22 are transferred into the semiconductor material of moveable or resonating member via thermally annealing and/or heating. In this embodiment, the concentrations of impurities in portion 16a″ and 16b″ of moveable or resonating member 16a and 16b, respectively, are substantially greater than in portion 16b′ of moveable or resonating member. Moreover, the impurity concentration within the material of portions 16a″ of moveable or resonating member 16a may be greater than or equal to impurity concentration within the material of portions 16b″ of moveable or resonating member 16b. For example, where the semiconductor material of the moveable or resonating members is formed from monocrystalline silicon and includes an initial n-type impurity concentration of about 10.sup.13 cm.sup.−3, in one embodiment, after transfer of the impurity dopants from carrier layer 22, the n-type impurity concentration of the monocrystalline silicon of portions 16a″ and 16b″ of moveable or resonating member is greater than 10.sup.19 cm.sup.−3 (and preferably, between 10.sup.19 cm.sup.−3 and 10.sup.21 cm.sup.−3) and the n-type impurity concentration of the monocrystalline silicon of portion 16b′ is less than 10.sup.18 cm.sup.−3 (and, in another embodiment, is less than 10.sup.17 cm.sup.−3 or 10.sup.16 cm.sup.−3).

(69) Notably, dopant carrier layer 22 may be removed before or concurrently with release of moveable or resonating members 16. (See, FIGS. 6C and 6D). For the sake of brevity that discussion will not be repeated in detail.

(70) In another embodiment, the dopant carrier layer may be deposited, formed, grown and/or provided on the moveable or resonating members after such moveable or resonating members are released. For example, with reference to FIGS. 11A-11D, in one embodiment, after defining or forming one or more of the moveable or resonating members (and, in this exemplary embodiment, stationary members 18), and releasing moveable or resonating members 16, an exemplary method of the present inventions may deposit, form, grow and/or provide dopant carrier layer 22 on moveable or resonating members 16. (See, FIGS. 11A and 11B). The dopant carrier layer 22 includes one or more impurity dopants and/or types (n-type or p-type impurities) which are to be incorporated into moveable or resonating members 16. In one exemplary embodiment, dopant carrier layer 22 may be phosphorus oxychloride (POCl.sub.3) which, as discussed herein, is employed as a source of phosphorus (an n-type impurity) to increase the concentration of dopant or impurities in the material of moveable or resonating members 16.

(71) With reference to FIG. 11C, during and/or after providing, depositing, forming and/or growing dopant carrier layer 22 on moveable or resonating members 16, the dopants in dopant carrier layer 22 are transferred to or driven into moveable or resonating members 16 (which after transfer or drive-in are identified as 16″ to reflect or indicate an increase in concentration of dopant within the material of portions 16′ of members 16). In one embodiment, thermally annealing or heating is employed to induce the transfer of the impurities into moveable or resonating members 16. For example, where dopant carrier layer 22 is POCl.sub.3 and the material of moveable or resonating members 16 is silicon, the phosphorous in the POCl.sub.3 dopant carrier layer 22 is transferred from layer 22 to the material of moveable or resonating members 16 thereby increasing the concentration of n-type dopants by one or more orders of magnitude of the concentration of n-type dopants in the material of moveable or resonating members 16. In this embodiment, providing dopant carrier layer 22 over a greater surface of moveable or resonating members 16 facilitates an increase in dopants and uniformity thereof within moveable or resonating members 16. In this way, the amount of time to provide a predetermined the concentration of impurities in the material of the moveable or resonating members and/or gradients of such concentrations within the members (which provides one or more predetermined temperature dependent characteristics of the one or more moveable or resonating members (for example, TCF)) may be reduced.

(72) With reference to FIG. 11D, after transfer of the impurities or dopants from dopant carrier layer 22 to moveable or resonating members 16, in one embodiment, dopant carrier layer 22 may be removed, using, for example, conventional removal techniques—for example, a wet etch process.

(73) Notably, although many of the exemplary embodiments described and illustrate providing, depositing, forming and/or growing dopant carrier layer 22 on moveable or resonating members 16 before releasing such members from the substrate, such exemplary embodiments are applicable to and may employ a process of dopant carrier layer 22 being provided, deposited, formed and/or grown on the released moveable or resonating members 16. For the sake of brevity, such exemplary embodiments having a dopant carrier layer 22 being provided, deposited, formed and/or grown on the released moveable or resonating members 16 will not be repeated.

(74) The MEMS device of the present inventions may be a discrete device. For example, MEMS device 10, including a microelectromechanical structure manufactured in accordance with any of the techniques described and/or illustrated herein, may be formed in and/or on die 34 (for example, any of the embodiments described and/or illustrated herein, including any combinations and permutations thereof). (See, for example, FIG. 12A). The MEMS device 10 may include one or more microelectromechanical structures 12.

(75) In another embodiment, the MEMS device of the present inventions may be fabricated on a die having one or more other devices, structures and/or circuits. For example, in one embodiment, MEMS device 10 may be manufactured on die 34 including one or more micromachined thermistor structures (like that described and illustrated in Provisional Application Ser. No. 61/533,148, Inventor: Arft et al., filed Sep. 9, 2011, the contents of which are incorporated herein by reference). (See, for example, FIGS. 12B and 12D).

(76) The MEMS device 10 may be integrated in, on and/or above a substrate 14 which includes circuitry. (See, for example, FIGS. 12C and 12D). For example, the MEMS device 10 may be a MEMS resonator and the integrated circuitry may be clock generation circuitry including one or more phase locked loops (PLLs), delay locked loops (DLLs), digital/frequency synthesizer (for example, a direct digital synthesizer (“DDS”), frequency synthesizer, fractional synthesizer and/or numerically controlled oscillator) and/or frequency locked loops (FLLs).

(77) In another embodiment, MEMS device includes one or more temperature sensing active devices, for example, temperature sensing diodes or transistors. For example, with reference to FIGS. 12E and 12F, MEMS device 10 may be integrated in, on and/or above a substrate 14 which includes a temperature sensing active device 36. Such temperature sensing active device 36 may be one or more temperature sensing diodes, which is/are fabricated in and/or from the heavily doped semiconductor material in periphery or field areas 40 of MEMS device 10. (See, for example, FIG. 13). Here, in one embodiment, the opposite regions may be fabricated by counter-doping the heavily doped material or using a mask while doping material of the moveable or resonating member and thereafter doping the masked/undoped region with a dopant providing a type of material that is opposite the heavily doped material. Notably, all techniques for fabricating the one or more temperature sensing active devices are intended to fall within the scope of the present inventions.

(78) Thus, the MEMS structures of the present inventions may be a discrete device or integrated on a substrate or die with one or more other structures (for example, one or more MEMS structures). In addition thereto, or in lieu thereof, the MEMS resonator structure may be integrated with circuitry as an integrated circuit type device. In this regard, the MEMS resonator structure of the present inventions (which may have one or more MEMS resonator structure) may be integrated on a die including integrated circuitry and/or one or more other MEMS resonator structure(s).

(79) There are many inventions described and illustrated herein. While certain embodiments, features, attributes and advantages of the inventions have been described and illustrated, it should be understood that many others, as well as different and/or similar embodiments, features, attributes and advantages of the present inventions, are apparent from the description and illustrations. As such, the embodiments, features, attributes and advantages of the inventions described and illustrated herein are not exhaustive and it should be understood that such other, similar, as well as different, embodiments, features, attributes and advantages of the present inventions are within the scope of the present inventions.

(80) Indeed, the present inventions are neither limited to any single aspect nor embodiment thereof, nor to any combinations and/or permutations of such aspects and/or embodiments. Moreover, each of the aspects of the present inventions, and/or embodiments thereof, may be employed alone or in combination with one or more of the other aspects of the present inventions and/or embodiments thereof.

(81) For example, the doping processes may include counter-doping which includes (i) a first dopant type at first doping level and (ii) a second dopant type (which is opposite the first dopant type) at a second doping level. In the context of counter-doping, the dominant dopant type and the net doping concentration of the MEMS resonator structure depend on, among other things, the dopant types and the doping levels of such impurities. Indeed, in another embodiment, the doping processes of the MEMS resonator structure (which may employ multiple masking processes) may provide a first region of the MEMS resonator structure having first dopant type(s) and/or first doping level(s), and a second region of the MEMS resonator structure having second dopant type(s) and/or second doping level(s).

(82) Further, the present inventions may employ any dopant and/or any “carrier” of the dopant to provide the highly doped semiconductor (for example, monocrystalline silicon). In one embodiment, for example, the dopant provides excess n-type carriers in the moveable or resonating members of the microelectromechanical structure (for example, one or more elements of Group 15 of the periodic table—such as phosphorous, arsenic and/or antimony). In another embodiment the dopant provides excess p-type carriers in the moveable or resonating members (for example, one or more elements of Group 13 of the periodic table—such as boron, gallium and/or indium). Further, in one embodiment, the “carrier” is a doped silicon glass (for example, phosphorous or boron doped silicon dioxide) and/or a doped silicon (for example, a germanium, phosphorous or boron doped silicon). Any carrier, now known or later developed, may be employed in connection with these inventions.

(83) Moreover, the manufacturing process described herein is generally not limited to a particular order. For example, as described above, the dopant carrier layer may be provided, deposited, formed and/or grown before, during and/or after release of the moveable or resonating members. Moreover, the dopant carrier layer may be removed before, concurrently with, or after the sacrificial layer of the substrate. (See, for example, FIGS. 14A and 14B wherein dopant carrier layer 22 is removed substantially currently with (and using the same materials (etchants) and/or techniques of removal of sacrificial layer 14b and release of moveable or resonating members 16).

(84) Indeed, as mentioned above, the dopant carrier layer may be removed before the dopant of the dopant carrier layer is driven into the semiconductor material of the moveable or resonating members via thermally annealing and/or heating. For example, with reference to FIGS. 15A and 15B, in another exemplary embodiment, after depositing, growing, forming and/or providing dopant carrier layer 22 on moveable or resonating members 16—but before transferring/driving or substantially transferring/driving dopant impurities from dopant carrier layer 22 into the semiconductor material of moveable or resonating members 16, dopant carrier layer 22 is removed thereby leaving dopant impurities 38 substantially at the surface of the semiconductor material of moveable or resonating members 16 (see FIG. 15B). During removal of dopant carrier layer 22, or thereafter, the dopant impurities at the surface are driven into other portions of the semiconductor material of moveable or resonating members 16 via, for example, thermally annealing and/or heating (see FIG. 15C) and thereby substantially increasing the doping concentrations of a selected or significant portion of the semiconductor material of the moveable or resonating members (which after transfer or drive-in portions are identified as 16″ to reflect or indicate an increase in concentration of dopant within such portion of the material of members 16).

(85) As such, in this embodiment, dopant impurities 38 from dopant carrier layer 22 are transferred to the surface of the semiconductor material of moveable or resonating members 16 during deposition, growth and/or formation of dopant carrier layer 22—and, after (or during) removal of dopant carrier layer 22, dopant impurities 38 which are substantially at the surface of the semiconductor material of moveable or resonating members 16 are transferred/driven deeper into the semiconductor material of the moveable or resonating members (for example, via thermally annealing and/or heating) to thereby reduce and/or control the sensitivity of the temperature dependent characteristics of the one or more moveable or resonating members of the microelectromechanical structure. During or after dopant impurities 38 are driven deeper into the semiconductor material of moveable or resonating members 16, moveable or resonating members 16 may be released via removal of portions of sacrificial layer 14b. (See FIG. 15D).

(86) Indeed, the technique of removing the dopant carrier layer prior to transferring/driving or substantially transferring/driving dopant impurities from the dopant carrier layer into the semiconductor material of the moveable or resonating members may provide a resulting structure having a lower concentration of dopant impurities at the surface (after transfer or drive-in) relative to those resulting structures manufactured using techniques that remove or etch the dopant carrier layer after transfer or drive-in.

(87) Notably, the doping techniques illustrated in FIGS. 15A-15D may employ any of dopant distribution techniques described and/or illustrated herein. For example, one or more first regions or structures of a MEMS device may be doped using the techniques described in connection with FIGS. 15A-15D to provide a first impurity concentration level of regions of the moveable or resonating members which are different from the impurity concentration level of other regions of such members. (See, for example, FIGS. 10D, 11D and 14D). That is, one or more regions/portions of the structure may be doped to a first impurity concentration level while other regions/portions of the structure are not doped and/or are doped differently (for example, a different impurity, impurity level, different gradient and/or impurity type). For the sake of brevity, such discussions will not be repeated.

(88) Further, as mentioned above, manufacturing processes of the present inventions may provide different (i) concentrations of dopant impurities, (ii) dopant impurities and/or (iii) impurity concentration gradient in the materials of different moveable or resonating members of the microelectromechanical structure. (See, for example, FIG. 7).

(89) As mentioned above, MEMS device 10 may include one or more MEMS structures and may be any shape or device now known or later developed. For example, the MEMS device may include one or more structures to provide a gyroscope, resonator and/or accelerometer, made in accordance with well-known fabrication techniques, such as lithographic and other precision fabrication techniques, which form mechanical components to a scale that is generally comparable to microelectronics.

(90) Moreover, the MEMS structure may include slots in one or more of the moveable or resonating members to facilitate, for example, more thorough impurity concentration in the material thereof and/or more complete release of the structure. For example, with reference to FIGS. 16 and 17A-17E, in one embodiment, the moveable or resonating member includes a plurality of slots 40 formed therein. In this architecture, slots 40 allow dopant carrier layer 22 to form, deposit and/or grow on a larger surface area of moveable or resonating members 16. (See, for example, FIG. 17B). As such, after the dopant in the carrier layer is transferred into the semiconductor material of moveable or resonating members 16, for example, via thermally annealing and/or heating, the concentration of impurities in the material of “center” portion of the moveable or resonating members 16 includes a substantial increase of the doping concentrations and thereby provide for reduced and/or controlled sensitivity of the temperature dependent characteristics of moveable or resonating members 16 of microelectromechanical structure 12. (See, FIGS. 17C-16E; and compare FIGS. 17C-17E to FIGS. 6C, 6D, 11C and 11D). In this way, the “center portion” of the semiconductor material of moveable or resonating members 16 formed from monocrystalline silicon may include an n-type impurity concentration, after fabrication, of greater than 10.sup.15 cm.sup.−3 (and preferably, between 10.sup.15 cm.sup.−3 and 10.sup.21 cm.sup.−3), and more preferably, greater than 10.sup.19 cm.sup.−3 (and preferably, between 10.sup.19 cm.sup.−3 and 10.sup.21 cm.sup.−3). In another exemplary embodiment, where the semiconductor material of the moveable or resonating members is formed from monocrystalline silicon and includes an initial n-type impurity concentration of about 10.sup.19 cm.sup.−3, the “center portion” of semiconductor material of moveable or resonating members 16 formed from monocrystalline silicon may include an n-type impurity concentration, after fabrication, of greater than 10.sup.20 cm.sup.−3 (and preferably, between 10.sup.20 cm.sup.−3 and 10.sup.21 cm.sup.−3). Indeed, these embodiments may be employ to reduce and/or control the gradient of the impurity concentration within the material of the moveable or resonating members—particularly, in those embodiment where the moveable or resonating members include challenging dimensions.

(91) As noted above, the microelectromechanical structure may be designed and manufactured such that portions of the moveable or resonating members have different impurity concentrations (having different impurity concentration gradients). In one embodiment, the microelectromechanical structure includes a moveable or resonating member having a plurality of widths such that a first portion of the moveable or resonating member includes a first impurity concentration (and, in one embodiment, a first impurity gradient) and a second portion of the moveable or resonating member includes a second impurity concentration (and, in one embodiment, a second impurity gradient). In this way, the first and second portions of the moveable or resonating member include one or more different temperature dependent characteristics. (See, for example, FIG. 8 and the discussion associated therewith). For example, with reference to FIGS. 18, 19A and 19B, in one embodiment, a first portion 16a of moveable or resonating member 16 includes an impurity concentration (and/or having a first impurity gradient) which is different from a second portion 16b of moveable or resonating member 16 which includes a second impurity concentration (and/or having a second impurity gradient).

(92) Notably, the moveable or resonating member of the microelectromechanical structure having a plurality of widths may be fabricated using any of the techniques described and/or illustrated herein including, for example, the processes illustrated in FIGS. 3A-3F. For the sake of brevity, such discussion will not be repeated. Regardless of the actual processes, the dopant from the dopant carrier layer, after transfer or drive-in, substantially increases the impurity concentrations of portions of the semiconductor material of the moveable or resonating members wherein portions of the moveable or resonating member include different impurity concentrations (and/or different impurity gradient) which after transfer or drive-in portions are identified as 16a″ or 16b″ to reflect or indicate an increase in concentration of dopant within such portion of the material of members 16). (See, FIGS. 19A and 19B).

(93) Although the embodiments described and illustrated herein adjust the impurity concentrations of semiconductor material of the moveable or resonating members by selectively increasing the impurity concentration, in another aspect of the present inventions, the impurity concentration of the moveable or resonating members of the microelectromechanical structure may be adjusted by removing impurities therefrom. That is, in lieu of increasing the impurity concentrations of semiconductor material of the moveable or resonating members, the layer deposited, formed, grown and/or provided on the moveable or resonating members adjusts the impurity concentrations in semiconductor material of the moveable or resonating member by removing n-type or p-type impurities. Thus, in the embodiments of this aspect of the inventions, an impurity removal layer is deposited, formed, grown and/or provided on the moveable or resonating members and, in one embodiment, in response to an activation process (for example, thermal annealing), n-type or p-type impurities transfer from the moveable or resonating members to the impurity removal layer.

(94) For example, with reference to FIGS. 20A and 20B, the manufacture of microelectromechanical structure 12, in one exemplary embodiment of this aspect of the inventions, includes forming or fabricating moveable or resonating member 16″ from a semiconductor on insulator (SOI) substrate 14 having a silicon layer 14c disposed on an insulating or sacrificial layer 14b, which is disposed on a “handle” layer 14a (for example, silicon). In this exemplary embodiment, silicon layer 14c may be monocrystalline silicon having a first concentration of p-type impurities (for example, an initial or background p-type impurity concentration of about 10.sup.19 cm.sup.−3). The moveable or resonating member 16″ may be formed or fabricated in substrate 14c using conventional lithographic and etching techniques (see channels 20 which defines the moveable or resonating member 16″). Indeed, any technique, now known or later developed, may be employed to form or fabricate moveable or resonating member 16″.

(95) After defining or forming one or more of the moveable or resonating members, with reference to FIG. 20C, the method of this aspect of the present inventions deposits, forms, grows and/or provides impurity removal layer 42 on moveable or resonating members 16″. The impurity removal layer 42 includes a material that has a higher attraction (relative to the material of moveable or resonating members 16″) for one or more dopants and/or dopant types (n-type or p-type impurities) which reside in moveable or resonating members 16″ and/or the segregation coefficient of the materials at the interface of layer 42 and resonating member 16″ is sufficient to remove dopant near or at the surface of the material of member 16″. In this exemplary embodiment, impurity removal layer 42 may be an undoped silicon glass (for example, silicon dioxide) which is employed to remove or absorb a p-type impurity (for example, boron) and thereby reduce the concentration of dopant or impurities in the material of moveable or resonating members 16.

(96) With reference to FIG. 20D, during and/or after providing, depositing, forming and/or growing impurity removal layer 42 on moveable or resonating members 16″, the impurity dopants in the material of moveable or resonating members 16″ is transferred to or driven into impurity removal layer 42 (which after transfer or drive-in portions are identified as 16 to reflect or indicate an increase in concentration of impurity dopant within such portion of the material of members 16′). In one embodiment, thermally annealing or heating is employed to induce the transfer of the n-type or p-type impurities from the material of moveable or resonating members 16 (for example, at or near the surface thereof) to impurity removal layer 42.

(97) With reference to FIG. 20E, after absorption of the impurities or dopants by impurity removal layer 42 from 16″ of moveable or resonating members 16, in one embodiment, impurity removal layer 42 is removed, using, for example, conventional removal techniques—for example, a wet etch process. Concurrently with the removal of the dopant carrier layer, or after such removal, moveable or resonating member 16 may be released (vertically and/or horizontally) from substrate 14 via removal of insulating or sacrificial layer 14b. (See, FIG. 20F).

(98) The various embodiments described above with respect to adjusting the impurity concentration of the moveable or resonating members of the microelectromechanical structure by increasing such concentration are fully applicable to adjusting the impurity concentration by removing impurities from the material of the moveable or resonating members. For example, impurity removal process(es) may be “patterned” so that one or more first regions or structures of a MEMS device include a first impurity concentration level and one or more other regions or structures of the device are substantially maintained at background doping level and/or at an impurity concentration level that is/are different from the first region(s) or structure(s). Here, one or more regions/portions of a structure may include a first impurity concentration level while other regions/portions of the structure are not doped and/or are doped differently (for example, a different impurity, impurity level, different gradient and/or impurity type) so that one structure of the device is fabricated from the highly doped semiconductor and another structure is not fabricated from substantially the same highly doped semiconductor (for example, such other structure may be fabricated from material having a impurity concentration that is substantially at the background doping level. For the sake of brevity such discussions will not be repeated.

(99) When the carrier layer 22 contacts the sides and top of the structure 16 and the dopant is driven in from the carrier layer 22 then there may be a vertical asymmetry in the final dopant profile in structure 16. In some cases this may not be desirable. This asymmetry may be reduced as shown in FIG. 11A-11D by releasing structure 16 prior to depositing carrier layer 22 and then driving dopant in from the carrier layer 16 from the sides and the top and the bottom. In this way structure 16 can be doped from the top and bottom symmetrically. An additional way to achieve a vertically symmetrical dopant profile is to remove the carrier layer 16 after deposition but prior to drive-in, as shown in FIGS. 21A-21E, where FIG. 21C shows the lateral surfaces of carrier layer 22 removed. This form or removal is well known to those skilled in the art of wafer processing as a common result of plasma etching.

(100) In yet another embodiment, the top surface of member 16 may be protected with a mask layer 50 from contact with carrier layer 22 as shown in FIGS. 22A-22D. The mask should be chosen to properly isolate the dopant, this can be done for instance with an oxide deposited prior to the etching step that forms structure 16. This is often referred to as a hard mask for that etch. Hard masks may be used to improve the etching properties and may be removed prior to further processing, but in this exemplary embodiment the hard mask may be left on, as shown in FIG. 22A. After the drive in FIG. 22C the dopant has not penetrated the hard mask.

(101) By removing or masking the carrier layer 22, the member 16 may be built with doping only or primarily from the sides and not the top or bottom. In these ways the dopant symmetry both laterally and vertically in member 16 may be more uniform.

(102) Notably, although, at times, the present inventions have been described and/or illustrated in relation to or in the context of a semiconductor-on-insulator (SOI) substrate. For example, the semiconductor layer of the SOI substrate may be materials in column IV of the periodic table, for example, silicon, germanium, carbon; also combinations of these, for example, silicon germanium, or silicon carbide; also of III-V compounds, for example, gallium phosphide, aluminum gallium phosphide, or other III-V combinations; also combinations of III, IV, V, or VI materials, for example, silicon nitride, silicon oxide, aluminum carbide, or aluminum oxide; also metallic silicides, germanides, and carbides, for example, nickel silicide, cobalt silicide, tungsten carbide, or platinum germanium silicide; also doped variations including phosphorus, arsenic, antimony, boron, or aluminum doped silicon or germanium, carbon, or combinations like silicon-germanium; also these materials with various crystal structures, including single/mono crystalline, polycrystalline, nanocrystalline, or amorphous; also with combinations of crystal structures, for instance with regions of single crystalline and polycrystalline structure (whether doped or undoped). Notably, the mechanical and/or thermistor structures may be comprised of the same materials as described above with respect to the first semiconductor layer.

(103) Other substrates are also suitable—including, an insulating material (for example, a ceramic material, a glass material, a silicon oxide material and a silicon nitride material). The substrate may be a semiconductor material of a standard wafer (for example, a monocrystalline or polycrystalline silicon wafer) having an insulator or sacrificial layer deposited thereon. Moreover, the substrate may be a metal material. All substrates now known or later developed are intended to fall within the scope of the present inventions.

(104) Moreover, the present inventions may include deposition, formation and/or growth of a silicon (doped or undoped) on the impurity adjusted moveable or resonating members of the microelectromechanical structure. In this embodiment, after adjusting the impurity concentration of the material of the moveable or resonating members of the microelectromechanical structure (according to any of the embodiments described and/or illustrated herein), the technique may include depositing, forming, growing and/or providing silicon (doped or undoped) on the surface of the moveable or resonating members to, for example, adjust the temperature coefficient of frequency (TCF) of moveable or resonating members as well as adjust the gap length between the microelectromechanical structure and the drive/sense electrodes.

(105) It should be further noted that various structures (for example, the structures of the MEMS device), circuits and/or circuitry may be described using computer aided design tools and expressed (or represented), as data and/or instructions embodied in various computer-readable media, in terms of their behavioral, register transfer, logic component, transistor, layout geometries, and/or other characteristics. Formats of files and other objects in which such structure and/or circuit expressions may be implemented include, but are not limited to, formats supporting behavioral languages such as C, Verilog, and HLDL, formats supporting register level description languages like RTL, and formats supporting geometry description languages such as GDSII, GDSIII, GDSIV, CIF, MEBES and any other suitable formats and languages. Computer-readable media in which such formatted data and/or instructions may be embodied include, but are not limited to, non-volatile storage media in various forms (e.g., optical, magnetic or semiconductor storage media) and carrier waves that may be used to transfer such formatted data and/or instructions through wireless, optical, or wired signaling media or any combination thereof. Examples of transfers of such formatted data and/or instructions by carrier waves include, but are not limited to, transfers (uploads, downloads, e-mail, etc.) over the Internet and/or other computer networks via one or more data transfer protocols (e.g., HTTP, FTP, SMTP, etc.).

(106) Indeed, when received within a computer system via one or more computer-readable media, such data and/or instruction-based expressions of the above described structures, circuits and/or circuitry may be processed by a processing entity (e.g., one or more processors) within the computer system in conjunction with execution of one or more other computer programs including, without limitation, net-list generation programs, place and route programs and the like, to generate a representation or image of a physical manifestation of such structures, circuits and/or circuitry. Such representation or image may thereafter be used in device fabrication, for example, by enabling generation of one or more masks that are used to form various components of the circuits in a device fabrication process.

(107) Moreover, the various structures (for example, the structures of the MEMS device), circuits and/or circuitry disclosed herein may be represented via simulations using computer aided design and/or testing tools. The simulation of the various structures and/or characteristics or operations thereof may be implemented by a computer system wherein characteristics and operations of such structures and/or circuitry, and techniques implemented thereby, are imitated, replicated and/or predicted via a computer system. The present inventions are also directed to such simulations of the inventive structures and circuitry, and/or techniques implemented thereby, and, as such, are intended to fall within the scope of the present inventions. The computer-readable media corresponding to such simulations and/or testing tools are also intended to fall within the scope of the present inventions.

(108) The term “depositing” and other forms (i.e., deposit, deposition and deposited), in the claims, means, among other things, depositing, creating, forming and/or growing a layer of material. In addition, the terms “first,” “second,” and the like, herein do not denote any order, quantity, or importance, but rather are used to distinguish one element from another. Moreover, the terms “a” and “an” herein do not denote a limitation of quantity, but rather denote the presence of at least one of the referenced item.