Miniature Electrical Energy Power Source Housed In A Casing Formed From An Intermediate Ceramic Ring Micro-Bonded To Upper And Lower Plate-Shaped Ceramic Wafers

Abstract

An electrical energy power source comprises a casing made by micro-bonding an upper ceramic wafer and a lower ceramic wafer to the opposed surfaces of a ceramic ring. The upper and lower ceramic wafers have respective first and second conductive pathways extends therethrough. A first current collector supporting a first active material layer contacts the upper ceramic wafer and the first conductive pathway, and a second current collector supporting a second, opposite polarity active material layer contacts the lower ceramic wafer and the second conductive pathway. A separator resides between the first and second active materials, and an electrolyte filled into the casing through a fill port activates the active materials. The first and second conductive pathways serve as opposite polarity terminals for the power source.

Claims

1. An electrical energy power source, comprising: a) casing, comprising: i) a first plate-shaped ceramic wafer comprising a first annular peripheral edge extending to a first wafer upper major face spaced from a first wafer lower major face; ii) a second plate-shaped ceramic wafer comprising a second annular peripheral edge extending to a second wafer upper major face spaced from a second wafer lower major face; iii) a third ceramic ring comprising a third annular peripheral edge extending to a third ring-shaped upper surface spaced from a third ring-shaped lower surface, iv) wherein the first wafer lower major face is directly micro-bonded to the third ring-shaped upper surface and the second wafer upper major face is directly micro-bonded to the third ring-shaped lower surface of the third ceramic ring; b) a first conductive pathway extending through the first wafer to the first wafer upper and lower major faces, wherein a first current collector contacted to the first wafer lower major face is in electrical continuity with the first conductive pathway; c) a second conductive pathway extending through the second wafer to the second wafer upper and lower major faces, wherein a second current collector contacted to the second wafer upper major face is in electrical continuity with the second conductive pathway; d) an electrode assembly housed inside the casing, the electrode assembly, comprising: i) a first active material supported on the first current collector opposite the first conductive pathway; ii) a second, opposite polarity active material supported on the second current collector opposite the second conductive pathway; and iii) a separator segregating the first active material from direct physical contact with the second active material; and e) an activating electrolyte filled into the casing to contact the electrode assembly, f) wherein the first conductive pathway serves as a first terminal and the second conductive pathway serves as a second terminal for the power source.

2. The electrical energy power source of claim 1, wherein ceramic material of the first and second ceramic wafers and the third ceramic ring is selected from high-purity fused silica and crystalline sapphire.

3. The electrical energy power source of claim 1, wherein a thickness of the first and second ceramic wafers is greater than zero up to 100 μm.

4. The electrical energy power source of claim 1, wherein the first and second conductive pathways reside in respective first and second vias extending through the first and second ceramic wafers, the first and second vias individually having a diameter that ranges from about 40 μm to about 500 μm.

5. The electrical energy power source of claim 1, wherein the first and second current collectors have thicknesses that range from about 0.1 μm to about 100 μm.

6. The electrical energy power source of claim 1, wherein the first and second conductive pathways are selected from titanium, gold, copper, platinum, platinum alloys and platinum/ceramic mixtures.

7. The electrical energy power source of claim 1, wherein the first and second active materials individually have a thickness that ranges from about 25 μm to about 5,000 μm.

8. The electrical energy power source of claim 1, wherein an electrolyte fill port extends through the first wafer to the first wafer upper and lower major faces thereof, and wherein the fill port is spaced laterally from an annular edge of the first current collector.

9. The electrical energy power source of claim 1, wherein a biocompatible pad is contacted to at least one of the first ceramic wafer upper major face and the second ceramic wafer lower major face to cover the respective first and second conductive pathway.

10. The electrical energy power source of claim 1, wherein the micro-bond between the first ceramic wafer and the third ceramic ring and between the third ceramic ring and the second ceramic wafer individually have a thickness that ranges from about 60 μm to about 120 μm.

11. The electrical energy power source of claim 1, selected from an alkaline cell, a primary lithium cell, a rechargeable lithium-ion cell, a Ni/cadmium cell, a Ni/metal hydride cell, a supercapacitor, and a thin film solid-state cell.

12. An electrical energy power source, comprising: a) a first high-purity fused silica plate-shaped wafer having a first annular peripheral edge extending to a first wafer upper major face spaced from a first wafer lower major face, wherein: i) a first conductive pathway extends through the first wafer to the first wafer upper and lower major faces; ii) a cathode current collector contacted to the first wafer lower major face is in electrical continuity with the first conductive pathway; iii) a cathode active material is contacted to the cathode current collector opposite the first wafer lower major face so that the first conductive pathway serves as a cathode terminal; and iv) an electrolyte fill port extends through the first wafer to the first wafer upper and lower major faces thereof; b) a second high-purity fused silica plate-shaped wafer having a second annular peripheral edge extending to a second wafer upper major face spaced from a second wafer lower major face, wherein: i) a second conductive pathway extends through the second wafer to the second wafer upper and lower major faces; ii) an anode current collector contacted to the second wafer upper major face is in electrical continuity with the second conductive pathway; and iii) an anode active material is contacted to the anode current collector opposite the second wafer upper major face so that the second conductive pathway serves as an anode terminal; and c) a third high-purity fused silica ring comprising a third annular peripheral edge extending to a third ring-shaped upper surface spaced from a third ring-shaped lower surface, wherein the first wafer lower major face is directly micro-bonded to the third ring-shaped upper surface and the second wafer upper major face is directly micro-bonded to the third ring-shaped lower surface of the third ceramic ring to thereby provide a casing for the power source; d) a separator segregating the first active material from direct physical contact with the second active material; and e) an activating electrolyte filled into the casing to contact the anode and cathode active materials.

13. The electrical energy power source of claim 12, wherein a thickness of the first and second high-purity fused silica wafers is greater than zero up to 100 μm.

14. The electrical energy power source of claim 12, wherein the anode and cathode current collectors have thicknesses that range from about 0.1 μm to about 100 μm.

15. The electrical energy power source of claim 12, wherein the first and second conductive pathways reside in respective first and second vias extending through the first and second high-purity fused silica wafers, the first and second vias individually having a diameter that ranges from about 40 μm to about 500 μm.

16. The electrical energy power source of claim 12, wherein the first and second conductive pathways are selected from titanium, gold, copper, platinum, platinum alloys and platinum/ceramic mixtures.

17. The electrical energy power source of claim 12, wherein the cathode active material has a thickness that ranges from about 25 μm to about 5,000 μm, and wherein the anode active material has a thickness that ranges from about 25 μm to about 4,000 μm.

18. The electrical energy power source of claim 12, wherein the fill port is spaced laterally from an annular edge of the cathode current collector.

19. The electrical energy power source of claim 12, wherein a biocompatible pad is contacted to at least one of the first fused silica wafer upper major face and the second fused silica wafer lower major face to cover the respective first and second conductive pathway.

20. The electrical energy power source of claim 12, wherein the micro-bond between the first high-purity fused silica wafer and the third high-purity fused silica ring and between the third high-purity fused silica ring and the second high-purity fused silica wafer individually have a thickness that ranges from about 60 μm to about 120 μm.

21. A method for providing an electrical energy power source, comprising the steps of: a) providing an upper ceramic host sheet, an intermediate ceramic host sheet and a lower ceramic host sheet; b) forming a plurality of first and second conductive pathways through the respective upper and lower ceramic host sheets; c) cutting a plurality of openings in the intermediate ceramic host sheet; d) contacting a plurality of first current collectors to an inner surface of the first ceramic host sheet, the first current collectors being aligned and in contact with a respective one of the first conductive pathways; e) contacting a plurality of second current collectors to an inner surface of the second ceramic host sheet, the second current collectors being aligned and in contact with a respective one of the second conductive pathways; f) micro-bonding the first ceramic host sheet to a lower surface of the intermediate ceramic host sheet so that the plurality of first conductive pathways are aligned with a corresponding one of the openings in the intermediate ceramic host sheet; g) supporting a plurality of first polarity active material layers on a respective one of the plurality of first current collectors opposite the corresponding plurality of first conductive pathways extending through the first ceramic host sheet; h) positioning a plurality of separators on a corresponding one of the plurality of first polarity active material layers; i) supporting a plurality of second, opposite polarity active material layers on a respective one of the plurality of second current collectors opposite the corresponding plurality of second conductive pathways extending through the second ceramic host sheet; j) micro-bonding the second ceramic host sheet to an upper surface of the intermediate ceramic host sheet to thereby provide a plurality of casings, each casing housing an electrode assembly comprising one of the plurality of first active material layers aligned with a respective one of the second active material layers opposite an intermediate separator; k) providing a plurality of electrolyte fill ports in one of the first and second ceramic host sheets, the fill ports corresponding to a respective one of the plurality casings; l) filling an activating electrolyte into each of the plurality of casings and then closing fill ports; and m) singulating a plurality of electrical energy power sources from the micro-bonded upper, intermediate and lower ceramic host sheets, each power source comprising a casing housing an electrode assembly activated with the electrolyte, wherein the first and second conductive pathways provide opposite polarity first and second terminals for each power source.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

[0031] FIG. 1 is a cross-sectional view of an exemplary electrical power source 10 according to the present invention.

[0032] FIGS. 2A to 2D illustrate the steps for providing an electrically conductive pathway 34, 36, 38 extending through a high-purity fused silica wafer 18, 20 according to the present invention.

[0033] FIG. 3 illustrates a process flow chart for providing an electrically conductive pathway extending through a high-purity fused silica wafer according to the present invention.

[0034] FIG. 4 is a schematic drawing showing an assembly of a high-purity fused silica wafer 18 or 20 stacked on top of a high-purity fused silica ring 16 for subsequent micro-bonding to each other according to the present invention.

[0035] FIG. 5 is a graph showing the difference in the refractive indices between air and high-purity fused silica.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0036] As described in this specification, a high-purity fused silica wafer is commercially available from numerous manufacturers. A suitable high-purity fused silica wafer has a thickness that ranges from about 100 μm to about 4 mm. One source is Corning, Incorporated, Corning, New York under the designations 7979, 7980 and 8655, designation 7980 being preferred.

[0037] As described in this specification, the term “plurality” means more than two up to a large number.

[0038] Turning now to the drawings, FIG. 1 is a cross-sectional view of an exemplary electrical energy power source 10 according to the present invention. The electrical energy power source 10 can be a capacitor or a rechargeable battery, for example a hermetically sealed rechargeable Li-ion battery. However, the electrical energy power source 10 is not limited to any one chemistry or even a rechargeable chemistry and can be of an alkaline cell, a primary lithium cell, a rechargeable lithium-ion cell, a Ni/cadmium cell, a Ni/metal hydride cell, a supercapacitor, a thin film solid-state cell, and the like. Preferably, the electrical energy power source 10 is a lithium-ion electrochemical cell comprising a carbon-based or Li.sub.4Ti.sub.5O.sub.12-based anode and a lithium metal oxide-based cathode, such as of LiCoO.sub.2 or lithium nickel manganese cobalt oxide (LiNi.sub.aMn.sub.bCo.sub.1-a-bO.sub.2). The electrical energy power source 10 can also be a solid-state thin film electrochemical cell having a lithium anode, a metal-oxide based cathode and a solid electrolyte, such as an electrolyte of LiPON (Li.sub.xPO.sub.yN.sub.z).

[0039] The electrical energy power source 10 comprises a casing 12 housing an electrode assembly 14. The casing 12 comprises an intermediate ceramic ring 16 that is micro-bonded to a first or upper plate-shaped ceramic wafer 18 and a second or lower plate-shaped ceramic wafer 20. The electrode assembly 14 housed inside the casing 12 comprises an anode active material 22 that is prevented from physically contacting a cathode active material 24 by an intermediate separate 26.

[0040] In greater detail, the first or upper plate-shaped ceramic wafer 18 is preferably a first high-purity fused silica wafer comprising an annular peripheral edge 18A that extends to and meets with a planar upper major face 18B spaced from a planar lower major face 18C. Similarly, the second or lower plate-shaped ceramic wafer 20 is preferably a second high-purity fused silica wafer comprising an annular peripheral edge 20A that extends to and meets with a planar upper major face 20B spaced from a planar lower major face 20C. The intermediate ceramic ring 16 is preferably a high-purity fused silica ring that resides between the upper and lower plate-shaped ceramic wafers 18 and 20. The ceramic ring 16 comprises an annular sidewall 16A that extends to and meets with an upper ring-shaped surface 16B spaced from a lower ring-shaped surface 16C. The upper and lower ring-shaped surfaces 16B and 16C of the intermediate ring 16 are planar, residing along respective planes.

[0041] As further shown in FIG. 1, a first via 28 and a third via 30 are formed in the first or upper ceramic wafer 18 and a second via 32 is formed in the second or lower ceramic wafer 20. The first and third vias 28 and 30 extend through the thickness of the first ceramic wafer 18 from the upper major face 18B to the lower major face 18C. The first via 28 is generally centered in the wafer 18 while the third via 30 is off-set toward the annular peripheral edge 18A. The second via 32 extends through the thickness of the second ceramic wafer 20 from the upper major face 20B to the lower major face 20C and is generally centered in the second wafer. The vias 28, 30 and 32 are preferably cylindrically-shaped openings, each having a diameter that ranges from about 40 μm to about 250 μm.

[0042] As depicted in the process flow chart of FIG. 3, the via formation process includes first laser etching the first and second ceramic wafers 18 and 20 where the vias are desired (step 100 in FIG. 3). This is a two-step process. The first step structurally modifies the ceramic wafer 18, 20 by exposing it to laser radiation. For example, it is known that high-purity fused silica has a relatively low light radiation absorbance with radiation wavelengths ranging from about 0.1 μm to 11 μm. The laser spot size is focused on the wafers 18, 20 at the desired locations in order to exceed the fused silica's threshold for absorbed energy density. The pulse width duration ranges from about 300 fs to about 10,000 fs with a repetition rate ranging from about 250 kHz to about 800 kHz. Laser-induced etching of a high-purity fused silica wafer does not cause any significant residual heat in the wafer between pulses. This lack of residual heat makes laser etching an appropriate technique as it prevents the formation of cracks or similar types of damage in the wafers 18 and 20. A high-purity fused silica wafer having a via that is devoid of cracks, and the like, is necessary for forming a hermetic conductive pathway in the via. The resulting cylindrically-shaped vias 28, 30 and 32 are dimensionally defined by the thickness of the first ceramic wafer 18 measured from the upper to the lower major faces 18B, 18C thereof and the thickness of the second ceramic wafer 20 measured from the upper to the lower major faces 20B, 20C thereof. The diameter of the vias is defined by the previously described laser-induced etching process. If subsequent thermal processing of one the wafers 18, 20 is required, the wafers 18, 20 are heated to a temperature that is limited to less than 350° C.

[0043] After the high-purity fused silica wafers 18, 20 have been exposed to laser-induced etching radiation, the wafers 18, 20 are immersed in a chemical etchant. The etchant is a solution of hydrofluoric acid or a caustic solution, for example, of about 30%, by wt., potassium hydroxide. Due to the laser-exposed modification of the ceramic wafers 18, 20, the laser exposed regions are removed in the etchant bath at a much higher rate than unexposed regions. Selectivity, which is defined as the ratio of material removal from the laser-induced etching exposed regions in comparison to the unexposed regions, is higher with the caustic etch solution. The removal rate can be increased by heating the etchant bath to a temperature that ranges from about 50° C. to about 90° C. along with the application of ultrasonic or megasonic agitation of the bath.

[0044] Following the etching step, chemical residue on the ceramic wafers 18, 20 is neutralized with a standard semiconductor cleaning solution, followed by rinsing the wafers in ultra-pure water. To produce a high edge quality via 28, 30 and 32, any debris, asperities, or residual material along the via sidewall is removed using a relatively less-selective etchant, such as hydrofluoric acid. The ceramic wafers 28 and 20 provided with the respective vies 28, 30 and 32 are then subjected to a standard semiconductor cleaning using a solution of two commercially available detergents mixed with ultra-pure water.

[0045] FIGS. 2A to 2D and the flow chart of FIG. 3 relate to forming the electrically conductive pathways 34 and 36 extending through the respective first and third vias 28, 30 in the first ceramic wafer 18 and the electrically conductive pathway 38 extending through the second via 32 in the second ceramic wafer 20. The conductive pathways 34, 36 and 38 are formed by first depositing a titanium adhesion layer (not shown) on the ceramic wafer 18, 20 followed by a “seed” layer 40 (step 102 in FIG. 3) at the via using magnetron sputtering. The adhesion and seed layers completely cover the upper and lower faces 18B and 18C of the first fused silica wafer 18 and the upper and lower faces 20B, 20C of the second fused silica wafer 20 including the via sidewalls, leaving no voids. Gold, an Au/Pt alloy, and rhodium are suitable biocompatible metals for the seed layer 40, with pure gold being preferred. In addition to being biocompatible, these metals and alloys have a suitably low resistivity. The thickness of the seed layer 40 ranges from about 0.1 nm to about 2 μm. Preferred techniques for depositing the adhesion layer and the seed layer 40 include plasma sputtering, magnetron sputtering, electron-beam evaporation, or atomic layer deposition.

[0046] The ceramic wafers 18, 20 are then subjected to an electroplating process to completely fill the seeded vies 28, 30 and 32 with a conductive material forming respective electrically conductive pathways 34, 36 and 38. Gold, Au/Pt alloy, copper and rhodium are preferred for the electrically conductive pathways 34, 36 and 38, with gold being preferred for pathways 34 and 36 and copper being preferred for pathway 38. In the electrolytic plating process, the ceramic wafers 18 and 20 are coated with a photoresist and then the vias 28, 30 and 32 are exposed by traditional photolithography. In order to prevent voids and seams, ultrasonic agitation or surfactants may be used in the electrolytic plating bath.

[0047] An alternate method for providing the representative electrically conductive pathways 34, 36 and 38 is to fill the vies 28, 30 and 32 with a paste or ink of a substantially pure platinum paste (step 104 in FIG. 3). The ceramic wafers 18 and 20 are provided in a brown-state so that sintering is only for the purpose of causing the paste or ink of the platinum-containing material to form a coherent mass by heating the ceramic wafers 18, 20 without melting the paste or ink (step 106 in FIG. 3). The sintered platinum is hermetically sealed to the ceramic comprising the wafers 18, 20 without the aid of a metallization contacting the ceramic in the vias 28, 30 and 32. A paste is defined as a composition having a viscosity that ranges from about 1×10.sup.5 to about 1×10.sup.10 centipoise (cP) while an ink has a viscosity that ranges from about 0.1 cP to about 50,000 cP. A suitable process for forming a platinum-containing conductive pathway in a via extending through a ceramic substrate is described in U.S. Pat. No. 8,653,384 to Tang et al., which is assigned to the assignee of the present invention and incorporated herein by reference.

[0048] According to another embodiment of the present invention, in lieu of the substantially pure platinum paste, or ink filled into the vies 28, 30 and 32, the vias are filled with a composite reinforced metal ceramic (CRMC) material. The CRMC material is a platinum-containing material that comprises, by weight %, from about 10:90 ceramic: platinum to about 90:10 ceramic: platinum or, from about 70:30 ceramic: platinum to about 30:70 ceramic: platinum. The ceramic is preferably alumina.

[0049] Next, as shown in FIG. 2D, the remaining adhesion layer and the seed layer 40 covering the opposed major faces 18B, 18C of the first ceramic wafer 18 and the opposed major faces 20B, 20C of the second ceramic wafer 20 are removed (step 108 in FIG. 3). This is done by etching the wafers 18, 20 with a 30% to 60%, by wt., potassium iodide solution at a temperature ranging from about 25° C. to about 80° C.

[0050] An alternative method for removing the adhesion and seed layers from the opposed major faces 18B, 18C and 20B, 20C is to subject the ceramic wafers 18, 20 to a chemical-mechanical polishing. In addition to removing the adhesion and seed layers, this polishing step simultaneously planarize the electrically conductive pathways 34, 36 and 38 extending through the vias 28, 30 and 32.

[0051] In a manufacturing setting as previously described in the Summary of the Invention section of this specification, a typical via array can range from about 100 to about 1,000 vias extending through a host ceramic sheet. The ceramic wafers 18 and 20 depicted in FIG. 1 are then cut out of the host sheets having a shape and size that is suitable for manufacturing the electrical energy power source 10 that is desired for powering an implantable medical device, and the like.

[0052] The electrically conductive pathways 34, 36 and 38 extending through the high-purity fused silica wafers 18 and 20 can also be provided by a screen-printing process.

[0053] Referring back to FIG. 1, a thin-film cathode current collector 42 is contacted to the lower major face 18C of the first ceramic wafer 18 using physical vapor deposition (PVD). The cathode current collector 42 is preferably a continuous layer of titanium that is devoid of perforations and is in electrical continuity with the electrically conductive pathway 34 residing in the via 28. The titanium current collector 42 has a thickness measured outwardly from the lower major face 18C of the first ceramic wafer 18 that ranges from about 0.1 μm to about 3 μm. Nickel, stainless steel, tantalum, platinum, gold, aluminum, cobalt, molybdenum, a Ti/NiV composite, and alloys thereof are also suitable materials for the cathode current collector 42.

[0054] A layer of cathode active material 24 is supported on the cathode current collector 42. The cathode active material 24 preferably extends outwardly beyond the peripheral edge of the current collector 42 but is spaced inwardly from the intermediate ceramic ring 16. The cathode active material 24 is deposited using a physical vapor deposition process and has a thickness that ranges from about 25 μm to about 5,000 μm. Suitable cathode active materials for a secondary electrochemical cell are lithiated metal oxide-based materials, for example LiCoO.sub.2, LiMnO.sub.2, LiMn.sub.2O.sub.4, LiFePO.sub.4, Ag.sub.2V.sub.4O.sub.11, V.sub.2O.sub.5 and lithium nickel manganese cobalt oxide (LiNi.sub.aMn.sub.bCo.sub.1-a-bO.sub.2). In that manner, the conductive pathway 34 serves as a positive-polarity terminal electrically connecting the cathode active material 24 through the cathode current collector 42 to the upper major face 18BC of the first ceramic wafer 18.

[0055] In a similar manner, a thin-film anode current collector 44 is contacted to the upper major face 20B of the second ceramic wafer 20 using physical vapor deposition (PVD). The anode current collector 44 is preferably a continuous layer of an electrically conductive material having a thickness measured outwardly from the upper major face 20B of the ceramic wafer 20 that ranges from about 0.1 μm to about 3 μm. Titanium, copper, nickel stainless steel, tantalum, platinum, gold, aluminum, cobalt, molybdenum, a Ti/NiV composite, and alloys thereof are also suitable materials for the anode current collector 44.

[0056] If the conductive pathway 38 and current collector 44 are both made of copper, a contact pad 46 of a biocompatible end biostable material is contacted to the lower major face 20C of the second ceramic wafer 20, covering the conductive pathway 38. The contact pad 46 is preferably made of gold and is deposited on the lower ceramic wafer 20 using physical vapor deposition (PVD).

[0057] A layer of anode active material 22 is then supported on the anode current collector 44. The anode active material 22 preferably extends outwardly beyond the peripheral edge of the current collector 44 but is spaced inwardly from the intermediate ceramic ring 16 and has a thickness that ranges from about 25 μm to about 4,000 μm. Suitable anode active materials for a primary electrochemical cell include lithium and its alloys and intermetallic compounds including, for example, Li—Si, Li—Sn, Li—Al, Li—B and Li—Si—B alloys, and mixtures and oxides thereof. Carbonaceous materials such as carbon, graphite silicon, lithium titanium oxide are suitable anode materials for a secondary electrical energy power source. In that manner, the conductive pathway 38 serves as a negative-polarity terminal electrically connecting the anode active material 22 through the anode current collector 44 to the lower major face 20C of the second ceramic wafer 20.

[0058] As previously described in the Summary of the Invention section of this specification, in a high-volume manufacturing process, the first or upper ceramic wafer 18, the intermediate ceramic ring 16 and the second or lower ceramic wafer 20 are contained in respective ceramic sheets which, after being provided with their respective conductive vias and shaped opening, are micro-bonded together. However, with reference to FIG. 4 and for the sake of simplicity, the micro-bonding process for manufacturing the casing 12 for an electrical energy power source 10 according to the present invention will be described with respect to a single intermediate ceramic ring 16 micro-bonded to a single upper ceramic wafer 18 and a single lower ceramic wafer 20.

[0059] Thus, referring now to FIG. 4, following cleaning, the exemplary second high-purity fused silica wafer 20 with the electrically conductive pathway 38 extending therethrough is first mounted on the lower surface 16C of the exemplary intermediate high-purity fused silica ring 16. With the second fused silica wafer 20 and the fused silica ring 16 in registry with each other, the assembly is subjected to a pneumatic pressure that is sufficient to ensure optical contact of the fused silica wafer 20 with the fused silica ring 16. An optical cover glass (not shown) that is transparent to an incident laser beam is positioned in contact with the lower major face 20C of the second fused silica wafer 20, opposite the fused silica ring 16. A laser light directed at the transparent cover glass then penetrates through the cover glass to cause interdiffusion of the respective fused silicas at the interface of the wafer 20 contacting the ring 16.

[0060] After the second high-purity fused silica wafer 20 is micro-bonded or micro-welded to the high-purity fused silica ring 16, the resulting subassembly is flipped over, and the first high-purity fused silica wafer 18 with the electrically conductive pathways 34, 36 extending therethrough is mounted on the upper surface 16B of the fused silica ring 16. As with the second fused silica wafer 20 micro-bonded to the fused silica ring 16, the first fused silica wafer 18 in registry with the ring 16 is subjected to a pneumatic pressure that is sufficient to ensure optical contact of the wafer 18 and the ring 16. An optical cover glass (not shown) that is transparent to the incident laser beam is positioned in contact with the upper major face 18B of the first wafer 18, opposite the fused silica ring 16. As before, a laser light directed at the transparent cover glass then penetrates through the cover glass to cause interdiffusion of the respective fused silicas at the interface of the wafer 18 contacting the ring 16.

[0061] Critical laser bonding parameters for the laser and its beam include the numerical aperture (NA) of the laser and the spot size, focal length, pulse energy, pulse width, frequency, and focal length of the laser beam. Suitable micro-bonding welds are achieved using a laser with a spot size of about 1 μm to about 10 μm, a numerical aperture (NA) of about 0.2 to about 0.8, a focal length that ranges from about 10 mm to about 30 mm, a pulse energy that ranges from about 30 μJ to about 50 μJ, a pulse width that ranges from about 400 fs to about 800 fs at a frequency that ranges from about 200 kHz to about 800 kHz with an average power that ranges from about 10 W to about 15 W. The laser beam has a wavelength that ranges from ultraviolet light at about 355 nm to infrared radiation (IR) at about 1030 nm. A suitable laser is one that produces a Bessel-like light beam, however, it is noted that the present invention is not limited to the beam source and the specific weld parameters described above. Instead, they are exemplary.

[0062] Referring now to FIGS. 4 and 5, it is within the scope of the present invention that two high-purity fused silica members can be stacked and laser welded or micro-bonded together. A suitable laser station is equipped with a height sensor 50 that is capable of detecting the interface between air and either the upper fused silica wafer 18 or air and the lower fused silica wafer 20. Then, knowing the thickness of the fused silica wafer 18 or 20, the intensity of the laser beam is adjusted to weld at the interface between the fused silica wafer 18 or 20 and the fused silica ring 16. It is known that air has a refractive index of 1.0 and high-purity fused silica has a refractive index of 1.45.

[0063] As shown in FIG. 5, the variations of these refractive indices can then be observed in the form of a peak formation. The laser beam can be tuned to focus on the individual peak shown in the graph plus the thickness of the wafer 20 to target the specific interface with the fused silica ring 16 during the welding process. Then, electromagnetic (EM) radiation from the laser at a given wavelength is applied to the second fused silica wafer 20 for interdiffusion of fused silica atoms to the silica atoms of the high-purity fused silica ring 16. That is how two high-purity fused silica members are micro-bonded to each other.

[0064] After the second high-purity fused silica wafer 20 is micro-bonded or micro-welded to the high-purity fused silica ring 16, the resulting subassembly is flipped over, and the first high-purity fused silica wafer 18 is micro-bonded or micro-welded to the other surface of the high-purity fused silica ring 16 using the same technique described above. The micro-bond thickness between the wafers 18 or 20 and the ring 16 ranges from about 60 μm to about 120 μm.

[0065] The third via 30 in the first ceramic wafer 18 is spaced laterally from the current collector 42 and serves as an electrolyte fill port. Positioning the third via 30 spaced from the outer edge of the cathode current collector 42 provides a space or gap between the inner major face 18C of the first ceramic wafer 18 and the cathode active material 24 so that electrolyte (not shown) can flow into the interior of the casing 12 to activate the electrode assembly 14.

[0066] The third conductive pathway 36 extending through the third via 30 in the first ceramic wafer 18 is provided with a through hole 48 serving as an electrolyte fill opening or port. An activating electrolyte (not shown) is then filled into the casing through the fill port 48. A suitable electrolyte is a non-aqueous solution containing a lithium salt selected from LiPF.sub.6, LiBF.sub.4, LiAsF.sub.6, LiSbF.sub.6, LiClO.sub.4, LiO.sub.2, LiAlCl.sub.4, LiGaCl.sub.4, LiC(SO.sub.2CF.sub.3).sub.3, LiN (SO.sub.2CF.sub.3).sub.2, LiSCN, LiO.sub.3SCF.sub.3, LiC.sub.6FSO.sub.3, LiO.sub.2CCF.sub.3, LiSO.sub.6F, LiB(C.sub.6H.sub.5).sub.4, LiCF.sub.3SO.sub.3, and mixtures thereof, dissolved in a mixture of solvents including ethylene carbonate, dimethyl carbonate, ethyl methyl carbonate, diethyl carbonate, dimethoxyethane, gamma-butyrolactone and propylene carbonate, plus various additives as required.

[0067] Preferably, the fill port 48 is closed by directing a laser beam at the material comprising the conductive pathway 36, or by a closure plug (not shown) that is press-fit into the port 48.

[0068] After electrolyte filling, the electrical energy power sources are subjected to an appropriate electrical test depending on their chemistry. In one exemplary secondary electrochemical cell, a carbon/lithium nickel manganese cobalt oxide couple with a 2.5 mm diameter and a 0.7 mm height is charged to 4.2 V. The cell is then aged on open-circuit voltage (OCV) for 2 to 3 weeks after which several charge/discharge cycles between 4.2 and 3.0 V are performed at a C/5 rate.

[0069] Exemplary electrical energy power sources according to the present invention have a diameter of about 2.5 mm and a height of about 0.7 mm. The wall thickness of the ceramic ring 16 portion of the power source 10 is about 100 μm while the upper and lower plate-shaped wafers 18 and 20 have thicknesses that are ≤100 μm, but in some power sources can be as thick as about 4 mm. Thus, the efficient packaging of the miniature-sized electrical energy power sources according to the present invention results in a delivered capacity of about 300 μAh, or more.

[0070] It is appreciated that various modifications to the inventive concepts described herein may be apparent to those skilled in the art without departing from the spirit and scope of the present invention as defined by the hereinafter appended claims.