ELECTROMAGNETIC INTERFERENCE SUPPRESSION CIRCUIT AND RELATED SENSING CIRCUIT

Abstract

An electromagnetic interference suppression circuit and a related sensing circuit. The sensing circuit includes an input and an output operatively coupled with the input. The input is adapted to be connected on a power line and in series between a load and a shunt circuit connected across power lines between a power source and the load. The output is adapted to provide a signal (V.sub.s) associated with an electromagnetic interference signal (V.sub.n) generated by or at the load and arranged to be experienced by the shunt circuit. The signal (V.sub.s) can be used for determining a suppression signal (V.sub.n′) for reducing, or substantially eliminating, the electromagnetic interference signal (V.sub.n). The electromagnetic interference suppression circuit includes the sensing circuit, a regulator circuit, and a controlled signal source.

Claims

1. A sensing circuit for an electromagnetic interference suppression circuit, comprising: an input adapted to be connected on a power line and in series between a load and a shunt circuit connected across power lines between a power source and the load; and an output operatively coupled with the input, and adapted to provide a signal (V.sub.s) associated with an electromagnetic interference signal (V.sub.n) generated by or at the load and arranged to be experienced by the shunt circuit for determining a suppression signal (V.sub.n′) for reducing, or substantially eliminating, the electromagnetic interference signal (V.sub.n).

2. The sensing circuit of claim 1, wherein the input and output are isolated.

3. The sensing circuit of claim 1, wherein the input and output are not isolated.

4. The sensing circuit of claim 1, wherein the sensing circuit comprises: a resonator circuit providing the input, the output, or both the input and the output.

5. The sensing circuit of claim 4, wherein the resonator circuit is configured with a resonance frequency arranged below a frequency of the electromagnetic interference signal (V.sub.n) to be suppressed and above a frequency of the power source.

6. The sensing circuit of claim 4, wherein the resonator circuit comprises a capacitive circuit and an inductive circuit connected in parallel.

7. The sensing circuit of claim 4, wherein the sensing circuit further comprises: a transformer connected in parallel with the resonator circuit; wherein one of the transformer and the resonator circuit provides the input and the other one of the transformer and the resonator circuit provides the output.

8. The sensing circuit of claim 1, wherein the sensing circuit comprises: a transformer with primary and secondary coils; and a capacitive circuit connected in parallel with the transformer, wherein one of the transformer and the capacitive circuit provides the input and the other one of the transformer and the capacitive circuit provides the output.

9. The sensing circuit of claim 8, wherein the capacitive circuit is connected in parallel with the primary coil to define a resonator circuit.

10. The sensing circuit of claim 8, wherein the capacitive circuit is connected in parallel with the secondary coil to define a resonator circuit.

11. The sensing circuit of claim 9, wherein the resonator circuit is configured with a resonance frequency arranged below a frequency of the electromagnetic interference signal (V.sub.n) to be suppressed and above a frequency of the power source.

12. An electromagnetic interference suppression circuit, comprising: the sensing circuit of claim 1, with the input connected on the power line; a regulator circuit adapted to regulate the signal (V.sub.s) provided by the sensing circuit to provide a regulated signal; and a controlled signal source adapted to provide, based on the regulated signal, a suppression signal (V.sub.n′) for reducing, or substantially eliminating, the electromagnetic interference signal (V.sub.n)

13. The electromagnetic interference suppression circuit of claim 12, wherein the suppression signal (V.sub.n′) has substantially the same magnitude as the electromagnetic interference signal (V.sub.n); and/or wherein the suppression signal (V.sub.n′) has an about 180 degrees phase shift from the electromagnetic interference signal (V.sub.n).

14. The electromagnetic interference suppression circuit of claim 12, wherein the controlled signal source and the sensing circuit are connected on the same power line; or wherein the controlled signal source and the sensing circuit are connected on different power lines.

15. The electromagnetic interference suppression circuit of claim 12, wherein the controlled signal source is a controlled voltage source adapted to provide the suppression signal (V.sub.n′) in the form of a suppression voltage signal.

16. The electromagnetic interference suppression circuit of claim 12, wherein the controlled signal source comprises a transformer.

17. The electromagnetic interference suppression circuit of claim 12, wherein the regulator circuit comprises an amplifier.

18. The electromagnetic interference suppression circuit of claim 12, further comprising: the shunt circuit connected across power lines between the power source and the load.

19. The electromagnetic interference suppression circuit of claim 18, wherein one of the controlled signal source and the sensing circuit is connected between the power source and the shunt circuit, and the other one of the controlled signal source and the sensing circuit is connected between the load and the shunt circuit.

20. The electromagnetic interference suppression circuit of claim 18, wherein the shunt circuit comprises a capacitive circuit.

21. (canceled)

Description

BRIEF DESCRIPTION OF DRAWINGS

[0024] Embodiments of the invention will now be described, by way of example, with reference to the accompanying drawings in which:

[0025] FIG. 1 is a circuit diagram of an existing circuit for suppressing electromagnetic interference signals;

[0026] FIG. 2 is a circuit diagram of a control circuit for suppressing electromagnetic interference signals in one embodiment of the invention;

[0027] FIG. 3 is a circuit diagram of an implementation of a portion of the control circuit of FIG. 2 in one embodiment of the invention;

[0028] FIG. 4 is a circuit diagram of an implementation of a portion of the control circuit of FIG. 2 in one embodiment of the invention;

[0029] FIG. 5 is a circuit diagram of an implementation of a portion of the control circuit of FIG. 2 in one embodiment of the invention; and

[0030] FIG. 6 is a circuit diagram of an implementation of a portion of the control circuit of FIG. 2 in one embodiment of the invention.

DETAILED DESCRIPTION OF PREFERRED EMBODIMENT

[0031] FIG. 2 shows a control circuit 100 for suppressing differential mode electromagnetic interference signals in one embodiment of the invention. The control circuit 100 is arranged between the power source 20 and the electronic circuit 30 (as a load). The power source 20 is adapted to power the electronic circuit 30. In one application the control circuit 100 can suppress differential mode electromagnetic interference signals generated by the electronic circuit 30.

[0032] The control circuit 100 includes a shunt circuit and an electromagnetic interference suppression circuit. The shunt circuit is formed by a capacitor C.sub.x connected between the power source 20 and the electronic circuit 30. The electromagnetic interference suppression circuit includes a sensing circuit 102 that is connected on a supply power line and is arranged in series between the capacitor C.sub.x and the electronic circuit 30. The sensing circuit 102 has a gain factor K.sub.s and includes an input (e.g., input terminals/nodes) on the power line and an output (e.g., output terminals/nodes). The input and output of the sensing circuit 102 may be isolated (i.e., the input terminals/nodes are different from the output terminals/nodes), or may not be isolated (i.e., the input terminals/nodes are the same as the output terminals/nodes), as explained in greater detail below. The sensing circuit 102 is adapted to detect the electromagnetic interference signal V.sub.n to be suppressed across the capacitor C.sub.x as a result of the noise signal V.sub.no generated by the electronic circuit 30 so as to prevent the interference signals from reaching the power source 20. Based on the detection, the sensing circuit 102 is adapted to output a signal V.sub.s associated with (e.g., correlated to) the electromagnetic interference signal V.sub.n. In one example, the signal V.sub.s equals to the interference signal V.sub.n times the gain factor K.sub.s of the sensing circuit 102. If the factor K.sub.s is about 1, the signal V.sub.s is substantially the same as the electromagnetic interference signal V.sub.n.

[0033] The electromagnetic interference suppression circuit also includes regulator circuit, in the form of an amplifier 104, and a controlled voltage source 106. The amplifier 104 has a gain factor K.sub.a, and includes two input terminals connected with the output terminals of the sensing circuit 102, and an output terminal connected with the controlled voltage source. The amplifier 104 may take the signal V.sub.s as input, regulate it by a gain factor K.sub.a, and produce an output signal equals to the signal V.sub.s times the gain factor K.sub.a of the amplifier 104. The controlled voltage source is connected the supply power line and is arranged in series between the power source 20 and the capacitor C.sub.x. The controlled voltage source 106 has a gain factor K.sub.v, and includes an input connected with the output of the amplifier 104 and an output connected on the supply power line between the power source 20 and the capacitor C.sub.x. The output signal V.sub.n′ of the controlled voltage source 106 equals to the signal outputted from the amplifier 104 times the gain factor K.sub.v of the controlled voltage source 106. In one implementation, the controlled voltage source 106 is formed by a transformer, with a primary coil as the input and the secondary coil as the output, and the turns ratio N of the transformer (number of turns of secondary coil divided by number of turns of primary coil of transformer) defining the gain factor K.sub.v. In one example, the signal V.sub.s is substantially the same as the electromagnetic interference signal V.sub.n, and the product of the gain factors K.sub.s, K.sub.a and K.sub.v has a magnitude of about 1 and a phase difference of about 180 degrees from the electromagnetic interference signal V.sub.n. This prevents the interference signal V.sub.n from propagating into the power source 20. In this embodiment, the electromagnetic interference suppression circuit forms a loop.

[0034] In this embodiment, the signals V.sub.n, V.sub.no, V.sub.s, and V.sub.n′ are in the form of voltage signals. The sensing circuit 102 achieves its function to sense the interference voltage signal V.sub.n based on the Kirchhoff's voltage law. Referring to FIG. 2, according to Kirchhoff's voltage law, the sum of the voltage across the input of the sensing circuit 102 and the interference voltage signal V.sub.n across capacitor C.sub.x should equal the interference signal V.sub.no appearing across (e.g., generated by) the electronic circuit 30. In one embodiment in which the input and the output of the sensing circuit 102 are not isolated, the output voltage signal V.sub.s from the sensing circuit 102 is the same as the signal at the input of the sensing circuit 102. In one embodiment in which the input and the output of the sensing circuit 102 are isolated, the output voltage signal V.sub.s from the sensing circuit 102 equals the signal at the input of the sensing circuit 102 times the gain factor of the sensing circuit 102. The arrangement of the electromagnetic interference suppression circuit, in particular the sensing circuit 102, minimizes the influence of the interference signals from the power source 20 on the electromagnetic interference suppression performance. The relatively high immunity to the interference signals from the power source 20 is due to capacitor C.sub.x providing a low impedance path for the interference signal from the power source 20 (which are high frequency signals). Such path has relatively low impedance compared with the impedance of the input of the sensing circuit 102 in series with the impedance across the electronic circuit 20. In addition, the interference signals from the power source 20 seen by the sensing circuit 102 is substantially reduced, as the interference signals appearing at capacitor C.sub.x due to the interference signal from the power source 20 are divided based on the ratio of the impedance of sensing circuit 102 to the sum of impedance of sensing circuit 102 and the input impedance of the electronic circuit 30. This arrangement provides improved electromagnetic interference suppression performance over some existing circuits such that in FIG. 1.

[0035] FIG. 3 shows an implementation of the sensing circuit 102A in one embodiment. In this embodiment, the input and the output of the sensing circuit 102A are not isolated. The terminals/nodes of the sensing circuit 102A are connected in series between the interference signal source V.sub.no and the capacitor C.sub.x. The sensing circuit 102A includes a capacitor C.sub.s and an inductor L.sub.p connected in parallel forming a resonator circuit. The resonance frequency of the resonator circuit is arranged below the minimum frequency of the electromagnetic interference signal V.sub.n to be suppressed across the capacitor C.sub.x and above a frequency of the power source 20 such that the sensing circuit 102A can provide high pass and low pass functions as needed, e.g., be considered as capacitor for high frequency signals and inductor for low frequency signals.

[0036] The interference signal V.sub.n to be suppressed across the capacitor C.sub.x and the signal V.sub.s outputted by the sensing circuit 102A can be considered as a capacitive voltage divider of the noise signal V.sub.no according to Kirchhoff's voltage law as in the following expressions:

[00001]$V_n=\frac{C_s}{\left(C_s+C_x\right)}{V}_{\mathrm{no}}$$V_s=\frac{C_x}{\left(C_s+C_x\right)}{V}_{\mathrm{no}}$

[0037] Hence

[00002]$\frac{V_s}{V_n}=\frac{C_x}{C_s}$$\mathrm{Or}$$V_s=\frac{C_x}{C_s}{V}_n=K_s{V}_n$

[0038] In this example, the gain factor K.sub.s of the sensing circuit 102A equals to a capacitance of the capacitor C.sub.x divided by capacitance of the capacitor C.sub.s. The inductor L.sub.p may enable the flow of power (e.g., current, low frequency in nature) from the power source 20 to the electronic circuit 30 while the capacitor C.sub.s presents a high impedance to prevent the flow of power (e.g., current, low frequency in nature) from the power source 20 to the electronic circuit 30.

[0039] FIG. 4 shows another implementation of the sensing circuit 102B in one embodiment. In this embodiment, the input and the output of the sensing circuit 102B are isolated. The input terminals/nodes of the sensing circuit 1028 are connected in series between the interference signal source V.sub.no and the capacitor C.sub.x. The sensing circuit 1028 includes a capacitor C.sub.s and an inductor L.sub.p connected in parallel forming a resonator circuit and arranged at the input of the sensing circuit 102B, and a transformer connected in parallel to the resonator circuit and arranged at the output of the sensing circuit 102B. The transformer includes primary coil with N.sub.p turns and a secondary coil with N.sub.s turns, defining a turns ratio N (N.sub.s/N.sub.p). The primary coil is connected directly in parallel with the inductor L.sub.p. The transformer provides isolation between the input and output of the sensing circuit 102B, and an additional voltage gain factor equals to the turns ratio N. The resonance frequency of the resonator circuit is arranged below the minimum frequency of the electromagnetic interference signal V.sub.n to be suppressed across the capacitor C.sub.x and above a frequency of the power source 20 such that the sensing circuit 102B can provide high pass and low pass functions as needed, e.g., can be considered as capacitor for high frequency signals and inductor for low frequency signals. In this implementation, the inductance of the primary coil of transformer is much greater than the inductance of inductor L.sub.p such that there exists negligible parallel resonance effect.

[0040] The interference signal V.sub.n to be suppressed across the capacitor C.sub.x and the sensed sign V.sub.s′ at the input of sensing circuit 102B can be considered as a capacitive voltage divider of the noise signal V.sub.no according to Kirchhoff's voltage law as in the following expressions:

[00003]$V_n=\frac{C_s}{\left(C_s+C_x\right)}{V}_{\mathrm{no}}$$V_s^{\prime }=\frac{C_x}{\left(C_s+C_x\right)}{V}_{\mathrm{no}}$

[0041] Hence

[00004]$\frac{V_s^{\prime }}{V_n}=\frac{C_x}{C_s}$$\mathrm{Or}$$V_s^{\prime }=\frac{C_x}{C_s}{V}_n$

[0042] The secondary coil of the transformer serves as the output of sensing circuit 102B with an output voltage V.sub.s that equals to (N is the turns ratio of transformer):

[00005]$V_s=N\frac{C_x}{C_s}{V}_n=K_s{V}_n$

[0043] In this example, the gain factor K.sub.s of the sensing circuit 102B equals to the product of the turns ratio N of the transformer and the capacitance of the capacitor C.sub.x, divided by the capacitance of the capacitor C.sub.s. The inductor L.sub.p may enable the flow of power (e.g., current, low frequency in nature) from the power source 20 to the electronic circuit 30 while the capacitor C.sub.s presents a high impedance to prevent the flow of power (e.g., current, low frequency in nature) from the power source 20 to the electronic circuit 30. The inductance of the transformer primary coil should be substantially larger than the inductance of inductor L.sub.p such that resonant frequency will not be substantially affected and power current flows mainly through the inductor L.sub.p.

[0044] FIG. 5 shows another implementation of the sensing circuit 102C in one embodiment. In this embodiment, the input and the output of the sensing circuit 102C are isolated. The input terminals/nodes of the sensing circuit 102Care connected in series between the interference signal source V.sub.no and the capacitor C.sub.x. The sensing circuit 102C includes a capacitor C.sub.s arranged at the input of the sensing circuit 102C, and a transformer connected in parallel to the capacitor C.sub.s and arranged at the output of the sensing circuit 102C. The transformer includes primary coil with N.sub.p turns and a secondary coil with N.sub.s turns, defining a turns ratio N (N.sub.s/N.sub.p). The transformer provides isolation between the input and output of the sensing circuit 102C. The primary coil of the transformer is connected directly in parallel with the capacitor C.sub.s to form a resonator circuit. The resonance frequency of the resonator circuit is arranged below the minimum frequency of the electromagnetic interference signal V.sub.n to be suppressed across the capacitor C.sub.x and above a frequency of the power source 20 such that the sensing circuit 102C can provide high pass and low pass functions as needed, e.g., can be considered as capacitor for high frequency signals and inductor (primary side of the transformer) for low frequency signals.

[0045] The interference signal V.sub.n to be suppressed across the capacitor C.sub.x and the sensed sign V.sub.s′ at the input of sensing circuit 102C (the capacitor C.sub.s) can be considered as a capacitive voltage divider of the noise signal V.sub.no according to Kirchhoff's voltage law as in the following expressions:

[00006]$V_n=\frac{C_s}{\left(C_s+C_x\right)}{V}_{\mathrm{no}}$$V_s^{\prime }=\frac{C_x}{\left(C_s+C_x\right)}{V}_{\mathrm{no}}$

[0046] Hence

[00007]$\frac{V_s^{\prime }}{V_n}=\frac{C_x}{C_s}$$\mathrm{Or}$$V_s^{\prime }=\frac{C_x}{C_s}{V}_n$

[0047] The secondary coil of the transformer serves as the output of sensing circuit 102C with an output voltage V.sub.s that equals to (N is the turns ratio of transformer):

[00008]$V_s=N\frac{C_x}{C_s}{V}_n=K_s{V}_n$

[0048] In this example, the gain factor K.sub.s of the sensing circuit 102C equals to the product of the turns ratio N of the transformer and the capacitance of the capacitor C.sub.x, divided by the capacitance of the capacitor C.sub.s. The primary side of the transformer may enable the flow of power (e.g., current, low frequency in nature) from the power source 20 to the electronic circuit 30 while the capacitor C.sub.s presents a high impedance to prevent the flow of power (e.g., current, low frequency in nature) from the power source 20 to the electronic circuit 30.

[0049] FIG. 6 shows another implementation of the sensing circuit 102D in one embodiment. The sensing circuit 102D in FIG. 6 is similar to the sensing circuit 102C in FIG. 5, except that the capacitor is moved to the output (FIG. 6) of the sensing circuit 102D. In this embodiment, the input and the output of the sensing circuit 102D are isolated. The input terminals/nodes of the sensing circuit 102D are connected in series between the interference signal source V.sub.no and the capacitor C.sub.x. The sensing circuit 102D includes a transformer arranged at the input of the sensing circuit 102D, and a capacitor C.sub.s′ connected in parallel to the transformer and arranged at the output of the sensing circuit 102D. The transformer includes primary coil with N.sub.p turns and a secondary coil with N.sub.s turns, defining a turns ratio N (N.sub.s/N.sub.p). The transformer provides isolation between the input and output of the sensing circuit 102D. The secondary coil of the transformer is connected directly in parallel with the capacitor C.sub.s′ to form a resonator circuit. The resonance frequency of the resonator circuit is arranged below the minimum frequency of the electromagnetic interference signal V.sub.n to be suppressed across the capacitor C.sub.x and above a frequency of the power source 20 such that the sensing circuit 102D can provide high pass and low pass functions as needed, e.g., can be considered as capacitor for high frequency signals and inductor (primary and secondary sides of the transformer) for low frequency signals.

[0050] The interference signal V.sub.n to be suppressed across the capacitor C.sub.x and the sensed sign V.sub.s′ at the input of sensing circuit 102D (primary side of the transformer) can be considered as a capacitive voltage divider of the noise signal V.sub.no according to Kirchhoff's voltage law as in the following expressions:

[00009]$V_n=\frac{N^2{C}_S^{\prime }}{\left(N^2{C}_S^{\prime }+C_x\right)}{V}_{\mathrm{no}}$$V_s^{\prime }=\frac{C_x}{\left(N^2{C}_S^{\prime }+C_x\right)}{V}_{\mathrm{no}}$

[0051] Hence

[00010]$\frac{V_s^{\prime }}{V_n}=\frac{C_x}{N^2{C}_S^{\prime }}$$\mathrm{Or}$$V_s^{\prime }=\frac{C_x}{N^2{C}_S^{\prime }}{V}_n$

[0052] The secondary coil of the transformer serves as the output of sensing circuit 102D with an output voltage V.sub.s that equals to (N is the turns ratio of transformer):

[00011]$V_s=\frac{C_x}{{\mathrm{NC}}_S^{\prime }}{V}_n=K_s{V}_n$

[0053] In this example, the gain factor K.sub.s of the sensing circuit 102D equals to capacitance of the capacitor C.sub.x divided by the product of the turns ratio N of the transformer and the capacitance of the capacitor C.sub.s′. The primary side of the transformer may enable the flow of power (e.g., current, low frequency in nature) from the power source 20 to the electronic circuit 30 while the capacitor C.sub.s′ presents a high impedance to prevent the flow of power (e.g., current, low frequency in nature) from the power source 20 to the electronic circuit 30. Compared with the embodiment of FIG. 5, in this embodiment, arranging the capacitor C.sub.s′ at the output instead of at the input of the sensing circuit can scale the capacitance of the capacitor C.sub.s′ by the square of the transformer turns ratio N, thus enabling the capacitor C.sub.s′ to have a small capacitance.

[0054] The control circuit and the electromagnetic interference suppression circuit in the above embodiments can be applied to circuit applications not specifically illustrated in the description and/or drawings.

[0055] It will be appreciated by persons skilled in the art that numerous variations and/or modifications may be made to the invention as illustrated with respect to the specific embodiments without departing from the scope of the invention as defined in the claims. The described embodiments of the invention are therefore in all respects illustrative and not restrictive.

[0056] For example, the shunt circuit need not be formed by a single capacitor, but can be formed by different electronic component(s) forming a high pass circuit. The sensing circuit may include different constructions of resonator circuits and/or transformers. The resonator circuits may be formed from different capacitive and inductive circuits. The resonant frequency of the resonator circuit need not be strictly below a frequency of the electromagnetic interference signal V.sub.n and above a frequency of the power source. The amplifier can be replaced with other regulator circuit and/or the controlled voltage source can be replaced with other circuit components, so long as they serve the purpose to cooperate with the sensing circuit and the controlled voltage source to suppress electromagnetic interference signals. The sensing circuit and/or the controlled voltage source can be connected on the supply line or the return line; the sensing circuit and the controlled voltage source can be connected on different lines or on the same line. The illustrated capacitor can be embodied by any capacitive circuit(s) or circuit component(s); the illustrated inductors can be embodied by any inductive circuit(s) or circuit component(s). In embodiments where a transformer is used, the turns ratio can be chosen depending on needs, so long as the overall circuit can suppress the electromagnetic interference signals. Likewise, the gain factors of the sensing circuit, the amplifier, and the controlled voltage source can be any values provided that the overall circuit can suppress the electromagnetic interference signals. Suppression of signals need not be complete elimination but can be reduction of signals by, e.g., at least 90%.