PERC-like contact to CdTe solar cells
11189748 · 2021-11-30
Assignee
Inventors
- Michael J. Heben (Toledo, OH, US)
- Adam B. Phillips (Toledo, OH, US)
- Fadhil K. Alfadhili (Toledo, OH, US)
- Randall J. Ellingson (Toledo, OH, US)
- Ebin Bastola (Toledo, OH, US)
- Dipendra Pokhrel (Toledo, OH, US)
- Kamala Khanal Subedi (Toledo, OH, US)
Cpc classification
H01L31/0296
ELECTRICITY
Y02P70/50
GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
H01L31/1828
ELECTRICITY
H01L31/073
ELECTRICITY
Y02E10/543
GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
International classification
H01L31/18
ELECTRICITY
H01L31/0296
ELECTRICITY
Abstract
Methods for forming electrical contacts with CdTe layers, methods for forming photovoltaic devices, methods for passivating a CdTe surface, and photovoltaic devices are described.
Claims
1. A method of forming a contact on a CdTe surface, the method comprising: contacting a CdTe surface with a precursor solution comprising a passivating precursor and an electrically conductive or semiconducting nanomaterial to form a coated surface; annealing the coated surface to form an interface layer comprising a passivating material on the CdTe surface; and depositing an electrical contact on the interface layer, wherein the electrical contact is electrically connected to the CdTe surface through the electrically conductive or semiconducting nanomaterial.
2. The method of claim 1, wherein the electrical contact is electrically connected to the CdTe surface only through the electrically conductive or semiconductor nanomaterial.
3. The method of claim 1, wherein the passivating precursor comprises aluminum or magnesium.
4. The method of claim 1, wherein the passivating precursor comprises aluminum acetylacetonate (Al(acac).sub.3) or aluminum nitrate nonahydrate.
5. The method of claim 1, wherein the precursor solution is prepared by mixing a SWCNT solution comprising single-walled carbon nanotubes (SWCNTs) and hydroxypropyl cellulose with a Al(acac).sub.3 solution comprising Al(acac).sub.3.
6. The method of claim 5, wherein equal volumes of the SWCNT solution and the Al(acac).sub.3 solution are mixed to prepare the precursor solution.
7. The method of claim 1, wherein the passivating material comprises an oxide, a nitride, a silicide, a nitride, a fluoride, a carbide, or amorphous silicon.
8. The method of claim 1, wherein the passivating material comprises Al.sub.2O.sub.3, MgO, SiO.sub.2, or CuAlO.sub.x.
9. The method of claim 1, wherein the electrically conductive or semiconducting nanomaterial comprises single-walled carbon nanotubes (SWCNTs), metal filaments, or Te nanowires.
10. The method of claim 1, wherein the annealing is conducted in air.
11. The method of claim 1, wherein the annealing is conducted at a temperature ranging from about 220° C. to about 350° C.
12. The method of claim 1, wherein the annealing is conducted for a time period ranging from about 1 minute to about 20 minutes.
13. The method of claim 1, wherein the interface layer comprises CuAlO.sub.x or Al.sub.2O.sub.3 with SWCNTs therein.
Description
BRIEF DESCRIPTION OF THE DRAWINGS
(1) The patent or application file may contain one or more drawings executed in color and/or one or more photographs. Copies of this patent or patent application publication with color drawing(s) and/or photograph(s) will be provided by the U.S. Patent and Trademark Office upon request and payment of the necessary fees.
(2)
(3)
(4)
(5)
(6)
(7)
(8)
(9)
(10)
(11)
(12)
(13)
(14)
(15)
(16)
(17)
(18)
(19)
(20)
(21)
(22)
(23)
(24)
(25)
(26)
(27)
DETAILED DESCRIPTION
(28) Throughout this disclosure, various publications, patents, and published patent specifications are referenced by an identifying citation. The disclosures of these publications, patents, and published patent specifications are hereby incorporated by reference into the present disclosure in their entirety to more fully describe the state of the art to which this invention pertains.
(29) Provided herein are photovoltaic devices, and methods for making the same, which include an interface layer between a CdTe absorber layer and a metal back contact comprising a passivating material and, in some embodiments, an electrically conductive or semiconducting nanomaterial extending through the passivating material so as to provide an electrical connection from the CdTe absorber to the metal back contact. The electrically conductive or semiconducting nanomaterial may form point contacts to the metal back contact from the CdTe absorber layer. The interface layer can be made through solution processing which can result in the interface layer providing both a passivating effect, reducing recombinations of charge carriers, and electrical conductivity through the electrically conductive or semiconducting nanomaterial. The interface layer can be made to passivate only select locations of the CdTe absorber layer surface, such as crystalline facets or high activity sites.
(30) Referring now to
(31) The support 12 may be any suitable transparent material such as glass or plastic. The support 12 provides structural support to the growing layer stack during manufacturing. For ease of illustration, the support 12 is not depicted in
(32) The front contact layer 14 may generally be a transparent conductive material, such as a transparent conductive oxide. Non-limiting examples of transparent conductive oxides include SnO.sub.2, indium tin oxide (ITO), In.sub.2O.sub.3, fluorine-doped tin oxide (FTO), and ZnO.
(33) The n-type semiconductor layer 16 may be a transparent semiconductor material doped n-type, and may also be referred to as a window layer or an emitter layer. The n-type semiconductor layer 16 may be formed from any suitable semiconductor material such as, but not limited to, CdS, ZnS, CdSe, ZnO, or ZnSe.
(34) The p-type semiconductor layer 18 may be a semiconductor material doped p-type and may also be referred to as an absorber layer. The p-type semiconductor layer 18 may be formed from any suitable II-VI semiconductor material such as, but not limited to, CdTe, CdSe, CdS, ZnO, ZnSe, ZnS, or ZnTe. The p-type semiconductor layer 18 may alternatively be formed from a II-VI ternary alloy such as CdZnTe, HgCdTe, or HgZnTe. Though CdTe is described herein for exemplary purposes, it is understood that the present disclosure is not limited to CdTe.
(35) Referring still to
(36) Any of the above-described layers may be deposited or fabricated through know methods such as chemical bath deposition, chemical vapor deposition, thermal evaporation, sputtering, magnetron sputtering, physical vapor deposition, vapor transport deposition, molecular beam epitaxy, or electron beam evaporation. Any of the above-described layers may also include various dopants. The photovoltaic device 10 may additionally include a variety of optional layers such as buffer layers.
(37) Referring to
(38) Referring now to
(39) Referring now to
(40) Referring now to
(41) Referring now to
(42) There are many suitable methods for depositing the above-described layers and materials. As a non-limiting example, the interface layer 20 may be deposited on the surface 30 of the absorber layer 18 through solution processing. A precursor solution containing a precursor to the passivating material may be deposited on the absorber layer surface 30 to form a coating, and the coating may then be annealed in the presence of air to produce a layer of the passivating material, such as a passivating oxide material from an oxide precursor. The annealing may be conducted with, for instance, heat provided by a laser, a heat lamp, or a hot wire. The precursor may be, for example, a solution containing a metal such as aluminum or magnesium that may be processed to form a passivating material such as an oxide. In one non-limiting example, the precursor is aluminum acetylacetonate (Al(acac).sub.3). In another non-limiting example, the precursor is aluminum nitrate nonahydrate. The precursor solution may include the electrically conductive or semiconducting nanomaterial in addition to the passivating precursor. The electrically conductive or semiconducting nanomaterial may be provided in the form of a solution of nanostructures, such as a SWCNT solution. High aspect ratio materials such as graphene strips or multiwalled carbon nanotubes may also be used. In such embodiments, the passivating precursor solution and a SWCNT solution may be mixed, for example using equal volumes, to create the precursor solution that is coated onto the absorber layer surface 30.
(43) Alternatively, the electrically conductive or semiconducting nanomaterial may be deposited on the absorber layer surface 30 prior to the absorber layer surface 30 being contacted with the precursor solution containing the passivating precursor. This approach allows for depositing the passivating material by other processes, such as PECVD, sputtering, hot wire deposition, or spray deposition. This approach may also be advantageous when the passivating material is a nitride, such as SiN, or amorphous silicon.
(44) In either method, the subsequent coating may be annealed in the presence of air to create the interface layer 20, which is a passitiving material layer that includes the electrically conductive or semiconducting nanomaterial. Advantageously, the electrically conductive or semiconducting nanomaterial may have a tendency to find the grains of the absorber layer 18, especially when the absorber layer 18 is formed from CdTe, and therefore provide point contacts to the absorber layer 18 through the passivating material. At the same time, the interface layer 20 may provide passivation of the absorber layer 18 by reducing the number of recombinations at the absorber layer surface 30.
(45) The annealing step may be conducted at a temperature ranging from about 200° C. to about 400° C., or from about 220° C. to about 350° C., for a period of time of from about 1 minute to about 30 minutes, or from about 5 minutes to about 15 minutes. In one non-limiting example, the annealing is conducted at a temperature of about 300° C. for about 10 minutes. The annealing may be conducted in the presence of air so as to form a passivating material, such as an oxide, from the precursor solution.
(46) The interface layer 20 may be deposited after other activation steps known in the art, such as a CdCl.sub.2 treatment step, have been undertaken. Furthermore, other methods of forming the interface layer 20 are nonetheless possible and encompassed within the scope of the present disclosure. For example, a passivating material may be deposited through a porous nanotube layer formed on the absorber layer surface 30. An electrically conductive or semiconducting nanomaterial may be deposited on the absorber layer surface 30 followed by a subsequent vapor or solution deposition of passivating material.
(47) Referring again to
(48) As shown in the examples herein, photovoltaic devices having an interface layer as described may have improved characteristics and performance This is especially true for photovoltaic devices that utilize CdTe as the absorber material. Unlike crystalline silicon, which have grain sizes on the order of cm, CdTe absorber layers are composed of a polycrystalline thin film with grain sizes on the order of of the film thickness, which is a few microns. Because of these small grain sizes, creating a regular array of holes in a passivation layer for conductors (as opposed to the presently described method) does not result in good electrical contact to every grain. When this is the case, not all of the photogenerated carriers can be collected, and the device performance suffers. And creating holes for each grain is impractical because the grains are randomly located and each sample would require a different pattern. In addition, the process of making holes through a passivation layer may introduce additional recombination sites at the surface that may prevent improved device performance. Thus, nanomaterials, which may form a porous network instead of dense film, can be used in conjunction with a passivating material to form low barrier contacts to CdTe through a passivation layer that allows for complete coverage of the CdTe surface by the passivation layer with random point contacts via the embedded nanomaterials which may interact with each grain.
(49) Though the methods of the present disclosure has been described with reference to a CdTe-containing photovoltaic device, the present disclosure may be employed to create an electrical contact on any semiconductor surface, and is not limited to use in fabricating photovoltaic devices.
EXAMPLES
Example I—Solution-Processed Aluminum Oxide (Al.SUB.2.O.SUB.3.) Layer to Passivate the Rear Surface of CdTe Solar Cells
(50) In this example, the formation of an Al.sub.2O.sub.3 layer at the back surface of CdTe samples by solution processing is described. It is shown that aluminum oxide can be formed onto the CdTe surface by solution processing. Improved device performance and carrier lifetimes was reproducibly demonstrated with the addition of the solution processed Al.sub.2O.sub.3. Both atomic force microscope and auger electron spectroscopy confirmed formation of Al.sub.2O.sub.3. The Al.sub.2O.sub.3 layer at the back of CdTe devices increases photoluminescence (PL) intensity and time-resolved photoluminescence (TRPL) decay lifetimes. The PCE for devices with a standard Cu/Au back contact was improved from 12.2% to 13.6% with the addition of the solution processed Al.sub.2O.sub.3 due to the improvement of the open circuit voltage (V.sub.OC) and fill factor (FF), indicating that the solution processed Al.sub.2O.sub.3 has the ability to reduce interface recombination.
(51) Materials and Methods
(52) 120 nm CdS and 3 μm CdTe films were fabricated using commercial vapor transport deposition onto TEC™-15 glass substrates by Willard and Kelsey Solar Group. CdCl.sub.2 treatment was used to activate the CdS/CdTe devices by applying a saturated solution of CdCl.sub.2 in methanol to the CdTe film surfaces followed by annealing at 390° C. in dry air ambient for 30 minutes. Samples were then rinsed with methanol to remove the excess CdCl.sub.2. Subsequently, a layer of Al.sub.2O.sub.3 was deposited onto the CdCl.sub.2 treated CdTe samples using solution processing. A precursor solution consisting of 400 mg aluminum acetylacetonate Al(acac).sub.3 (Sigma Aldrich Co. LLC) was dissolved in 20 mL of 2-methoxyethanol and was spin coated onto CdCl.sub.2 treated CdTe samples at 2000 rpm for 25 s. Samples were then annealed in air at 300° C. for 10 minutes. Finally, a 40 nm Au electrode was thermally evaporated for the samples without Cu, while for the samples with Cu, a 3 nm Cu was evaporated followed by annealing at 150° C. for 40 min in air to diffuse the Cu. For the sample with Al.sub.2O.sub.3/Cu/Au, the Cu diffusion time was at 150 for 40, 60, or 80 minutes. Individual cells of area 0.06 cm.sup.2 were defined using laser scribing.
(53) The surface morphology of the samples was characterized using an atomic Force microscope (AFM) (Veeco metrology group). Auger electron spectroscopy (Perkin-Elmer PHI600) was used to characterize the composition of the samples. Room temperature photoluminescence (PL) measurements were performed with a 532 nm cw laser with beam diameter ˜100 μm at 3.1 W/cm.sup.2. Samples were excited through the film side. PL signal was detected by a Horiba Symphony-II CCD detector at integration time 0.5s after a 300 g mm.sup.−1 grating monochromator. The room temperature time-resolved photoluminescence (TRPL) measurements of the CdTe samples were performed with a 532 nm pulsed laser with beam diameter ˜150 μm at 132 mW/cm.sup.2 with the repetition rate of 20 MHz when the samples were excited through the film side at the peak emission wavelength determined from the PL measurement. The TRPL measurements of the CdTe samples were performed with a time correlated single photon counting (TCSPC) module with integration time 300 s. Bi-exponential PL decays were observed. Current density voltage (J-V) curves were measured under simulated AM1.5G solar irradiation (Newport model 91195A-1000) using a Keithley 2400 source meter. The external quantum efficiency (EQE) measurements were acquired from a wavelength range of 300-900 nm using a PV Measurements Inc., model IVQE8-CQE system.
(54) Results and Discussion
(55) To examine the formation of Al.sub.2O.sub.3 on the CdTe surface, AFM images of CdTe films with and without Al.sub.2O.sub.3 were obtained (
(56) TABLE-US-00001 TABLE 1 Auger depth profile results of the CdTe and CdTe with different coating cycles of Al.sub.2O.sub.3 samples Sample Al % Cd % Te % CdTe 0.7 51.6 47.7 CdTe/Al.sub.2O.sub.3 5.5 48.9 45.6 (1 Cycle) CdTe/Al.sub.2O.sub.3 19.8 41.7 38.5 (3 Cycle) CdTe/Al.sub.2O.sub.3 25.8 37.9 36.3 (5 Cycle) CdTe/Al.sub.2O.sub.3 33.0 34.4 32.6 (7 Cycle) CdTe/Al.sub.2O.sub.3 50.7 25.2 24.1 (9 Cycle)
(57) To determine the effect of the Al.sub.2O.sub.3layer on the lifetime of CdTe films at the back surface, PL and TRPL measurements were performed. For these measurements, all samples were measured without the Au electrode in order to minimize carrier collection at the back surface.
(58)
(59) In an effort to increase the PCE, the back of CdTe was doped with Cu to reduce the Schottky barrier at the back.
(60) TABLE-US-00002 TABLE 2 Current density-voltage characteristics of the best and the average for more than 20 devices V.sub.OC J.sub.SC FF PCE Device (V) (mA/cm.sup.2) (%) (%) Without Cu CdTe/Au Average 0.700 ± 0.013 21.0 ± 0.2 70.9 ± 0.8 10.4 ± 0.4 Best 0.726 21.5 72.0 11.3 CdTe/Al.sub.2O.sub.3 Average 0.756 ± 0.008 21.2 ± 0.3 73.1 ± 0.9 11.7 ± 0.3 (1 cycle)/Au Best 0.770 21.6 74.9 12.5 CdTe/Al.sub.2O.sub.3 Average 0.767 ± 0.005 20.5 ± 0.2 68.9 ± 1.1 10.8 ± 0.3 (3 cycles)/Au Best 0.771 20.7 70.4 11.3 CdTe/Al.sub.2O.sub.3 Average 0.755 ± 0.010 20.5 ± 0.2 58.8 ± 1.4 9.1 ± 0.3 (5 cycles)/Au Best 0.785 20.4 60.4 9.7 CdTe/Al.sub.2O.sub.3 Average 0.753 ± 0.014 20.4 ± 0.1 47.7 ± 1.2 7.3 ± 0.3 (7 cycles)/Au Best 0.772 20.6 50.1 7.9 CdTe/Al.sub.2O.sub.3 Average 0.781 ± 0.037 20.3 ± 0.4 37.9 ± 3.7 6.0 ± 0.7 (9 cycles)/Au Best 0.830 20.7 40.1 6.9 With Cu CdTe/Cu/Au Average 0.783 ± 0.004 21.1 ± 0.3 72.5 ± 0.9 12.0 ± 0.2 150° C. 40 min Best 0.790 21.8 71.5 12.3 CdTe/Al.sub.2O.sub.3 Average 0.800 ± 0.008 20.8 ± 0.5 76.4 ± 0.8 12.7 ± 0.2 (1 cycle)/Cu/Au Best 0.806 21.8 75.6 13.3 150° C. 40 min CdTe/Al.sub.2O.sub.3 Average 0.818 ± 0.007 20.7 ± 0.4 76.2 ± 0.7 12.9 ± 0.3 (1 cycle)/Cu/Au Best 0.830 21.5 76.2 13.6 150° C. 60 min CdTe/Al.sub.2O.sub.3 Average 0.821 ± 0.006 20.5 ± 0.3 75.8 ± 1 12.7 ± 0.3 (1 cycle)/Cu/Au Best 0.829 20.7 76.4 13.1 150° C. 80 min
(61) In conclusion, a Al.sub.2O.sub.3 layer was spin coated by precursor Al(acac).sub.3 on the back surface of CdTe to use as a passivation layer. With the optimized spin coating layer at 1 cycle, the Al.sub.2O.sub.3 may partially cover the surface of CdTe and improve device performance by increasing V.sub.OC and FF due to reduce carrier recombination at the back of the devices. PL and TRPL measurements show that the carrier lifetime of the CdCl.sub.2 treated CdTe sample was greatly increased with the use of Al.sub.2O.sub.3, indicating that Al.sub.2O.sub.3 reduces the interface recombination. This indicates that the solution processed Al.sub.2O.sub.3 layer can act as a passivation layer for the rear surface of CdTe. Additionally, using 1 coating cycle of Al.sub.2O.sub.3 with 40 nm Au back electrode, a Cu free back contact for CdTe device has been obtained which has the same CdTe device efficiency as the standard device using a Cu/Au back contact.
Example II—Interface Layers with SWCNTs and Al.SUB.2.O.SUB.3
(62) Nanomaterials may be used to form low barrier contacts to CdTe. Some of these materials, such as nanowires, form a porous network instead of a dense film. These pores may be filled with a passivation material to create a passivating layer embedded with electrical contacts that extend from the CdTe absorber layer to the metal electrode at the back.
(63) A solution process as described in Example I above was employed to create devices having nanowires embedded in a passivating material in an interface layer between the absorber layer and the back contact layer. A doctor blade coating process was used to deposit the coatings of SWCNTs with Al.sub.2O.sub.3 which were annealed to form the interface layers.
(64) A SWCNT solution was prepared from 6 mg SWCNT, 400 mg HCP, and 40 mL ethanol. A solution of Al(acac).sub.3 was prepared from 100 mg Al(acac).sub.3 and 5 mL ethanol. 300 μL of the SWCNT solution was mixed with 300 μL of the Al(acac).sub.3 solution to form the precursor solution that was coated onto the CdTe surface with a doctor blade process. For comparison, the SWCNT solution was also coated onto the CdTe surface without the Al(acac).sub.3 component. The coatings were annealed at 350° C. for 10 minutes to form interface layers.
(65) TABLE-US-00003 TABLE 3 Coating sheet resistance and thickness Sheet resistance Thickness Sample (Ohm/seq) (nm) SWCNT/HCP 1.2E+09 62 SWCNT/HCP 1.1E+05 ND Annealing @ 350° C. for 10 min SWCNT/HCP/Al(acac)3 1.3E+09 37 SWCNT/HCP/Al(acac)3 3.1E+05 ND Annealing @ 350° C. for 10 min
(66)
(67)
(68) Additional CdS/CdTe devices were made varying the concentration of SWCNTs. The SWCNT solution contained either 6, 18, or 30 mg SWCNTs, 400 mg hydroxypropyl cellulose (HCP), and 40 mL ethanol. The Al(acac).sub.3 solution contained 100 mg Al(acac).sub.3 and 5 mL 2-methoxyethanol. 300 μL of the SWCNT solution were mixed with 300 μL of the Al(acac).sub.3 solution to form a precursor solution that was deposited onto the CdTe surface using a doctor blade. The samples were baked at 350° C. for 10 minutes on a hot plate in air. The devices were completed with a 40 nm Au back contact.
(69)
Example III—Back Surface Passivation of CdTe Solar Cells by Solution-Processed Oxidized Aluminum
(70) The efficiency of polycrystalline CdTe thin-film photovoltaic devices has increased recently due to improvements in the emitter/absorber interface and the absorber itself. Thus, reducing the minority carrier recombination at the rear surface is becoming an increasingly important goal for achieving 25% efficiency. In this example, a solution-based process that reduces minority carrier recombination at the back surface of the device and increases the open circuit voltage (V.sub.OC) is described. The process deposits very small amounts of oxidized aluminum in a nonconformal manner, and the Fill Factor (FF) and photoconversion efficiency (PCE) are improved when the total amount added corresponds to ˜1 monolayer of alumina. Addition of further aluminum causes the FF and efficiency to drop as the interface becomes blocking to current flow. The optimized layer increases the average baseline PCE for Cu-free device stacks made with a commercial process from 10.4% to 11.7%, while the efficiency with Cu doping was improved from 12.2% to 13.6%. The conclusion that interface recombination is reduced at the back surface is supported by time-resolved photoluminescence spectroscopy and quantum efficiency measurements performed at the maximum power point.
(71) Introduction
(72) Despite recent advancements, there remains substantial opportunity to increase the open circuit voltage (V.sub.OC) of CdTe-based solar cells. As further improvements in the bulk lifetime are obtained, through approaches such as Cl passivation and Se incorporation, and the interface recombination at the front surface is curtailed through emitter engineering, the back contact limits the device efficiency. Consequently, it would be advantageous to develop back contact structures that can reduce minority recombination while still providing for efficient majority carrier extraction. Back surface passivation can be accomplished either by reducing the concentration of electrically active defects at the interface, or by creating a back surface field that repels minority carriers through electrostatics or doping profiles.
(73) Alumina is a useful material for back surface passivation due to a high density of negative charge and a low degree of lattice mismatch (3.7%) between the unit cell of the (0001) surface of Al.sub.2O.sub.3 and the (111) surface of CdTe. These characteristics offer the ability to repel minority carriers and create a low defect density interface, respectively.
(74) Atomic layer deposition (ALD) and sputtering have been employed in efforts to use alumina to passivate the rear surface of CdTe solar cells. Alumina layers in thicknesses up to 5 nm have been deposited by ALD, and showed an improvement in baseline PCE of the device from 10.7% to 12.1% when the Al.sub.2O.sub.3 thickness was 1 nm, though further increases in Al.sub.2O.sub.3 thickness led to poorer device performance It is believed that a 1 nm layer of alumina is sufficiently thin to allow holes to tunnel, but thick enough to present fixed charge that repels minority carrier electrons. An improvement in the long wavelength response in the short-circuit external quantum efficiency (EQE) has been seen as evidence for reduced back surface recombination, but no improvement in J.sub.SC was observed as would be expected for this proposed mechanism. Also inconsistent was the lack of evidence for current-blocking for the thicker Al.sub.2O.sub.3 layers. In contrast, others have applied Al.sub.2O.sub.3 to CdTe back surfaces by sputtering and saw pronounced kinks in the J-V characteristic at layer thicknesses of 3 and 5 nm. In this case, however, the device efficiency was not improved with the addition of Al.sub.2O.sub.3. Thus, while Al.sub.2O.sub.3 has been shown to provide passivation for photoluminescence lifetime measurements, there has been no conclusive evidence to date for alumina providing an efficiency enhancement via back surface passivation in a CdTe PV device.
(75) In this example, a solution-based process for passivating the back surface of CdTe solar cells is demonstrated. Aluminum acetylacetonate (Al(acac).sub.3) dissolved in methoxyethanol was used to deposit alumina on the back surface of CdTe solar cells by spin-coating and heating. The amount of material deposited was increased by repeating the spin-coating/heating cycle. Photoluminescence measurements showed that the minority carrier lifetime increased with the number of cycles, as did the V.sub.oc of the finished devices. Scanning electron microscopy and atomic force microscopy revealed that the deposited aluminum was not formed in a uniform layer and was present in very small amounts, indicating that the passivation effects maybe be site- and/or facet-specific. X-ray photoelectron and Auger electron spectroscopy studies (XPS and AES, respectively) revealed that the CdTe surfaces that produced the best performing devices had less than a monolayer of Al in a chemical state similar to that found for alumina. External quantum efficiency measurements made at the maximum power point of the J-V curves clearly show that the device improvement was due to back surface passivation. The optimized solution process increased the average baseline efficiency for Cu-free devices made with a commercial process from 10.4% to 11.7%, while the efficiency for devices made with Cu doping improved from 12.2% to 13.6%.
(76) Materials and Methods
(77) CdTe device stacks composed of ˜100 nm of CdS and ˜3 μm of CdTe were deposited onto TEC™-15M coated soda-lime glass substrates in an unoptimized commercial vapor transport deposition process by Willard and Kelsey Solar Group. The CdTe material was activated by applying a saturated solution of CdCl.sub.2 in methanol to the sample and heating to 390° C. in dry air for 30 minutes. Excess CdCl.sub.2 was removed by rinsing with methanol. The aluminum acetylacetonate Al(acac).sub.3 (Sigma Aldrich Co. LLC, 99.999%) precursor solution was prepared by dissolving 400 mg of as-received powder in 20 mL of 2-methoxyethanol. The solution was pipetted onto a stationary sample which was then spun at 2000 rpm for 25 s. Samples were then heated in laboratory air to 300° C. for 10 minutes. The spinning/heating cycles were performed 1, 3, 5, 7, and 9 times to produce increasingly thick passivation layers. Devices were formed by depositing 40 nm of Au by thermal evaporation to form a back-metal electrode. Some samples also had a thin layer (3 nm) of Cu deposited prior to Au deposition to enhance doping and lower the back surface barrier. In these cases, a subsequent heating step at 150° C. was performed in air to promote Cu diffusion for times ranging between 40 and 80 minutes. Individual solar cells were precisely defined by laser scribing (0.06 cm.sup.2). Performance statistics were evaluated for relatively large data sets (n>20).
(78) Both steady-state and time-resolved PL measurements were performed with 532 nm excitation of the film side of the samples at room temperature. Current density voltage (J-V) curves were measured under simulated AM1.5G solar irradiation (Newport model 91195A-1000), and external quantum efficiency (EQE) measurements were acquired from wavelength range of 300-900 nm using a PV Measurements Inc., model IVQE8-CQE system. Samples were excited through the film side and PL signals were detected by a Horiba Symphony-II CCD detector.
(79) Time-resolved photoluminescence (TRPL) measurements were also performed at 532 nm, with a ˜150 μm spot at an intensity of ˜132 mW/cm.sup.2 with the repetition rate of 20 MHz when the samples were excited through the film side at the peak emission wavelength determined from the PL measurement. The TRPL measurements of CdTe samples were performed with time correlated single photon counting (TCSPC) module with integration time 300s bi-exponential PL decays observed. Current density voltage (J-V) curves were measured under simulated AM1.5G solar irradiation (Newport model 91195A-1000) using a Keithley 2400 source meter. The external quantum efficiency (EQE) measurements were acquired from wavelength range of 300-900 nm using a PV Measurements Inc. model IVQE8-CQE system, with a cw laser with beam diameter ˜100 μm at 3.1 W/cm.sup.2.
(80) Results
(81)
(82) The trend of V.sub.OC with increasing spin/heat cycles can be clearly seen in
(83)
(84)
(85) Stoichiometric Al.sub.2O.sub.3 films have previously been produced on silicon wafers by heating Al(acac).sub.3 powder to 150° C. and introducing the entrained vapor to samples heated to temperatures between 250 and 600° C. The films were adherent, though, indicating that the reaction occurred at the surface rather than in the gas phase. This example indicates that the aluminum deposition reaction from Al(acac).sub.3 is also surface specific in the presence of polycrystalline CdTe. Thus, the Al.sup.3+ species can be referred to as a surface phase of alumina.
(86) In an effort to increase the PCE further, Cu was used to improve the level of p-type doping and reduce the Schottky barrier at the back surface.
(87) Simulations of back buffer layers for high efficiency CdTe solar cells make it clear that a combined increase in FF and V.sub.OC with a fixed J.sub.SC is consistent with reduced back surface recombination. A 1 nm ALD alumina coating has previously produced a combined V.sub.OC and FF increase due to back surface passivation, but the change in the shunt resistance at zero bias shown for such devices indicates that the result may have been due to a shunt passivation instead. Here, to prove that back surface passivation is responsible for the device improvement observed with the thinner alumina-like films produced by solution processing, external quantum efficiency (EQE) measurements were performed under both zero bias (short circuit) and 1-sun maximum power point bias.
(88) TABLE-US-00004 TABLE 4 J-V performance data for devices fabricated with and without Cu and Al.sub.2O.sub.3 deposition/heating cycles. Data is presented for the best device and the population of devices in each data set (n > 20). V.sub.OC J.sub.SC FF PCE Device (V) (mA/cm.sup.2) (%) (%) Without Cu CdTe/Au Average 0.700 ± 0.013 21.0 ± 0.2 70.9 ± 0.8 10.4 ± 0.4 Best 0.726 21.5 72.0 11.3 CdTe/Al.sub.2O.sub.3 Average 0.756 ± 0.008 21.2 ± 0.3 73.1 ± 0.9 11.7 ± 0.3 (1 cycle)/Au Best 0.770 21.6 74.9 12.5 CdTe/Al.sub.2O.sub.3 Average 0.767 ± 0.005 20.5 ± 0.2 68.9 ± 1.1 10.8 ± 0.3 (3 cycles)/Au Best 0.771 20.7 70.4 11.3 CdTe/Al.sub.2O.sub.3 Average 0.755 ± 0.010 20.5 ± 0.2 58.8 ± 1.4 9.1 ± 0.3 (5 cycles)/Au Best 0.785 20.4 60.4 9.7 CdTe/Al.sub.2O.sub.3 Average 0.753 ± 0.014 20.4 ± 0.1 47.7 ± 1.2 7.3 ± 0.3 (7 cycles)/Au Best 0.772 20.6 50.1 7.9 CdTe/Al.sub.2O.sub.3 Average 0.781 ± 0.037 20.3 ± 0.4 37.9 ± 3.7 6.0 ± 0.7 (9 cycles)/Au Best 0.830 20.7 40.1 6.9 With Cu CdTe/Cu/Au Average 0.783 ± 0.004 21.1 ± 0.3 72.5 ± 0.9 12.0 ± 0.2 150° C. 40 min Best 0.790 21.8 71.5 12.3 CdTe/Al.sub.2O.sub.3 Average 0.800 ± 0.008 20.8 ± 0.5 76.4 ± 0.8 12.7 ± 0.2 (1 cycle)/Cu/Au Best 0.806 21.8 75.6 13.3 150° C. 40 min CdTe/Al.sub.2O.sub.3 Average 0.818 ± 0.007 20.7 ± 0.4 76.2 ± 0.7 12.9 ± 0.3 (1 cycle)/Cu/Au Best 0.830 21.5 76.2 13.6 150° C. 60 min CdTe/Al.sub.2O.sub.3 Average 0.821 ± 0.006 20.5 ± 0.3 75.8 ± 1 12.7 ± 0.3 (1 cycle)/Cu/Au Best 0.829 20.7 76.4 13.1 150° C. 80 min
(89) TABLE-US-00005 TABLE 5 Auger depth profile results of the CdTe and CdTe with different coating cycles of Al.sub.2O.sub.3 samples Sample Al % Cd % Te % CdTe 0.7 51.6 47.7 CdTe/Al.sub.2O.sub.3 5.5 48.9 45.6 (1 Cycle) CdTe/Al.sub.2O.sub.3 19.8 41.7 38.5 (3 Cycle) CdTe/Al.sub.2O.sub.3 25.8 37.9 36.3 (5 Cycle) CdTe/Al.sub.2O.sub.3 33.0 34.4 32.6 (7 Cycle) CdTe/Al.sub.2O.sub.3 50.7 25.2 24.1 (9 Cycle)
(90)
(91) Conclusion
(92) In this example, an Al.sub.2O.sub.3layer was spin coated by precursor Al(acac).sub.3 on the back surface of CdTe to use as a passivation layer. With the spin coating layer at 1 cycle, the Al.sub.2O.sub.3 partially covered the surface of CdTe and improved device performance by increasing V.sub.OC and FF due to reduced carrier recombination at the back of the devices. PL and TRPL measurements show that the carrier lifetime of the CdCl.sub.2 treated CdTe sample was greatly increased with the use of Al.sub.2O.sub.3, indicating that Al.sub.2O.sub.3 reduces the interface recombination. This indicates that the solution processed Al.sub.2O.sub.3 layer can act as a passivation layer for the rear surface of CdTe. Additionally, using 1 coating cycle of Al.sub.2O.sub.3 with 40 nm Au back electrode, a Cu free back contact for CdTe device was obtained which has the same CdTe device efficiency as the standard device using Cu/Au back contact.
(93) Example IV—Solution Based Cu Doped Aluminum Oxide as a Passivating Back Interface Layer for CdTe Solar Cells
(94) In this example, the solution-sourced synthesis and application of Cu-doped aluminum oxide (CuAlO.sub.x) as a passivating layer in CdTe-based thin film solar cells is demonstrated. Cu doped aluminum oxide (CuAlO.sub.x) was fabricated and used as a passivating layer to CdTe based thin film solar cells by using the solution based technique. The chemicals were analyzed by using the thermogravimetric analysis (TGA) and residual gas analyzer (RGA) technique to find out the suitable temperature for annealing. The films with ˜10 nm thickness are highly transparent on the visible and near infrared region. Films were deposited on the CdTe polycrystalline stack by using the solution based (spin coating) process at 220° C. for 15 mins. CdTe devices with this passivation layer were studied by using the steady state photoluminescence and time resolved photoluminescence to see the minority carrier lifetime increment. The results show that the incorporation of the CuAlO.sub.x/Au as standard back contact layer helps to eliminate the rollover and minimize the crossover effect by improving both fill factor (FF) and open circuit voltage (V.sub.OC) of the solar cells in comparison to the control sample (CdTe/Au). This improvement is consistent with the increment of the mean lifetime from 0.8 ns to 2.6 ns through the contact side illumination and from 4.3 ns to 37.6 ns from the glass side illumination of the CdTe devices with the inclusion of the CuAlO.sub.x. These improvements show the passivation effect on the CdTe.
(95) Introduction
(96) The improvement of the efficiency in CdTe solar cells involves reducing the front interface defects, rear interface defects, bulk semiconductor, and grain boundaries. Open circuit voltage (V.sub.OC) is mainly limited by the rear interface defects. Proper passivation of the rear interface may help to improve the V.sub.OC and Fill Factor (FF). Appropriate doping and lifetime increments are important for the improvement of the V.sub.OC. It is also believed that the fermi level off set between the absorber layer buffer layer plays an important role to reduce the back surface recombination velocity.
(97) Alumina materials have a unique capacity, capable of exhibiting a negative fixed charge. Negatively charged defects presented in the oxide may repel minority electrons and help to reduce the surface recombination velocity. Many oxide materials such as TiO.sub.2, SiO.sub.2, and Al.sub.2O.sub.3 may be used for the CdTe interface passivation. Among them, the inclusion of ALD deposited Al.sub.2O.sub.3 has worked better for passivation on CdTe. The solution based Al.sub.2O.sub.3 offers the conspicuous advantages of low-cost, tunable composition, and scalable photovoltaic manufacturing method.
(98) The high work function of CdTe (˜5.7 eV) materials in comparison with other metals would produce the rollover effect in device performance Commonly, CdTe solar cells use Cu-containing back contact materials like Cu/Au, ZnTe: Cu, (CuS).sub.x(ZnS).sub.1-x, BaCu.sub.4S.sub.3. Cu—Al.sub.2O.sub.3 may also be used as a back contact layer by using the ALD Al.sub.2O.sub.3 by evaporating a thick Cu layer as a back contact layer on CdTe. It has been found that a Cu—Al—O interface layer can be formed in 3 mins of heat treatment. After the heat treatment, Cu—Al—O can turn into a CuAlO.sub.2 phase, however, CuAl.sub.2O.sub.4 may remain as the impurity phase with CuAlO.sub.2. Ternary oxide CuAlO.sub.x is natural a p-type, wide bandgap semiconductor that has a semi-insulating to conductive nature with the variation of Cu concentration.
(99) In this example, Cu—Al.sub.2O.sub.3 (CuAlO.sub.x) back contact layers were prepared by using a solution based method. The chemicals were analyzed by using thermal gravimetric analysis (TGA) and residual gas analyzer (RGA) measurement to find out the suitable annealing temperature for the formation of Al.sub.2O.sub.3. Usually, Al get oxidizes at a higher temperature, but the results in this example show that Al oxide can be made at a temperature of less than 300° C. Different Cu concentrations were doped into Al.sub.2O.sub.3 solution and the resulting films were applied as buffer layers for CdTe thin film devices. The optical properties of CuAlO.sub.x films were characterized by using UV-Vis NIR spectroscopy and spectroscopic ellipsometry. Completed devices were characterized by using scanning electron microscopy (SEM), steady state (low temperature, room temperature), photoluminescence (PL), and time resolved photoluminescence (TRPL). It is demonstrated in this example that CdS/CdTe thin film solar cells with a CuAlO.sub.x buffer layer have improved minority carrier lifetime, V.sub.OC, FF, and efficiency (η). The CdTe thin films with Al.sub.2O.sub.3 (2% Cu) have increased minority carrier lifetimes from 0.8 ns to 2.6 ns and 4.3 ns to 37.6 ns from the film side and glass side illumination, respectively. The best device performance in this example was obtained when Al.sub.2O.sub.3 (30% Cu) was used as a buffer layer, with V.sub.OC=836 mV, FF=78%, and η=14.5%, which is 9% higher than the devices completed with 3 nm Cu (metal)/Au back contact, and 5% higher than the devices doped with CuCl.sub.2 solution based process/Au.
(100) Chemicals
(101) Aluminum nitrate nonahydrate (AlH.sub.18N.sub.3O.sub.18, 98%), copper (II) nitrate trihydrate (CuH.sub.6N.sub.2O.sub.9, 99%), and 2-methoxyethanol (C.sub.3H.sub.8O.sub.2) were bought from Fisher Scientific. Aluminum nitrate nonahydrate and copper (II) nitrate trihydrate were stored in the glove box with a nitrogen environment.
(102) Solution and Film Preparation
(103) Sodalime glass substrates were ultrasonically cleaned using detergent and deionized water (DIW) for 30 mins, rinsed several times with DIW, cleaned in methanol for 15 mins, rinsed again by acetone, and finally by DIW before drying the substrate using dry N.sub.2 in the air.
(104) To make the CuAlO.sub.x precursor solution, 0.04 M aluminum nitrate nonahydrate and 0.04 M copper nitrate trihydrate were dissolved in 5 ml of 2-methoxyethanol. The resultant solution was stirred at 200 rpm for 5 mins at the room temperature. The final precursor turned bluish. 50 μl CuAlO.sub.x was spin-coated with a rotating speed of 1000 rpm for 10 s and followed the high rotating speed of 3500 rpm for the 50 s and annealed at 220° C. for 15 mins.
(105) Film Characterization
(106) Unpolarized transmittance and reflectance spectra were measured by a PerkinElmer Lambda 1050 UV/Vis/NIR spectrophotometer. Room temperature ellipsometric spectra (in N=cos 2Ψ, C=sin 2Ψ cos Δ, and S=sin 2Ψ sin Δ) of CuAlO.sub.x film were collected ex situ at 50°, 60°, and 70° angle of incidence using a single rotating compensator multichannel ellipsometer having a spectral range from 0.735 to 5.887 eV (M-2000FI, J. A. Woollam Co.).
(107) Device Fabrication
(108) For the solar cell film stack, CdS (120 nm) and CdTe (3 μm) layers were deposited by commercial vapor transport deposition (VTD) onto TEC™-15 glass substrates by the Willard and Kelsey Solar Group. The CdS/CdTe filmstack was treated with a saturated CdCl.sub.2 solution in methanol, and the devices were annealed at 387° C. for 30 mins in dry air. This treatment helps to advance grain growth, release interfacial strain, and facilitate intermixing at the CdS/CdTe region. CuAlO.sub.X were deposited by the spin coating method and the spin coating procedure for the device was the same as making a film on the glass substrate. Finally, 40 nm gold was thermally evaporated to complete the back contact layer.
(109) Device performance was compared with the CuCl.sub.2 treated and 3 nm Cu evaporated sample, respectively. CuCl.sub.2 treatment was done on CdCb operated CdTe device submerged in 0.1 mM CuCl.sub.2 solution with 24.6 ml DIW and left for 2 mins and rinsed thoroughly by the DIW. The CuCl.sub.2 treatment carried at 200° C. for 20 mins, and the device was completed with 40 nm thermally evaporated gold. For thermally evaporated Cu, after deposition of 3 nm Cu, the device was annealed at 150° C. for 35 mins to diffuse Cu. For both samples, 40 nm Au was thermally evaporated. Finally, the devices were scribed using 532 nm to define an array of approximately 30 cells, each with active device area 0.06 cm.sup.2.
(110) Device Characterization
(111) The surface morphology of the CdTe films was characterized by a Hitachi S-4800 UHR scanning electron microscope (SEM). Room temperature steady states were performed using 532 nm continuous(cw) laser (film side illumination) with beam diameter ˜100 μm and 633 nm cw laser (glass side illumination) with beam diameter of 180 μm at 3.3 W/cm.sup.2 and 450 W/cm.sup.2, respectively. PL signal was detected by a Horiba Symphony-II CCD detector (integration time=0.5 s) after a 300 g.Math.mm.sup.−1 grating monochromator. Low temperature PL measurement was done by using the 532 nm laser with 655 mW/cm.sup.2 laser intensity. A liquid nitrogen cooled Germanium photodiode from Electro-Optical systems was used as a detector. The time-resolved photoluminescence (TRPL) measurements of CdTe samples was performed with a 532 nm and 633 nm pulsed laser with beam diameter ˜140 μm at 153 mW/cm.sup.2 and 9 mW/cm.sup.2 laser power intensity with the repetition rate of 20 MHz and 1 MHz, respectively. The TRPL measurements of CdTe samples were performed with time correlated single photon counting (TCSPC) module with integration time 300 s bi-exponential PL decays were observed. In case of bi-exponential PL decay, the photoluminescence intensity contribution of each component was proportional to the product of amplitude (A.sub.i) and lifetime (τ.sub.i). Therefore, the intensity average lifetime of bi-exponential PL decay is calculated as:
(112)
(113) Current-voltage (J-V) characteristics were measured under simulated AM1.5G illumination using a Keithley 2440 digital source meter and a solar simulator (Newport model 91195A-1000) calibrated using a standard silicon solar cell obtained from the PV Measurement, Inc. External Quantum Efficiency measurements were performed over a wavelength range of 300-910 nm using a PV Instruments (model IVQE8-C) system.
(114) Results and Discussion
(115) To determine suitable air-annealing temperature and decomposition analysis of Al.sub.2O.sub.3, the powder chemical aluminum nitrate nonahydrate (aluminum source) was subjected to TGA and RGA measurement.
(116) Determination of the optical response of thin film CuAlO.sub.x, in the form of the energy-dependent complex refractive index, N(E)=n(E)+ik(E), spectra enables assessment of optical properties related to the PV devices. The band gap of CuAlO.sub.x is 3.6 eV, calculated from the Tauc plot by using absorption coefficient from SE analysis. Others have found the bandgap of CuAlO.sub.2 is 3.5 eV and 3.6 eV, respectively, so the CuAlO.sub.x bandgap determination agrees with reported values. The bulk thickness of CuAlO.sub.x films obtained from SE analysis is ˜10 nm, which also agrees with previously reported values. However, the solution concentration is 4 times higher when standalone films are made in comparison to films in devices. Therefore, the thickness of CuAlO.sub.x on the devices is ˜2.5 nm.
(117)
(118) For the annealing time optimization, the TRPL measurement was done on the CdTe films after putting the Al.sub.2O.sub.3 films on the CdTe. The annealing temperature for Al.sub.2O.sub.3 was set to 200° C., 210° C., 220° C., 230° C., and 250° C. for 15 mins. The laser was excited through the film side illumination and at 220° C. The minority carrier lifetime is high from the film side, which is shown in
(119) To get insight into the relationship between increment of lifetime and the devices performance, devices were completed with CdS/CdTe/Al.sub.2O.sub.3/Au structure. The devices showed better performance in comparison to the CdS/CdTe/Au, and exhibited remarkable improvements in V.sub.OC. The best-performing CdS/CdTe/Al.sub.2O.sub.3/Au cell shows an efficiency 12.1% with V.sub.OC=801 mV, FF=67.5%, J.sub.SC=22.3 mA/cm.sup.2. In contrast, the best-performing CdS/CdTe/Au cell show an efficiency 10.4% with V.sub.OC=715 mV, J.sub.SC=22.3 mA/cm.sup.2, FF=66.6%. The overall efficiency is increased from 10.4% to 12.1% with relative 16.3% improvement. The average device performance with standard deviation is shown in Table 5. However, if the device with CdS/CdTe/3 nm Cu (metal)/Au is compared to the CdS/CdTe/Cu (solution)/Au, the device performance is low, which may be due to the insulating nature of Al.sub.2O.sub.3. The Al.sub.2O.sub.3 precursor solution was doped with 1%, 2%, 5%, 10%, 30%, and 50% of Cu. From
(120) TABLE-US-00006 TABLE 6 Device performance parameters of >20 CdTe solar cells with Al.sub.2O.sub.3(with different Cu concentration) as back contact layers (active device area = 0.06 cm.sup.2) and comparison with standard back contact: average values are expressed along with their standard deviations Cu V.sub.OC J.sub.SC FF η R.sub.S R.sub.sh Concentration (mV) (mA/cm.sup.2) (%) (%) (Ω cm.sup.2) (Ω cm.sup.2) 0% 790 ± 9 22.2 ± 0.1 67.0 ± 1.3 11.8 ± 0.3 23.2 ± 11.0 3511 ± 815 1% Cu 827 ± 3 21.6 ± 0.3 71.3 ± 1.5 12.8 ± 0.3 6.3 ± 0.4 2506 ± 513 2% Cu 832 ± 2 22.2 ± 0.2 68.2 ± 2.0 12.6 ± 0.4 12.1 ± 4.9 2041 ± 338 5% Cu 820 ± 5 21.8 ± 0.2 73.4 ± 1.0 13.1 ± 0.3 4.5 ± 0.6 2890 ± 342 10% Cu 822 ± 4 22.1 ± 0.4 73.2 ± 0.6 13.3 ± 0.3 4.2 ± 0.5 3191 ± 290 30% Cu 831 ± 3 22.2 ± 0.2 75.8 ± 1.6 14.0 ± 0.4 3.1 ± 0.9 4945 ± 600 50% Cu 819 ± 4 22.0 ± 0.2 75.6 ± 0.5 13.6 ± 0.3 2.5 ± 0.5 3861 ± 500 Au 718 ± 10 21.5 ± 0.2 64.8 ± 1.5 10.0 ± 0.3 8.9 ± 4.7 872 ± 230 Cu(metal)/Au 809 ± 4 21.8 ± 0.2 72.7 ± 2.3 12.8 ± 0.4 2.8 ± 0.9 3132 ± 632 Cu 827 ± 2 21.7 ± 0.3 75.2 ± 1.1 13.5 ± 0.3 2.3 ± 0.4 3407 ± 605 (Solution)/Au
(121) PL and TRPL measurement were performed on the devices with Al.sub.2O.sub.3 passivating layer and with devices completed with Al.sub.2O.sub.3 with 1%, 2%, 5%, 10%, 30%, and 50% of Cu doping.
(122) Since the optoelectronic properties of the CdS/CdTe film are influenced by the presence of native defects, low temperature PL measurements were performed on these devices to identify the type of defects associated with them.
(123) To further understand the role of the post annealing temperature on the performance of CdS/CdTe/Al.sub.2O.sub.3 (Cu 30%) solar cells, devices were subjected to the different post annealing time at 220° C. The best efficiency cells of the devices annealed at different time is shown in the
(124) TABLE-US-00007 TABLE 7 Device performance parameters of >20 CdTe solar cells with Al.sub.2O.sub.3(30% Cu) as back contact layers (active device area = 0.06 cm.sup.2) at different annealing times. Average values are expressed along with their standard deviations. V.sub.OC J.sub.SC FF η R.sub.S R.sub.sh Annealing Time (mV) (mA/cm.sup.2) (%) (%) (Ω cm.sup.2) (Ω cm.sup.2) 3 mins 803 ± 3 21.9 ± 0.4 76.2 ± 1.7 13.4 ± 0.5 3.3 ± 1.0 3753 ± 780 6 mins 818 ± 2 21.9 ± 0.4 76.2 ± 1.1 13.8 ± 0.2 3.3 ± 0.9 7680 ± 890 9 mins 832 ± 3 22.2 ± 0.2 76.2 ± 1.1 13.9 ± 0.3 2.4 ± 0.7 4464 ± 593 12 mins 832 ± 3 21.9 ± 0.5 76.3 ± 0.7 13.9 ± 0.2 2.6 ± 0.4 5560 ± 580 15 mins 832 ± 4 21.9 ± 0.4 76.4 ± 0.6 14.0 ± 0.4 2.3 ± 1.1 3514 ± 1154 18 mins 830 ± 4 22.6 ± 0.4 75.8 ± 1.4 14.1 ± 0.3 2.3 ± 0.2 5589 ± 600
(125) Since the devices with Al.sub.2O.sub.3 (2%) show the best PL intensity and CuAlO.sub.x shows the impressive device performance at 220° C. for 15 mins of annealing temperature, the device performance of the devices at different annealing time was observed. The statistical results of solar cell for CdTe/60910-US-NP/D2019-40 Al.sub.2O.sub.3(2%)/Au and CdTe/Al.sub.2O.sub.3(50% Cu)/Au are shown in
(126) Conclusion
(127) In this example, it is demonstrated that Al.sub.2O.sub.3 can be formed at low temperature and can be used as a back contact layer in CdTe solar cells. Different percents of Cu doping on Al.sub.2O.sub.3 help to minimize the insulating nature of Al.sub.2O.sub.3. The bulk lifetime is increased from 0.8 ns to 2.6 ns from the film side illumination and 4.3 ns to 37.6 ns through the glass side illumination. This passivating nature is consistent with the higher device performance with excellent increases in FF, V.sub.OC, and an overall increase in the device performance The best cell in this example shows the 14.5% device performance which is a 39%, 10%, and 5% relative increment over standard Au only, Cu(metal)/Au, and Cu(solution)/Au, respectively. This example proves that CuAlO.sub.x may serve as a passivating interface layer in CdS/CdTe solar cells. The development of CuAlO.sub.x by using the low cost non-vacuum solution based method and its transparency widely open the design space for bifacial and tandem PV devices utilizing CdS/CdTe.
(128) Certain embodiments of the devices and methods disclosed herein are defined in the above examples. It should be understood that these examples, while indicating particular embodiments of the invention, are given by way of illustration only. From the above discussion and these examples, one skilled in the art can ascertain the essential characteristics of this disclosure, and without departing from the spirit and scope thereof, can make various changes and modifications to adapt the compositions and methods described herein to various usages and conditions. Various changes may be made and equivalents may be substituted for elements thereof without departing from the essential scope of the disclosure. In addition, many modifications may be made to adapt a particular situation or material to the teachings of the disclosure without departing from the essential scope thereof.