USER STATION FOR A BUS SYSTEM, AND METHOD FOR TRANSMITTING A MESSAGE AT DIFFERENT BIT RATES IN A BUS SYSTEM

20210367810 · 2021-11-25

    Inventors

    Cpc classification

    International classification

    Abstract

    A user station for a bus system and a method for transmitting a message at different bit rates in a bus system is provided. The user station includes a communication control unit for creating a message for at least one further user station of the bus system. The communication control unit is designed to provide in the message a first phase to be transmitted at a first bit rate, and to provide a second phase to be transmitted at a second bit rate, which is faster or slower than the first bit rate. The communication control unit is designed to provide in the message between the first and second phase a predetermined bit pattern for a bit rate switchover between the first and second bit rate. The predetermined bit pattern includes, both before and after the bit rate switchover, a flank for synchronization.

    Claims

    1-13. (canceled)

    14. A user station for a bus system, comprising: a communication control unit configured to create a message for at least one further user station of bus system, in which an exclusive, collision-free access of a user station to a bus line of the bus system is at least temporarily ensured, the communication control unit being configured to provide, in the message, a first phase to be transmitted at a first bit rate, and a second phase to be transmitted at a second bit rate, which is faster or slower than the first bit rate, the communication control unit being configured to provide, in the message between the first phase and the second phase, a predetermined bit pattern for a bit rate switchover between the first rate and the second bit rate, the predetermined bit pattern including, both before and after the bit rate switchover, a flank for synchronization, using which the at least one further user station as receiver is able to synchronize with the user station as transmitter.

    15. The user station as recited in claim 14, wherein the user station, as receiver of a second message, is synchronized with a transmitting user station when the received second message contains the predetermined bit pattern between the first phase and the second phase, for a bit rate switchover between the first and second bit rate, the predetermined bit pattern including, both before and after the bit rate switchover, a flank for synchronization.

    16. The user station as recited in claim 14, wherein at least the flank after the bit rate switchover is a flank for hard synchronization.

    17. The user station as recited in claim 14, wherein the flanks for synchronization are flanks from recessive to dominant, so that the predetermined bit pattern is 1010, when recessive is 1 and dominant is 0.

    18. The user station as recited in claim 14, wherein the communication control unit is configured to provide, in the message, a switchover bit U whose value decides whether the first bit rate is to be switched over to the second bit rate, and the second bit rate being faster than the first bit rate.

    19. The user station as recited in claim 18, wherein the predetermined bit pattern is 10U10 when recessive is 1 and dominant is 0.

    20. The user station as recited in claim 18, wherein the communication control unit is configured to set the switchover bit U to recessive or 1, to signal that in the message, a switchover is to take place from the first bit rate to the second bit rate, and to set the predetermined bit pattern as 10U0 when recessive is 1 and dominant is 0.

    21. The user station as recited in claim 14, wherein the message is a CAN FD message, in which the predetermined bit pattern includes a switchover of the first bit rate after an arbitration phase to a faster second bit rate in the data phase, in which payload data of the message are encompassed, and/or in which the predetermined bit pattern includes a switchover of the second bit rate after an acknowledgment to a slower first bit rate for the arbitration phase.

    22. The user station as recited in claim 21, wherein the predetermined bit pattern includes a BRS bit of a CAN FD message as a switchover bit between the first bit rate and the second bit rate.

    23. The user station as recited in claim 14, further comprising: a transceiver device configure to synchronize with one of the flanks in the predetermined bit pattern of a further message at an end or beginning of an arbitration phase.

    24. The user station as recited in claim 23, wherein the transceiver device is configured to transmit data at the second bit rate at a bus level on the bus line differing from that of data at the first bit rate.

    25. A bus system, comprising: a parallel bus line; and at least two user stations which are interconnected via the bus line in such a way that they are able to communicate with one another, wherein at least one of the at least two user stations is a user station including: a communication control unit configured to create a message for at least one further user station of bus system, in which an exclusive, collision-free access of a user station to a bus line of the bus system is at least temporarily ensured, the communication control unit being configured to provide, in the message, a first phase to be transmitted at a first bit rate, and a second phase to be transmitted at a second bit rate, which is faster or slower than the first bit rate, the communication control unit being configured to provide, in the message between the first phase and the second phase, a predetermined bit pattern for a bit rate switchover between the first rate and the second bit rate, the predetermined bit pattern including, both before and after the bit rate switchover, a flank for synchronization, using which the at least one further user station as receiver is able to synchronize with the user station as transmitter.

    26. A method for transmitting a message at different bit rates in a bus system, the method comprising the following steps: creating, using a communication control unit of a user station of the bus system, a message for at least one further user station of the bus system, in which an exclusive, collision-free access of a user station to a bus line of the bus system is at least temporarily ensured, the communication control unit providing in the message, a first phase to be transmitted at a first bit rate, and providing a second phase to be transmitted at a second bit rate, which is faster or slower than the first bit rate, the communication control unit providing in the message between the first phase and the second phase, a predetermined bit pattern for a bit rate switchover between the first and second bit rate, and the predetermined bit pattern including, both before and after the bit rate switchover, a flank for synchronization, using which the at least one further user station as receiver is able to synchronize with the user station as transmitter.

    Description

    BRIEF DESCRIPTION OF THE DRAWINGS

    [0032] The present invention is described in greater detail below with reference to the figures and based on exemplary embodiments.

    [0033] FIG. 1 shows a simplified block diagram of a bus system according to one first exemplary embodiment of the present invention.

    [0034] FIG. 2 shows a diagram for illustrating the structure of messages, which may be transmitted by user stations of the bus system according to the first exemplary embodiment of the present invention.

    [0035] FIG. 3 shows a representation of an example of a temporal profile of a differential voltage VDIFF of bus signals CAN_H, CAN_L for a part of the message in a transceiver device of the bus system according to the first exemplary embodiment of the present invention.

    [0036] FIG. 4 shows a representation of an example of a temporal profile of a differential voltage VDIFF of bus signals CAN_H and CAN_L for a part of a message in a transceiver device of a bus system according to one second exemplary embodiment of the present invention.

    [0037] FIG. 5 shows a representation of an example of a temporal profile of a differential voltage VDIFF of bus signals CAN_H and CAN_L for a part of a message in a transceiver device of a bus system according to one third exemplary embodiment of the present invention.

    [0038] In the figures, identical or functionally identical elements are provided with the same reference numeral unless otherwise indicated.

    DETAILED DESCRIPTION OF EXAMPLE EMBODIMENTS

    [0039] FIG. 1 shows by way of example, a bus system 1, which is designed, in particular, for a CAN bus system, a CAN FD bus system, etc. Bus system 1 may be used in a vehicle, in particular, in a motor vehicle, in an aircraft etc., or in a hospital etc.

    [0040] Bus system 1 in FIG. 1 has an, in particular, parallel bus line 3, to which a plurality of user stations 10, 20, 30 are connected. Messages 4, 5 in the form of signals are transmittable serially via bus line 3 between individual user stations 10, 20, 30. User stations 10, 20, 30 are, for example, control units, sensors, display devices, etc., of a motor vehicle.

    [0041] As shown in FIG. 1, user station 10 has a communication control unit 11 and a transceiver device 12. In contrast, user station 20 has a communication control unit 21 and a transceiver device 22. User station 30 has a communication control unit 31 and a transceiver device 32. Transceiver devices 12, 22, 32 of user stations 10, 20, 30 are each directly connected to bus line 3, even though this is not illustrated in FIG. 1.

    [0042] Communication control unit 11, 21, 31 each serve to control a communication of respective user station 10, 20, 30 via bus line 3 with a different user station of user stations 10, 20, 30, which are connected to bus line 3.

    [0043] Communication control unit 11 may be designed as a conventional CAN controller. Communication control unit 11 creates and reads first messages 4, for example, classic CAN messages 4. Classic CAN messages 4 are structured according to the classic basic format, in which a number of up to 8 data bytes may be encompassed in message 4, as shown in the upper part of FIG. 2.

    [0044] Communication control unit 21 in FIG. 1 may be designed as a conventional CAN FD controller except for the differences described in still greater detail below. Communication control unit 21 creates and reads second messages 5, which are modified CAN FD messages 5, for example. In this case, modified CAN FD messages 5 are structured on the basis of a CAN FD format, in which a number of up to, for example, 64 data bytes may be encompassed in message 5, as is shown in the lower part of FIG. 2.

    [0045] Communication control unit 31 may be designed in order, as needed, to provide for or to receive from transceiver device 32 a classic CAN message 4 or a modified CAN FD message 5. Thus, communication control unit 21 creates and reads a first message 4 or second message 5, first and second message 4, 5 differing in terms of their data transmission standard, namely in this case CAN or modified CAN FD.

    [0046] Transceiver device 12 may be designed as a conventional CAN transceiver. Transceiver device 22 may be designed as a conventional CAN FD transceiver except for the differences described in still greater detail below. Transceiver device 32 may be designed in order, as needed, to provide for or to receive from communication control unit 31 messages 4 according to the present CAN base format or messages 5 according to the modified CAN FD format.

    [0047] A formation and then transmission of messages 5 with the modified CAN FD or also at data rates higher than CAN FD may be implemented with the two user stations 20, 30.

    [0048] The upper part of FIG. 2 shows for message 4 a CAN frame 45 as it is transmitted by transceiver device 12 or by transceiver device 13, and in its lower part for message 5 a CAN FD frame 450 as it may be transmitted by transceiver device 22 or 32. CAN frame 45 and CAN FD frame 450 are subdivided basically into two different phases or areas for the CAN communication on bus 40, namely arbitration phases 451, 453 and a data area 452, which is also referred to as a data field in classic or classic CAN or also as data phase 452 in CAN FD. The payload data of the CAN FD frame or of message 5 are contained in data phase 452.

    [0049] According to FIG. 2, the bit rate for following data phase 452 is increased, for example, to 2, 4, 8 Mbps at the end of arbitration phase 451 in CAN FD as compared to the classic CAN. This means that in CAN FD, the bit rate in arbitration phases 451, 453 is lower than the bit rate in data phase 452. In CAN FD, data phase 452 is temporally significantly reduced compared to data phase 452 of the CAN frame.

    [0050] FIG. 3 shows more exactly the transition between arbitration phase 451 and data phase 452 for message 5 based on differential voltage VDIFF for differential signals CAN-H and CAN_L over time t. A switchover takes place in the transition between a first and second bit rate. In this case, a predetermined bit pattern including the bit sequences 46, 48 is provided between arbitration phase 451 and data phase 452.

    [0051] According to FIG. 3, a slower bit rate is used in arbitration phase 451, which is also referred to below as the first bit rate. In this case, the level of logic ‘0’ is dominant and may overwrite the recessive level with which logic ‘1’ is transmitted. In synchronizing bit pattern 46, 48 there is a first synchronization flank 49 in a bit sequence 46 immediately before the bit rate switchover at a switchover point in time t1. A second synchronization flank 49 in a bit sequence 48 comes immediately after the switchover. Besides the bit rate, the bus levels of differential voltage VDIFF may optionally also be switched here from a first level ‘REZ’ to a second level ‘1’, for example, in order to enable more symmetrical bit lengths at the higher bit rate. The higher or faster bit rate is also referred to below as the second bit rate. The switchover of the bus level may also take place as needed in another manner as specified in the CAN protocol.

    [0052] Of flanks 49 before and after the bit rate switchover, it is possible to use at least one of the flanks for hard synchronization. It is possible, however, that both flanks 49 are used for resynchronization.

    [0053] Bit sequence 46 and bit sequence 48 form one part of a frame format, in which the bit rate switchover takes place within fixed or predetermined bit pattern 46, 48, which includes one flank 49 each for the synchronization immediately before and after the switchover at switchover point in time t1. In the example of FIG. 3, the predetermined bit pattern is “1010”. As a result, individual user stations 20, 30 synchronize themselves with the flanks from recessive ‘1’ to dominant ‘0’. Predetermined bit pattern 46, 48 of FIG. 3 is the simplest bit pattern, which enables two synchronizations in succession at a transition between the first and the second bit rate of, for example, arbitration phase 451 and data phase 452.

    [0054] As shown in FIG. 3, the configuration for the low bit rate is still used at the first 1.fwdarw.0 flank, at the second flank 1.fwdarw.0, however, already the configuration for the high bit rate is used.

    [0055] Without bit rates switchover, the second synchronization is not necessary.

    [0056] The same predetermined bit pattern 46, 48 including bit sequences 46 and 48 may also be used in order to switch back at the end of message 5 better synchronized with the slower bit rate, for example, before a possible acknowledgement of other bus users 20, 30 in a CAN FD frame 450, i.e., at the end of data phase 452. With the acknowledgement, it is communicated whether or not a receiver has discovered an error in the received frame or message 5.

    [0057] Synchronizing bit pattern 46, 48 is particularly helpful if, besides the bit rate, the so-called “physical layer” is also switched over, i.e., if a bus level different from that used for the transmission of the lower bit rate is used for the transmission of the higher bit rate, as illustrated in FIG. 3.

    [0058] FIG. 4 shows with respect to one second exemplary embodiment the transition between arbitration phase 451 and data phase 452 for a message 50. Here, too, differential voltage VDIFF for differential signals CAN_H and CAN_L is again shown over time t for a part of message 50, in which a switchover of the bit rate takes place, as described above with respect to FIG. 3.

    [0059] In contrast to predetermined bit pattern 46, 48 including bit sequences 46 and 48 of FIG. 3, a predetermined bit pattern 46, 47, 48 including bit sequences 46 and 47 and 48, is provided in message 50 between arbitration phase 451 and data phase 452.

    [0060] Bit sequence 47 corresponds to a switchover bit U, whose value decides whether or not the bit rate is to be switched over. Thus, in the example of FIG. 4, the predetermined bit pattern “10U10” yields bit sequence 46, 47, 48.

    [0061] In a CAN FD frame, switchover bit ‘U’ corresponds to the BRS bit in the CAN FD message format. The fact that the CAN FD protocol according to the ISO 11898-1:2015 includes the option of switching the CAN FD controller into a protocol exception state if the reserved bit following the FDF bit is seen as recessive and not, as expected, dominant, may be useful in this case. This option is to allow a new frame format or message format to be introduced, which is not destroyed with error frames by “old” or already existing CAN FD controllers not yet familiar with this format.

    [0062] One embodiment variant of the present invention utilizes the fact that the ESI bit in the CAN FD frame or message 5 is presently usually dominant. Bit pattern FD-res-BRS ESI as “1010” therefore provides two good synchronization flanks 49 in the CAN FD frame or message 5. In the event the ESI bit is recessive, the result is a bit pattern of “1011111o” together with a DLC=“1111”, “o” being a dominant stuff bit. Here, second synchronization flank 49 comes late.

    [0063] In the event the “res” bit or “reserved bit” is selected to be recessive and two dominant synchronization bits are inserted, this results in the bit pattern FDF-res-sync-BRS-sync-(ESI=?)=“11010?”, “?” being a placeholder for a freely selectable bit state.

    [0064] Even though the cited variants are very advantageous, other embodiment variants are of course also possible.

    [0065] As also in the example of FIG. 3, the same predetermined bit pattern 46, 47, 48 including bit sequences 46 and 47 and 48 may also be used in order to switch back at the end of message 50 better synchronized with the slower bit rate, for example, before a possible acknowledgement of other bus users. A switchover bit ‘U’ is unnecessary in this case.

    [0066] In addition or alternatively, the synchronizing bit pattern in the format of message 5 may be omitted in messages 5, in which it has been decided by switchover bit ‘U’ at the first bit rate-switchover-bit pattern that the bit rate in this message 5 has not been switched over.

    [0067] Otherwise, the same applies as described above in conjunction with FIG. 3.

    [0068] FIG. 5 shows with respect to one third exemplary embodiment of the present invention, the transition between arbitration phase 451 and data phase 452 for a message 500. As already described above with respect to FIG. 4, here, too, differential voltage VDIFF for differential signals CAN_H and CAN_L over time t is again shown for a part of message 500, in which a switchover of the bit rate takes place.

    [0069] In message 500, it is established, for example, that value ‘1’ for the switchover bit U of the second exemplary embodiment means that the bit rate is to be switched over. Thus, predetermined bit pattern 46, 47, 48, which has the value “10U10” for bit sequence 46 and 47 and 48 in FIG. 4, is shortened in message 500 into bit pattern 46, 47, 480 and thus to “10U0”.

    [0070] On the whole, it is possible with the above-described exemplary embodiments to yield a very high clock tolerance and latitude in the configuration adjustments for bus system 1.

    [0071] The above-described embodiments of bus system 1, of user stations 10, 20, 30 and of the method carried out by the latter may be used individually or in all possible combinations. All features of the above-described exemplary embodiments and/or their embodiment variants and/or their modifications may, in particular, be arbitrarily combined. In addition or alternatively, the following modifications, in particular, are possible.

    [0072] The above-described bus system 1 according to the exemplary embodiments is described with reference to a bus system based on the CAN protocol. Bus system 1 according to the exemplary embodiments may, however, also be another type of serial communication network. It is advantageous, but not a necessary precondition, that in bus system 1 an exclusive collision-free access of a user station 10, 20, 30 to a shared channel is ensured at least for particular time spans.

    [0073] The number and configuration of user stations 10, 20, 30 in bus system 1 of the exemplary embodiments is arbitrary. User station 10, in particular, may be omitted in bus system 1. It is possible that one or multiple of user stations 10 or 20 or 30 are present in bus system 1.