TRANSMISSION DEVICE, TIME TRANSMISSION SYSTEM, AND DELAY MEASUREMENT METHOD

Abstract

[Problem] A time synchronization mechanism with which an impact of link asymmetry between time synchronization devices is reduced is provided.

[Solution] A SW 3 used in the time transmission system in which a master node 1 and a slave node 2 performs transmission and reception of a PTP packet via the SW 3 and the time of the master node 1 is synchronized based on time information of the transmission and reception includes a delay calculator 32 that measures an intra-device delay between input and output of the PTP packet to and from the SW 3, and a delay information writing unit 33 that appends the intra-device delay measured by the delay calculator 32 to a packet subsequent to the PTP packet, and outputs the appended packet to an output destination of the PTP packet.

Claims

1. A transmission device used in a time transmission system in which a time synchronization packet is transmitted and received between time synchronization devices via the transmission device, and time of each of the time synchronization devices is synchronized based on time information of transmission and reception of the time synchronization packet, the transmission device comprising: a delay calculator configured to measure an intra-device delay between input of the time synchronization packet to the transmission device and output of the time synchronization packet from the transmission device; and a delay information writing unit, including one or more processors, configured to append the intra-device delay measured by the delay calculator to a packet subsequent to the time synchronization packet, and output the packet appended with the intra-device delay to an output destination of the time synchronization packet.

2. The transmission device according to claim 1 further comprising a pulse generator, wherein the pulse generator, is configured to generate a first pulse signal at a timing when the time synchronization packet is input to the transmission device and a second pulse signal at a timing when the time synchronization packet is output from the transmission device, and notify the delay calculator of the first pulse signal and the second pulse signal, and the delay calculator is configured to measure the intra-device delay based on a notification time difference of the first pulse signal that is the timing when the time synchronization packet is input and of the second pulse signal that is the timing when the time synchronization packet is output.

3. A time transmission system comprising: a plurality of the transmission devices according to claim 1; and the time synchronization devices, wherein when one of the time synchronization devices receives the time synchronization packet transmitted from another one of the time synchronization devices that is a counterpart for time synchronization and the packet appended with the intra-device delay measured by each of the plurality of the transmission devices on a transmission path of the time synchronization packet, the one of the time synchronization devices is configured to subtract the intra-device delay in each of the plurality of the transmission devices from an arrival time of the time synchronization packet to correct the arrival time of the time synchronization packet to a corrected arrival time not involving the intra-device delay, and calculate an offset value indicating a gap of a clock of the one of the time synchronization devices using the corrected arrival time.

4. A delay measurement method performed by a transmission device used in a time transmission system in which a time synchronization packet is transmitted and received between time synchronization devices via the transmission device, and time of each of the time synchronization devices is synchronized based on time information of transmission and reception of the time synchronization packet, the transmission device including a delay calculator and a delay information writing unit, the method comprising: by the delay calculator, measuring an intra-device delay between input of the time synchronization packet to the transmission device and output of the time synchronization packet from the transmission device; and by the delay information writing unit including one or more processors, appending the intra-device delay measured by the delay calculator to a packet subsequent to the time synchronization packet and outputting the packet appended with the intra-device delay to an output destination of the time synchronization packet.

5. The time transmission system according to claim 3, wherein a transmission device of the plurality of the transmission devices further comprises a pulse generator, wherein the pulse generator, is configured to generate a first pulse signal at a timing when the time synchronization packet is input to the transmission device and a second pulse signal at a timing when the time synchronization packet is output from the transmission device, and notify the delay calculator of the first pulse signal and the second pulse signal, and the delay calculator is configured to measure the intra-device delay based on a notification time difference of the first pulse signal that is the timing when the time synchronization packet is input and of the second pulse signal that is the timing when the time synchronization packet is output.

6. The delay measurement method according to claim 4, the transmission device further comprising a pulse generator, the method further comprising: by the pulse generator, generating a first pulse signal at a timing when the time synchronization packet is input to the transmission device and a second pulse signal at a timing when the time synchronization packet is output from the transmission device, and notifying the delay calculator of the first pulse signal and the second pulse signal; and by the delay calculator, measuring the intra-device delay based on a notification time difference of the first pulse signal that is the timing when the time synchronization packet is input and of the second pulse signal that is the timing when the time synchronization packet is output.

Description

BRIEF DESCRIPTION OF DRAWINGS

[0022] FIG. 1 is a sequence diagram with an intra-device delay of a transmission device according to the present embodiment corrected.

[0023] FIG. 2 is a configuration diagram of the transmission device in FIG. 1 according to the present embodiment.

[0024] FIG. 3 is a configuration diagram of a pulse generator according to the present embodiment.

[0025] FIG. 4 is a flowchart illustrating delay measurement processing using an intra-device delay difference according to the present embodiment.

[0026] FIG. 5 is a configuration diagram of a time transmission system adopting a time synchronization technique.

[0027] FIG. 6 is a sequence diagram illustrating how PTP works.

[0028] FIG. 7 is a sequence diagram obtained by taking intra-device delay of the transmission device into consideration in FIG. 6.

DESCRIPTION OF EMBODIMENTS

[0029] Hereinafter, an embodiment of the present invention will be described in detail with reference to the drawings.

[0030] FIG. 1 is a sequence diagram when a correction of the intra-device delay in the transmission device is applied to FIG. 7.

[0031] FIG. 7 illustrates the configuration in which a PTP packet is transmitted toward a downlink side on a transmission path in the order of the master node 91, the first SW 93a, the second SW 93b, and the slave node 92. FIG. 1 illustrates a configuration in which a PTP packet is transmitted toward the downlink side on the transmission path in the order of a master node (time synchronization device) 1, a first SW 3a, a second SW 3b, and a slave node (time synchronization device) 2. The transmission devices such as the first SW 3a and the second SW 3b are referred to as SW (transmission device) 3. The cable length is assumed to be the same between the uplink and the downlink transmission paths.

[0032] In FIG. 1, the following processes are added to FIG. 7.

(1) Processing operations (S111, S121, S113, and S123) in which each SW 3 measures the intra-device delay in the SW 3 from input/output signal detection timings
(2) Processing operations (S112, S122, S114, S124) in which each SW 3 appends the measured intra-device delay to a subsequent packet
(3) Processing operations (S131, S141) in which each PTP node corrects the arrival time based on the intra-device delay

[0033] Details of the processing operations in FIG. 1 will be described below.

The master node 1 transmits a Sync message to the slave node 2 (S11b). The first SW 3a measures an intra-device delay L11 of the Sync message (S111). The second SW 3b measures an intra-device delay L12 of the Sync message (S121).
The master node 1 transmits a Follow-up message to the slave node 2 (S12x). The first SW 3a appends the measured intra-device delay L11 to the Follow-up message (S112). The second SW 3b appends the measured intra-device delay L12 to the Follow-up message (S122).
The slave node 2 corrects the arrival time t2b to an arrival time t2 using an equation “arrival time t2=arrival time t2b−(intra-device delay L11+intra-device delay L12)” based on the intra-device delay in each SW 3 notified by the Follow-up message (S131).

[0034] The slave node 2 transmits a Delay_Request message to the master node 1 (S13b). The second SW 3b measures an intra-device delay L32 of the Delay_Request message (S123). The first SW 3a measures an intra-device delay L31 of the Delay_Request message (S113). The slave node 2 transmits a delay information storing packet to the master node 1 (S132). The second SW 3b appends the measured intra-device delay L32 to the delay information storing packet (S124). The first SW 3a appends the measured intra-device delay L31 to the delay information storing packet (S114).

Note that the delay information storing packet appended with each intra-device delay may be a packet generated by the slave node 2, or may be a delay information storing packet newly generated by each SW 3 itself.
The master node 1 corrects the arrival time t4b to an arrival time t4 using an equation “arrival time t4=arrival time t4b−(intra-device delay L31+intra-device delay L32)” based on the intra-device delay in each SW 3 notified by the delay information storing packet (S141). The master node 1 notifies the slave node 2 of the arrival time t4 after the correction using the Delay_Response message (S14x).

[0035] Then, the slave node 2 synchronizes the time with Equation 1 using the arrival time t2 and the arrival time t4 that are results of the correction, and the transmission time t1 and the transmission time t3 requiring no correction (S133).

Offset value=((arrival time t2−transmission time t1)−(arrival time t4−transmission time t3)) /2  (Equation 1)

This enables the slave node 2 to perform high accuracy time synchronization with reduced impact of link asymmetry by using the time stamp information from which the intra-device delay in the transmission device has been removed by correction.

[0036] FIG. 2 is a diagram illustrating a configuration of the transmission device (SW 3) in FIG. 1. The transmission device is configured as a computer that has a central processing unit (CPU), a memory, a storage means (storage unit), examples of which include a hard disk, a nonvolatile memory, and a solid state drive (SSD), and a network interface.

In this computer, the CPU executes a program (also referred to as an application or an app that is an abbreviation thereof) loaded into a memory, thereby operating a control unit (control means) configured of each processing unit.

[0037] In addition to basic packet transmission functions, the SW 3 is additionally provided with (1) a function of measuring the intra-device delay in the SW 3 based on input and output signal detection timings as illustrated in FIGS. 1 and (2) a function of appending the measured intra-device delay to a subsequent packet.

Specifically, the SW 3 includes a pulse generator 10, an optical cross connect (OXC) 20, an amplifiers (AMP) 21 and 25, a demultiplexer (DEMUX) 22, a transponder (TRPN) 23, a multiplexer (MUX) 24, an intra-device time holder 31, a delay calculator 32, and a delay information writing unit 33.

[0038] The SW 3 is wavelength division multiplexing (WDM) that relays an optical signal input and output via ports 52 and 53 by the OXC 20. The ports 52 and 53 are connected to the downlink direction that is on the slave node 2 side, and the port 51 is connected to the uplink direction that is on the master node 1 side. The TRPN 23 connected to the port 51 outputs a signal in the downlink direction to the OXC 20 via the MUX 24, and receives a signal from the OXC 20 in the uplink direction via the DEMUX 22. The MUX 24 multiplexes the PTP packet that has passed through TRPN 23 with other client signals and transmits the resultant signal to the OXC 20.

[0039] Each of the three pulse generators 10 generates (pulses) pulse signals at the timings at which the PTP packet is input and output to and from a processor connected in the vicinity, and notifies the delay calculator 32 of the pulse signals. The pulsing timings are listed below.

A timing at which the PTP packet is input from the port 51 to the TRPN 23.
A timing at which the PTP packet is output from the TRPN 23 to the port 51.
A timing at which the PTP packet is input from the port 53 to the AMP 21.
A timing at which the PTP packet is output from the AMP 25 to the port 52. Thus, the intra-device delay can be obtained even in a transmission device in which an egress side is an optical output.

[0040] The delay calculator 32 receives a notification of the pulse signal at each of the timings, and obtains the notification time from the intra-device time holder 31 by the internal clock. The delay calculator 32 calculates the intra-device delay in the device in which the delay calculator 32 is included based on a difference between notification timings of the pulse signals corresponding to the input and output timings of the same PTP packet.

The delay information writing unit 33 notifies the subsequent side, which is the output destination of the PTP packet, of the intra-device delay calculated by delay calculator 32. In this notification process, the intra-device delay may be appended to the subsequent PTP packet, or to the delay information storing packet newly generated in the device itself

[0041] FIG. 3 is a diagram illustrating a configuration of the pulse generator 10. The pulse generator 10 includes a signal branch unit 11, an optical/electrical (O/E) conversion unit 12, and a PTP read timing generator 13.

The signal branch unit 11 branches a signal from the transmission path.
The O/E conversion unit 12 converts the optical signal split by the signal branch unit 11 into an electrical signal.
The PTP read timing generator 13 recognizes that the PTP packet is received, based on the electrical signal converted by the O/E conversion unit 12, generates a pulse signal, and notifies the delay calculator 32 of the pulse signal.

[0042] FIG. 4 is a flowchart illustrating delay measurement processing using an intra-device delay difference.

In S201, the master node 1 and slave node 2 each transmit a PTP packet (the Sync message of S11b and the Delay_Request message of 513b in FIG. 1) to the PTP node of the counterpart.
In S202, each SW 3 on the path of the PTP packet measures the intra-device delay of the PTP packet based on the pulse signals.

[0043] In S203, each SW 3 on the path of the PTP packet appends the intra-device delay measured in S202 to the subsequent packet. In S204, the PTP node referred to as the counterpart in S201 corrects the arrival time of the first-arrival PTP packet (S131 and S141 in FIG. 1) using the intra-device delay appended to the subsequent packet.

In S205, the slave node 2 calculates the offset value using Equation 1, based on the arrival time of the PTP packet corrected in S204, and synchronizes the time using the offset value (S133 in FIG. 1). Thus, the slave node 2 can perform time synchronization with high accuracy.

[0044] The time transmission system according to the present embodiment described above obtains the intra-device delay in a non-PTP supporting device (SW 3), which is a main factor of the delay variation, corrects the time stamp information using the intra-device delay, and obtains the offset value with high accuracy based on the corrected time stamp information. Thus, by removing the uplink and downlink asymmetry, which is a factor of the time synchronization error in the PTP, the accuracy of time synchronization can be improved.

[0045] Note that, in the present embodiment, as the time transmission system, a transmission path that passes through the two SWs 3 (the first SW 3a and the second SW 3b) in both the uplink and the downlink directions, as illustrated in FIG. 1. However, the number of such SWs 3 is not limited, and any number of SWs 3 may be handled.

The present embodiment can be implemented by a program that causes hardware resources of a general-purpose computer to operate as each means of the SW 3. This program may also be distributed over a communications line or may be recorded and distributed on a recording medium such as a CD-ROM.

REFERENCE SIGNS LIST

[0046] 1 Master node (time synchronization device) [0047] 2 Slave node (time synchronization device) [0048] 3 SW (transmission device) [0049] 10 Pulse generator [0050] 11 Signal branch unit [0051] 12 O/E conversion unit [0052] 13 PTP read timing generator [0053] 20 OXC [0054] 21 AMP [0055] 22 DEMUX [0056] 23 TRPN [0057] 24 MUX [0058] 25 AMP [0059] 31 Intra-device time holder [0060] 32 Delay calculator [0061] 33 Delay information writing unit