Methods related to preparation of a stencil to receive a plurality of IC units
11183413 · 2021-11-23
Assignee
Inventors
Cpc classification
H01L2221/68313
ELECTRICITY
H01L2224/1145
ELECTRICITY
H01L2224/13101
ELECTRICITY
H01L2924/00012
ELECTRICITY
H01L2924/00014
ELECTRICITY
H01L2224/13101
ELECTRICITY
H01L22/12
ELECTRICITY
H01L2924/00014
ELECTRICITY
H01L2924/00012
ELECTRICITY
International classification
Abstract
A method for preparing a stencil to receive a plurality of IC units, the method comprising the steps of: providing a metal substrate having an array of apertures; applying an adhesive surface to said substrate; removing portions of said adhesive surface corresponding to the apertures in the metal substrate.
Claims
1. A method of processing IC units, the method comprising the steps of: preparing a stencil by: providing the stencil comprising a metal substrate having an array of stencil apertures; applying an adhesive surface to a top surface of said stencil; and removing portions of said adhesive surface corresponding to the apertures in the stencil, to form adhesive apertures; wherein the adhesive surface is arranged to receive the IC units such that the IC units are positioned above the stencil apertures, so as to be selectively removable; wherein the adhesive apertures are smaller than the stencil apertures, defining an overhang of the adhesive layer; wherein the IC units comprise solder ball connections on the bottom of the units; and wherein the removing step includes laser cutting the adhesive surface, such that the adhesive apertures are larger in size than the solder ball connections; placing the IC units above apertures of the stencil such that the IC units are supported only by the overhang of the adhesive layer; and offloading the stencil.
2. The method according to claim 1, further including the step, after the offloading step, of sputtering the IC units.
3. The method according to claim 1, further including the steps of inspecting the IC units before the placing step.
4. The method according to claim 2, further including the steps of inspecting the IC units after the sputtering step.
5. The method according to claim 1 wherein the applying step includes placing a double sided tape to the substrate.
6. The method according to claim 5, wherein the removing step includes laser cutting the double sided tape and then peeling a backing tape to expose the adhesive surface and remove the cut portions of the double sided tape.
Description
BRIEF DESCRIPTION OF DRAWINGS
(1) It will be convenient to further describe the present invention with respect to the accompanying drawings that illustrate possible arrangements of the invention. Other arrangements of the invention are possible and consequently, the particularity of the accompanying drawings is not to be understood as superseding the generality of the preceding description of the invention.
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DETAILED DESCRIPTION
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(11) The inspection, alignment and orientation step 10 includes conducting a top vision inspection then moving the units to a flipper and subsequently a picker for aligning the units. The units are then engaged by a picker to move the units to the stencil and inspecting the underside of the units during delivery by the picker.
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(15) In this particular embodiment using the PCB sized stencil, as shown in
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(17) In a particular embodiment, the laser cutting of the double sided tape may not cut the tape flush with the stencil.
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(19) To remove the BGA chip from the stencil requires an ejector pin, however, conventional ejector pins risk damaging the electrode 240 by applying a localized force which may scratch, damage or dislodge the electrode. To this end the present invention includes a new ejector pin 215 having a specialized head 220. The specialized head includes a first contact surface, larger than a cross sectional area of the shaft of the ejector in and a second surface. The first region 225 is arranged to contact the electrode so as to distribute the ejection force uniformly about the electrode. The second surface 230 is offset from the first portion 225 so as to contact the vacant area 245 of the BGA chip. Thus, the head 220 is arranged to apply a uniform pressure to the solder ball face of the BGA unit 200 and thus minimize the force applied to the electrode which may prevent damage.
(20) Having described various systems and methods herein, some embodiments can include, but are not limited to:
(21) In a first embodiment, a method for preparing a stencil to receive a plurality of IC units comprises the steps of: providing a metal substrate having an array of apertures; applying an adhesive surface to said substrate; and removing portions of said adhesive surface corresponding to the apertures in the metal substrate.
(22) A second embodiment can include the method of the first embodiment, wherein the applying step includes placing a double sided tape to the substrate.
(23) A third embodiment can include the method of the second embodiment, wherein the removing step includes laser cutting the double sided tape and then peeling a backing tape to expose the adhesive surface and remove the cut portions of the double sided tape.
(24) A fourth embodiment can include the method of the first embodiment, wherein the applying step includes placing the metal substrate on a surface, applying a fluid adhesive to the substrate, and the removing step includes lifting the substrate from the surface to separate excess adhesive that has passed through the apertures.
(25) In a fifth embodiment a method of processing IC units comprises comprising the steps of: preparing a stencil according to any one of the previously described methods; placing a plurality of the IC units in apertures of the stencil; and offloading the stencil.
(26) A sixth embodiment can include the method of the fifth embodiment, further including the step, after the offloading step, of sputtering the IC units.
(27) A seventh embodiment can include the method of the fifth or sixth embodiment, further including the steps of inspecting the IC units before the placing step.
(28) An eighth embodiment can include the method of the sixth or seventh embodiment, further including the steps of inspecting the IC units after the sputtering step.
(29) In a ninth embodiment, a stencil for receiving a plurality of IC units comprises: a metal substrate having an array of apertures; an adhesive surface on said substrate; and said apertures arranged to receive said plurality of IC units.
(30) A tenth embodiment can include the stencil of the ninth embodiment, wherein the IC units are BGA chips, said apertures sized to allow solder ball connections of the BGA chips to pass through the aperture but retain the IC portion of the BGA chip.
(31) An eleventh embodiment can include the stencil of the ninth or tenth embodiment, wherein the adhesive surface includes an opposed side of a double sided tape layer applied to the substrate.
(32) In a twelfth embodiment, an ejector pin for an ejecting IC unit from an aperture comprises: a shaft and a head at the end of said shaft, the head having a first contact surface larger than a cross section of the shaft; and said first contact surface arranged to contact a surface of the IC unit and apply a force there to disengage the IC unit from the aperture.
(33) A thirteenth embodiment can include the ejector pin of the twelfth embodiment, wherein the head includes a second contact surface offset from the first contact surface, said second contact surface arranged to simultaneous contact a different area on the IC unit.
(34) A fourteenth embodiment can include the ejector pin of the thirteenth embodiment, wherein said ejector pin is arranged to eject a BGA chip, such that the first contact surface is arranged to contact an electrode on the BGA chip and the second surface is arranged to contact a different area on the BGA chip.