Semiconductor laser array and semiconductor laser array circuit arrangement

Abstract

A semiconductor laser array may include a plurality of semiconductor lasers and a common substrate configured as a common anode of said plurality of semiconductor lasers. Each semiconductor laser may have a pn junction region between the common anode and a cathode contact layer. The pn junction region may include a p-doped layer and an n-doped layer. The p-doped layer of the pn junction region may face the substrate. The semiconductor laser array circuit arrangement may include a semiconductor laser array, each laser may be controlled by a driver with an n-MOSFET.

Claims

1. A semiconductor laser array comprising: a plurality of semiconductor lasers; a common substrate configured as a common anode of said plurality of semiconductor lasers; wherein each semiconductor laser comprises a pn junction region between the common anode and a cathode contact layer, and wherein the pn junction region comprises a p-doped layer and an n-doped layer, and wherein the p-doped layer faces the substrate.

2. The semiconductor laser array according to claim 1, wherein the pn junction region of at least one semiconductor laser of the plurality of semiconductor lasers comprises a plurality of pn junction regions, and wherein a tunnel diode is arranged between two adjacent pn junction regions.

3. The semiconductor laser array according to claim 1, wherein the substrate is an n-doped substrate.

4. The semiconductor laser array according to claim 3, wherein a tunnel diode is arranged between the n-doped substrate and the adjacent pn junction region.

5. The semiconductor laser array according to claim 1, wherein the substrate is a p-doped substrate.

6. The semiconductor laser array according to claim 1, wherein the cathode contact layer is n-doped.

7. The semiconductor laser array according to claim 1, wherein each semiconductor laser of the plurality of semiconductor lasers comprises a semiconductor layer stack arranged on the substrate, wherein the semiconductor layer stack comprises: the pn junction where the n-doped layer is arranged above the p-doped layer, and a p-doped tunnel diode layer arranged above an n-doped tunnel diode layer, wherein the n-doped layer faces the n-doped tunnel diode layer, the p-doped layer faces the p-doped tunnel diode layer, or combinations thereof.

8. The semiconductor laser array according to claim 7, wherein the plurality of semiconductor lasers are separated from each other by trenches.

9. A semiconductor laser array circuit arrangement comprising a semiconductor laser array according to claim 1, wherein each semiconductor laser of the plurality of semiconductor lasers are configured to be controlled by a driver with an n-MOSFET.

10. The semiconductor laser array circuit arrangement according to claim 9, wherein the driver comprises a source circuit of the n-MOSFET; wherein the n-MOSFET comprises a drain contact and a source contact wherein the drain contact is electrically conductively connected to the cathode contact layer of one semiconductor laser of the plurality of the semiconductor lasers; wherein the source contact is electrically conductively connected to a reference potential.

11. The semiconductor laser array circuit arrangement according to claim 10, wherein the common anode is connected to a supply potential.

12. A semiconductor laser array comprising: a plurality of semiconductor lasers; and a common substrate configured as a common anode of said plurality of semiconductor lasers; wherein each semiconductor laser comprises a pn junction region between the common anode and a cathode contact layer, wherein the pn junction region comprises a p-doped layer and an n-doped layer, and wherein the p-doped layer of the pn junction region faces the substrate, and wherein the cathode contact layer is p-doped and a tunnel diode is arranged between the cathode contact layer and the adjacent pn junction region.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

(1) In the following, the semiconductor laser array described herein are explained in more detail in conjunction with non-limiting embodiments and the associated figures.

(2) FIG. 1 shows an exemplary embodiment of a laser from a conventional semiconductor laser array.

(3) FIGS. 2 and 3 show conventional exemplary embodiments of semiconductor laser array circuit arrangements.

(4) FIG. 4 shows an exemplary embodiment of a semiconductor laser array.

(5) FIGS. 5, 6, 7 and 8 show exemplary embodiments of a laser from the semiconductor laser array.

(6) FIG. 9 shows an exemplary embodiment of a semiconductor laser array circuit arrangement.

(7) Identical, similar or similar-looking elements are provided with the same reference signs in the figures. The figures and the proportions of the elements depicted in the figures relative to each other are not to be considered as true to scale. Rather, individual elements may be displayed in an exaggeratedly large format for better presentation and/or comprehensibility.

DETAILED DESCRIPTION

(8) FIG. 4 schematically shows a semiconductor laser array 1 with a plurality of radiation-emitting lasers 10. Such an array 1 can be an infrared high power diode laser array with radiation in the infrared range. Alternative exemplary embodiments emit light in the visible or ultraviolet range.

(9) Five lasers 10 arranged side by side are shown as an example. The lasers 10 are diode lasers with three laser diodes arranged one above the other, i.e. vertically stacked, and connected in series, each forming a laser region 11, 12, 13.

(10) The semiconductor laser array 1 is constructed as a semiconductor layer stack on a common substrate 20, for example based on GaAs, by means of which a common contacting of the lasers 10 is made possible. The lasers are separated by trenches 40. A contact layer 30 is arranged on top of each laser. A voltage can be applied between the contact layer 30 and the common substrate 20 to control the laser 10.

(11) The geometrical dimensions of a semiconductor laser array 1 and the lasers 10 therein can be selected arbitrarily. Only the specified requirements for the laser properties, in particular the desired radiation emission, must be met. The number of individual lasers 10 in the array 1, which are generated by material recesses, is freely selectable. The number of stacked laser diodes in each laser 10 is freely selectable. This provides sufficient degrees of freedom for the design of an array 1 with given array properties.

(12) In this exemplary embodiment, the common substrate 20 is the common anode A of the lasers 10, and the contact layers 30 are the cathodes of the individual lasers 10.

(13) The semiconductor layer stacks for each laser can be produced by growing epitaxial layers on the substrate 20, so that the layers for the later lasers 10 are produced parallel and simultaneously. The subsequent production of the individual lasers 10 in the array 1 from the layer sequence can be done in different ways. In one exemplary embodiment, the lasers 10 are formed by poorly conducting vertical surfaces, which are created by diffusing material into the laser layers down to the substrate. By sawing, optical burning or etching, separation trenches 40 that are a few micrometers wide can be formed between the lasers 10 and can optionally be filled with optically insulating material to reduce crosstalk. Alternative methods for the production of high-resistance or non-conductive or poorly conductive layers between the lasers 10 are conceivable.

(14) FIG. 5 shows an exemplary embodiment of a laser from the semiconductor laser array in FIG. 4.

(15) The common substrate is an n-doped substrate 20n based on GaAs, which serves as a common anode A. This is also illustrated by the circuit symbol next to the laser 10.

(16) The laser 10 comprises a first laser region 11 with a pn junction region 110, a second laser region 12 with a pn junction region 120, and a third laser region 13 with a pn junction region 130, each pn junction region 110, 120, 130 comprising a p-doped layer p and an n-doped layer n, between which an active layer for radiation emission is sandwiched. The p-doped layers p of the pn junction regions 110, 120, 130 face the substrate 20n. The n-doped layers n of the pn junction regions 110, 120, 130 face away from the substrate 20n.

(17) A tunnel diode 15 is provided between the substrate 20n and the first laser region 11, as well as between the first and second laser regions 11, 12 and between the second and third laser regions 12, 13. Each tunnel diode 15 has a p- and an n-doped tunnel diode layer p-TJ, n-TJ.

(18) The lasers 10 comprise a layer sequence so that in the laser regions 11, 12, 13 in the stack the p-doped layer structure p always faces the substrate 20n and the n-doped layer structure n faces the surface. A tunnel diode 15, also known as a tunnel contact, is always provided between the individual laser regions 11, 12, 13 in the stack to form a low-resistance transition between the laser regions 11, 12, 13.

(19) The layer sequence of the semiconductor layer stack of the laser 10 on a common n-doped substrate 20n is as follows in ascending order: on the n-doped substrate 20n, the n-doped tunnel diode layer n-TJ and the p-doped tunnel diode layer p-TJ are arranged, followed by the p-doped layer p and the n-doped layer n of the first pn junction region 110, then the n-doped tunnel diode layer n-TJ and the p-doped tunnel diode layer p-TJ, followed by the p-doped layer p and the n-doped layer n of the second pn junction region 120, then the n-doped tunnel diode layer n-TJ and the p-doped tunnel diode layer p-TJ, followed by the p-doped layer p and the n-doped layer n of the third pn junction region 130, and on top of this the n-doped cathode contact layer 30n. The active layers of the pn junction regions 110, 120, 130 were not mentioned. Further intermediate layers are optional.

(20) FIG. 6 shows another exemplary embodiment of a laser 10 from the semiconductor laser array 1 in FIG. 4. To avoid repetition, only the differences to the exemplary embodiment shown in FIG. 5 are described.

(21) In this exemplary embodiment a p-doped cathode contact layer 30p is provided, between which and the third pn junction region 130 a tunnel diode 15 with an n- and a p-doped tunnel diode layer n-TJ, p-TJ is arranged. The n-doped tunnel diode layer n-TJ faces the third laser region 130. The p-doped tunnel diode layer p-TJ faces the cathode contact layer 30p. This exemplary embodiment enables standardized production if, in accordance with conventional design, a p-doped top contact surface 30 is specified.

(22) FIG. 7 shows another exemplary embodiment of a laser 10 from the semiconductor laser array 1 in FIG. 4. To avoid repetition, only the differences to the exemplary embodiment shown in FIG. 5 are described.

(23) In this exemplary embodiment a p-doped substrate 20p is provided as a common anode A. This eliminates the need for the tunnel diode 15 between the substrate 20p and the first laser region 11.

(24) The layer sequence of the semiconductor layer stack on the common p-doped substrate 20p is as follows in ascending order: on the p-doped substrate 20p, the p-doped layer p and the n-doped layer n of the first pn junction region 110 are arranged, then the n- and the p-doped tunnel diode layers n-TJ, p-TJ, followed by the p- and the n-doped layers p, n of the second pn junction region 120, then the n- and the p-doped tunnel diode layers n-TJ, p-TJ, followed by the p- and the n-doped layers p, n of the third pn junction region 130, and on top of this the n-doped cathode contact layer 20n. The active layers of the pn junction regions 110, 120, 130 were not mentioned. Further intermediate layers are optional.

(25) FIG. 8 shows another exemplary embodiment of a laser 10 from the semiconductor laser array 1 in FIG. 4. To avoid repetition, only the differences to the exemplary embodiment shown in FIG. 6 are described.

(26) In this exemplary embodiment a p-doped substrate 20p is provided as a common anode. Therefore the tunnel diode between the substrate 20p and the first laser region 11 is dispensable and missing.

(27) The exemplary embodiments described in FIGS. 5 to 8 illustrate that semiconductor laser arrays 1 with a common anode A can be produced with both n- and p-doped substrates 20n, 20p.

(28) The cathode contact layer 30n, 30p can have the following variants: Either it is n-doped with any doping level and thickness or p-doped with any doping level and thickness with a tunnel diode 15 below.

(29) FIG. 9 shows an exemplary embodiment of a semiconductor laser array circuit arrangement for controlling the exemplary embodiments of semiconductor laser arrays 1 described in FIGS. 4 to 8 with a common anode A for the laser regions 10 of the semiconductor laser array 1.

(30) The semiconductor laser array circuit arrangement has one driver 60 for each laser 10. The driver 60 comprises an n-MOSFET 66 with drain, source and gate terminals D, S, G and a MOSFET driver 65 connected to the gate terminal G. The MOSFET driver 65 is connected to a control potential Vs and a reference potential GND. Depending on the applied voltage it allows to control the MOSFET 66 via its gate terminal G and to influence its radiation in a desired way.

(31) The common anode A is connected to the supply potential Vc. The cathodes of the lasers 10 are electrically connected to the drain terminal D of the MOSFET 66 controlling them. The source terminals S are connected to the reference potential GND. This control is also known as source control, which provides the best possible pulse control for the diode laser array 1. The required control voltage Vs is lower than with conventional arrangements. Voltage and current gain are greater than one.

(32) The semiconductor laser array circuit arrangement may be integrated so as to comprise the semiconductor laser array 1 and also at least parts, in particular the n-MOSFETS 66, of the drivers 60. Due to the reduced space requirements of the n-MOSFETs 66, the interconnect structures between the n-MOSFETs 66 and the lasers 66 are short, reducing unwanted circuit and conductivity effects.

(33) The features of the exemplary embodiments can be combined. The invention is not limited by the description by means of the exemplary embodiments. Rather, the invention comprises any new feature as well as any combination of features, which includes in particular any combination of features in the claims, even if this feature or combination itself is not explicitly specified in the claims or exemplary embodiments.

REFERENCE SIGNS

(34) 1 semiconductor laser array

(35) 10 semiconductor laser

(36) 11, 12, 13 laser regions

(37) 15 tunnel diode

(38) 20, 20n, 20p substrate

(39) 30, 30n, 30p contact layer

(40) 40 trench

(41) 60 driver

(42) 65 MOSFET driver

(43) 66 MOSFET

(44) 110, 120, 130 pn junction region

(45) A anode

(46) C cathode

(47) G, S, D gate, source, drain terminal

(48) n n-doped layer

(49) n-TJ n-doped tunnel diode layer

(50) p p-doped layer

(51) p-TJ p-doped tunnel diode layer

(52) Vc supply potential

(53) Vs control potential

(54) GND reference potential