Power switch over-power protection

Abstract

An over-power protection circuit for a MOSFET includes an over-current protection circuit and a current limit setting circuit, and an over-power protection circuit configured to continuously monitor a voltage across the MOSFET being protected to prevent over-power conditions, and to dynamically determine a maximum current limit based on the monitored voltage and a pre-set maximum power limit.

Claims

1. A protection circuit, comprising: an over-current protection circuit for coupling to a protected device, the protected device having a pre-set maximum current limit and a pre-set maximum power limit; and a current limit setting circuit coupled to the over-current protection circuit and the protected device, the current limit setting circuit comprising an inverse voltage-to-current converter circuit for providing a current that is inversely related to a measured voltage across the protective device for determining a current indicator signal based on the pre-set maximum power limit divided by the measured voltage across the protected device, the current limit setting circuit configured to provide a target current limit signal to the over-current protection circuit for limiting current through the protected device, the target current limit signal being the lower one of: the pre-set maximum current limit, and the current indicator.

2. The circuit of claim 1, wherein values for circuit components in the over-current protection circuit are selected so that the current indicator signal represents a maximum current allowed based on the pre-set maximum power limit divided by the measured voltage across the protective device.

3. The circuit of claim 1, wherein the protected device includes a MOSFET circuit.

4. The circuit of claim 1, wherein the over-current protection circuit comprises: a current control circuit configured to generate a current control signal in response to comparing a sensed current signal in the protected device with the target current limit signal; and a device driver circuit configured to receive the current control signal and to control current flow in the protected device.

5. The circuit of claim 4, wherein the sensed current signal and the target current limit signal are current signals.

6. The circuit of claim 4, wherein the current control circuit comprises: a current sense circuit configured to sense a current in the protected device to determine the sensed current signal; and a comparator circuit configured to compare the sensed current signal in the protected device with the target current limit signal, and to generate a current control signal.

7. The circuit of claim 6, wherein the comparator circuit comprises a current comparator circuit configured to receive two current signals and generate the current control signal that can have a first voltage value and a second voltage value.

8. The circuit of claim 4, wherein the device driver circuit comprises: a charge pump circuit for providing either one of a high device drive signal or a low device drive signal in response to the current control signal to control the current in the protected device.

9. The circuit of claim 1, wherein the current limit setting circuit further comprises: a current limit selector circuit configured to select a lower one of the pre-set maximum current limit and the current indicator signal.

10. The circuit of claim 9, wherein the inverse voltage-to-current converter circuit comprises: a first terminal and a second terminal for receiving a first input voltage signal and a second input voltage signal from the protected device; a voltage-to-time converter circuit for providing a time indicator pulse signal with a pulse width inversely related to a difference between the first and second input voltage signals; a time-to-voltage converter circuit for providing a voltage indicator signal having a magnitude based on the pulse width of the time indicator pulse signal; a voltage-to-current converter circuit for providing the current indicator signal having a magnitude proportional to the voltage indicator signal, the current indicator signal being configured to have a magnitude inversely related to the difference between the first and the second input voltage signals; and the current indicator signal representing a maximum allowed current based on the pre-set maximum power limit for the voltage across the protective device.

11. The circuit of claim 10, wherein values for circuit components in the inverse voltage-to-current converter circuit are selected so that the current indicator signal represents the maximum current allowed based on the pre-set maximum power limit for a given voltage across the protected device.

12. The circuit of claim 11, wherein the selection is according to the formula: $P_{\mathrm{LMT}}=I\Delta V=K_C\frac{R_1{C}_1}{R_2{C}_2}{V}_{\mathrm{REF}}{I}_{\mathrm{REF}}$ where: ΔV is the voltage across the protected device; Kc is a current sensing ratio; R1, C.sub.1, and VREF are a resistor, a capacitor, and a voltage reference, respectively, in the voltage-to-time converter circuit; C.sub.2 and IREF are a capacitor and a current reference, respectively, in the time-to-voltage converter circuit; and R2 is a resistor in the voltage-to-current converter circuit.

13. The circuit of claim 10, wherein the voltage-to-time converter circuit comprises: a first resistor coupled to the first input voltage signal for sampling a first current; a second resistor coupled to the second input voltage signal for sampling a second current; a first capacitor configured to be charged by a difference between the first current and the second current; and a latch configured to produce the time indicator pulse signal with a pulse width related to a charging time of the first capacitor.

14. The circuit of claim 10, wherein the time-to-voltage converter circuit comprises: a reference current source for generating a reference current signal; and a capacitor coupled to the reference current source through a switch controlled by the time indicator pulse signal; wherein the time-to-voltage converter circuit is configured to charge the capacitor by the reference current source during an on-time of the time indicator pulse signal, and to produce a voltage on the capacitor as the voltage indicator signal.

15. The circuit of claim 10, wherein the voltage-to-current converter circuit comprises a current regulator including an operational amplifier configured to produce an output current proportional to the voltage indicator signal.

16. An over-power protection circuit for a MOSFET, comprising: an over-current protection circuit and a current limit setting circuit; and the over-power protection circuit configured to: continuously monitor a voltage across the MOSFET being protected to prevent over-power conditions; and dynamically determine a maximum current limit based on a pre-set maximum power limit divided by the monitored voltage across the MOSFET and; wherein: the over-current protection circuit is configured to sense a current flowing through a protected device; compare the sensed current with a target current limit; and limit the current through the protected device to below the target current limit; and the current limit setting circuit is configured to provide the target current limit to the over-current protection circuit, wherein the target current limit is a lower one of a pre-set current limit from a device specification and a second current limit based on the pre-set maximum power limit divided by a voltage across the MOSFET.

17. The over-power protection circuit of claim 16, wherein the current limit setting circuit comprises: an inverse voltage-to-current converter circuit configured to provide a current that is inversely related to a measured voltage across the MOSFET and to provide the second current limit determined based on the pre-set maximum power limit and the voltage across the protected device; and a current limit selector circuit configured to select the lower one of the pre-set current limit and the second current limit.

18. A protection circuit, comprising: an over-current protection circuit for coupling to a protected device, the protected device having a pre-set maximum current limit and a pre-set maximum power limit; and a current limit setting circuit coupled to the over-current protection circuit and the protected device, the current limit setting circuit configured to provide a target current limit signal to the over-current protection circuit for limiting current through the protected device, the target current limit signal being the lower one of: the pre-set maximum current limit, and a current indicator signal determined based on the pre-set maximum power limit and a voltage across the protected device; wherein the current limit setting circuit comprises: an inverse voltage-to-current converter circuit configured to provide the current indicator signal based on the pre-set maximum power limit and the voltage across the protected device; and a current limit selector circuit configured to select a lower one of the pre-set maximum current limit and the current indicator signal; wherein the inverse voltage-to-current converter circuit comprises: a first terminal and a second terminal for receiving a first input voltage signal and a second input voltage signal from the protected device; a voltage-to-time converter circuit for providing a time indicator pulse signal with a pulse width inversely related to a difference between the first and second input voltage signals; a time-to-voltage converter circuit for providing a voltage indicator signal having a magnitude based on the pulse width of the time indicator pulse signal; a voltage-to-current converter circuit for providing the current indicator signal having a magnitude proportional to the voltage indicator signal, the current indicator signal being configured to have a magnitude inversely related to the difference between the first and the second input voltage signals; the current indicator signal representing a maximum allowed current based on the pre-set maximum power limit for the voltage across the protective device.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

(1) FIG. 1 is a simplified schematic diagram illustrating an over-power protection circuit for protecting a power device that embodies certain aspects of this invention;

(2) FIG. 2 is a simplified schematic diagram illustrating an over-current protection circuit that embodies certain aspects of this invention;

(3) FIG. 3 is a simplified schematic diagram illustrating a voltage-to-current converter circuit for providing an output current I.sub.CAL that is inversely related to an input voltage that embodies certain aspects of this invention;

(4) FIG. 4 is a simplified schematic diagram illustrating a voltage-to-time converter circuit for providing a voltage pulse signal with a pulse width inversely related to a magnitude of an input voltage that embodies certain aspects of this invention;

(5) FIG. 5 is a simplified schematic diagram for a time-to-voltage converter circuit that embodies certain aspects of this invention;

(6) FIG. 6 is a waveform diagram illustrating the waveforms of T.sub.CAL, Φ.sub.1, and Φ.sub.2 described above in connection to FIG. 5 that embodies certain aspects of this invention;

(7) FIG. 7 is a simplified schematic diagram illustrating a voltage-to-current converter circuit that embodies certain aspects of this invention; and

(8) FIG. 8 is a simplified schematic diagram of a current selector circuit that embodies certain aspects of this invention.

DETAILED DESCRIPTION OF THE INVENTION

(9) Electronics devices, such as power MOSFETs, are usually designed to operate within its Safe Operation Area (SOA), which defines, among other things, how long a power MOSFETs can operate with a certain current flowing through it under a certain voltage. In embodiments of the invention, circuits and methods are provided using an over-current protection circuit to also provide over-power protection, i.e., to limit the power consumed in the power MOSFET to within the pre-set maximum power limit to protect the power MOSFET from performance degradation, short life time, and damages.

(10) In some embodiments, the voltage across a power switch is monitored, and a safe current limit is determined from a power limit. The power limit can be determined, for example, from the Safe Operation Area (SOA) of the device. Given a power limit, the higher the voltage across the device, the lower the allowable current.

(11) FIG. 1 is a simplified schematic diagram illustrating an over-power protection circuit for protecting a power device that embodies certain aspects of this invention. A power device is often used as a switch between a power supply and a load device for controlling the power provided to the load device. For example, in FIG. 1, a power device 20 can have a first terminal IO1 for coupling to a power supply and a second terminal IO2 for coupling to a load device. The power device 20 can include a single power transistor or a combination of power transistors. The power device can be a bipolar transistor or an MOSFET. In the example of FIG. 1, power device 20 represents an MOS power device being protected by an over-power protection circuit 100. In this particular example, power device 110 includes the combination of two power MOSFETs 111 and 112, each having a drain (D), source (S), and gate (G) terminals. It is understood that the circuits and methods described here are applicable to any device that needs to be protected against over-power conditions. In the description below, the device being protected, such as power device 20, is also referred to as the protected device.

(12) As shown in FIG. 1, the over-power protection circuit 100 includes an over-current protection circuit 110 that is configured to sense a current flowing through the power device 20, compare the sensed current with a current limit, and prevent the current flowing through the power device from exceeding the current limit. The over-power protection circuit also includes a current limit setting circuit 120 that is configured to provide a current limit I.sub.LMT to the over-current protection circuit 110. The current limit can be either a pre-set current limit I.sub.SET, which can be determined from the device specification, or a current limit I.sub.CAL based on the power limit of the power device and a measured current flowing through the power device. As descried above, the current limit I.sub.CAL can be a maximum current allowed to flow through power device, which can be determined from a pre-set maximum power limit threshold P.sub.LMT divided by the voltage crossing the power MOSFET. For example, the power limit threshold P.sub.LMT can be determined based on its SOA requirement.

(13) As shown in FIG. 1, the current limit setting circuit 120 can include an inverse voltage-to-current converter 122 and a current limit selector circuit 124. The inverse voltage-to-current conversion circuit 122 is configured for sensing a voltage across two terminals of the protected device, e.g., power device 20, and provide a current that is inversely related to the voltage across the two terminals of the protected device. As described above, given a power limit P.sub.LMT, the maximum current allowed in the device is inversely proportional to the voltage across the device. The output current of the inverse voltage-to-current conversion circuit I.sub.CAL is the maximum allowed current based on the sensed voltage. The current limit setting circuit 120 also includes a current selector circuit 124 for selecting a current limit I.sub.LMT from either the I.sub.CAL described above or a current I.sub.SET, which is a pre-et current limit for the over-current protection circuit, which may be based on the current carrying capability of the device, and may not include considerations for over-power protection.

(14) In embodiments of the invention, values for circuit components in the over-current and over-power protection circuit are selected so that the current indicator signal represents a maximum current allowed based on the pre-set maximum power limit for a measured voltage across the protective device. More details are described below.

(15) FIG. 2 is a simplified schematic diagram illustrating an over-current protection circuit that embodies certain aspects of this invention. Over-current protection circuit 200 in FIG. 2 is an example of circuits which can be used as the over-current protection circuit 110 in FIG. 1. The over-current protection circuit 200 includes a current control circuit 210 and a device driver circuit 220. In can be seen that over-current protection circuit 200 has two output terminals 201 and 202 coupled to the gates of the MOSFETs and a third output terminal 203 coupled to the source terminals of the power MOSFET for driving the MOSFETS. The over-current protection circuit 200 also has a first input terminal 211 for current sensing and a second input terminal 212 for receiving a target current limit signal I.sub.LMT.

(16) The current control circuit 210 generates a current control signal in response to comparing a sensed current signal in the protected device with the target current limit signal. In FIG. 2 current control circuit 210 compares the current sensed the current Isense in the power MOSFET with the current limit I.sub.LMT from the inputs and generates current control signal 214, which is used to modify the gate drive voltage according to the comparison result to change the bias of the MOSFET and the current and voltage of the power MOSFET in order to limit the current and power in a load device.

(17) The current control circuit 210 includes a current sense circuit 214 to sense current through power MOSFET by monitor voltage cross the output power MOSFET near the I02 terminal. Since the Rdson of a power MOSFET is pre-defined and designed, the voltage across the output power MOSFET Vds is equal to I×Ron, the sensed current Isense can be converted from Vds by a voltage to current converter.

(18) A conventional current sense circuit can also be used. As an example, a small sampling MOSFET much smaller than the power MOSFET, for example, by a ratio of 1000:1, can be biased with the same drain, source, and gate voltages as the power MOSFET and provides a sensed current that represents the current through the power MOSFET.

(19) In FIG. 2, current control circuit 210 includes a comparator circuit 218 with input signals Isense and I.sub.LMT. Isense is a sensed current signal that represents a current flowing through the power MOSFETS, and I.sub.LMT is a target current limit signal that triggers a current protection action. The output of the current control circuit 210 is fed to device driver circuit 220 to reduce the current in the power MOSFET. In some embodiments, comparator circuit 215 can include a current comparator that receives two input current signals Isense and I.sub.LMT and produces a current control signal 214, which can be a voltage signal having a low value and a high value for driving the gate of the MOSFET. For example, the high voltage value can be a power supply voltage VDD, and a low voltage value can be a preset safe gate voltage to allow a safe current in the MOSFET.

(20) The device driver circuit 220 can includes a charge-pump driver having two separate charge-pumps. The charge pump driver can include multiple capacitors and switches. The charge pump for input power MOSFET (connected to terminal IO1) is for current limit control, so the Vgs can be reduced and regulated when an over-current event occurs. The charge pump for output power MOSFET (connected to terminal IO2) is directly connected to a power supply VDD, so that this MOSFET is fully turned on.

(21) Charge pump gate driver illustrates the gate drive circuit for the power MOSFET close to the input terminal. When the sensed power MOSFET current Isense reaches the current limit, the gate driver circuit switches the gate drive voltage to a preset safe gate voltage.

(22) As shown in FIG. 2, in the first time interval, timing signal Φ1 closes two switches to charge the capacitor to a voltage, for example, VDD at 5V, when there is no over-current or over-power condition. When the over-current or over-power condition is met, signal Φ2 closes corresponding switches changing the V.sub.DS, to the voltage of the capacitor, which ensures a safe current through the MOSFET.

(23) FIG. 3 is a simplified schematic diagram illustrating a voltage-to-current converter circuit for providing an output current I.sub.CAL that is inversely related to an input voltage that embodies certain aspects of this invention. The voltage-to-current converter circuit 300 in FIG. 3 can be used as the inverse voltage-to-current converter circuit 122 of FIG. 1. As shown in FIG. 3, inverse voltage-to-current converter circuit 300 includes a first terminal 301 and a second terminal 302 for receiving a first input voltage signal and a second input voltage signal from the protected device, e.g., a power MOSFET. Thus, the difference between the first input voltage signal and the second input voltage signal represent a voltage across the first and second terminals. Inverse voltage-to-current converter circuit 300 also include a voltage-to-time converter circuit 310 for providing a time indicator pulse signal T.sub.CAL with a pulse width inversely related to a difference between the first and second input voltage signals, a time-to-voltage converter circuit 320 for providing a voltage indicator signal V.sub.CAL having a magnitude based on the pulse width of the time indicator pulse signal, a voltage-to-current converter circuit 330 for providing a current indicator signal I.sub.CAL having a magnitude proportional to the voltage indicator signal. The current indicator signal I.sub.CAL is configured to have a magnitude inversely related to the difference between the first and the second input voltage signals. The current indicator signal I.sub.CAL represents a maximum allowed current based on the pre-set maximum power limit for a voltage across the protective device.

(24) In some embodiments, values for circuit components in the inverse voltage-to-current converter circuit are selected so that the current indicator signal represents the maximum current allowed based on the pre-set maximum power limit for a given voltage across the protective device. As an example, the selection is according to the formula:

(25) $P_{\mathrm{LMT}}=I\Delta V=K_C\frac{R_1{C}_1}{R_2{C}_2}{V}_{\mathrm{REF}}{I}_{\mathrm{REF}}$
where: ΔV is the voltage across the protected device; Kc is a current sensing ratio; R1, C.sub.1, and VREF are a resistor, a capacitor, and a voltage reference, respectively, in the voltage-to-time converter circuit; C.sub.2 and IREF are a capacitor and a current reference, respectively, in the time-to-voltage converter circuit; and R2 is a resistor in the voltage-to-current converter circuit.

(26) FIG. 4 is a simplified schematic diagram illustrating a voltage-to-time converter circuit for providing a voltage pulse signal with a pulse width inversely related to a magnitude of an input voltage that embodies certain aspects of this invention. The voltage-to-time converter circuit 400 in FIG. 4 is an example of circuit that can be used as the voltage-to-time conversion circuit 310 of FIG. 3. As shown in FIG. 4, the voltage-to-time conversion circuit 400 has two input terminals for coupling to two terminals of a device for monitoring the voltage across the two terminals. In FIG. 4, a first terminal marked I01 (Input) is coupled to an input terminal of the device being monitored, and a second terminal marked I02 (Output) is coupled to an output terminal of the device being monitored. These terminals correspond to the I01 and I02 terminals of the power MOSFET of FIG. 1. A first resistor R1 is connected to terminal I01 to sense a first current Ip determined by the voltage at terminal I01. Similarly, a second resistor, also having a magnitude R1, is connected to terminal I02 to sense a second current I.sub.N determined by the voltage at terminal I02. Current mirror circuits 411 and 412 are used to produce currents Ip and I.sub.N coupled at an internal node 415. A current Ic, which is equal to the difference currents Ip and I.sub.N at node 415, is used to charge a first capacitor C.sub.1 through a first switch SW1. A timer circuit 421 resets and restarts the monitoring cycle periodically, e.g., each period can be 32 μsec, or other suitable time intervals. Before the start of each cycle, capacitor C.sub.1 is discharged through a second switch SW2. At the start of each period, the output signal T.sub.CAL is set to high, and capacitor C.sub.1 starts to be charged by the current Ic from node 415, which is the difference between the currents between Ip and I.sub.N. As the voltage V1 on C.sub.1 reaches a reference voltage VREF, comparator CMP 422 triggers the D-latch 424 to lower the output signal T.sub.CAL. The larger the current Ic=(Ip−I.sub.N), the quicker capacitor C.sub.1 charges up; conversely, the smaller the current Ic=(Ip−I.sub.N), the slower capacitor C.sub.1 charges up. Therefore, the length, or pulse width, of output pulse signal T.sub.CAL is inversely related to the magnitude of current Ic=(Ip−I.sub.N). As described, the voltage-to-time conversion circuit 400 of FIG. 4 converts voltage cross a power MOSFET to a pulse signal T.sub.CAL, which is a time indicator pulse signal with a pulse width related to a charging time of the first capacitor. Further, the maximum pulse width of T.sub.CAL is determined by the period of the timer circuit, which can be a selectable parameter of the circuit. In FIG. 4, a second switch SW2 is used to discharge capacitor C.sub.1 in response to the T.sub.CAL signal in every cycle.

(27) FIG. 5 is a simplified schematic diagram for a time-to-voltage converter circuit that embodies certain aspects of this invention. As shown in FIG. 5, a time-to-voltage converter circuit 500 is configured for providing an output voltage having a magnitude based on a length of an input voltage pulse signal. Time-to-voltage converter circuit 500 is an example of time-to-voltage converter circuit that can be used as the time-to-voltage converter circuit 320 in FIG. 3. In FIG. 5, the time-to-voltage converter circuit 500 includes a reference current source for generating a reference current signal I.sub.REF, a first capacitor C.sub.1, and a second capacitor C.sub.2. The first capacitor C.sub.1 is coupled to the reference current source 501 through a first switch 511 controlled by the time indicator pulse signal T.sub.CAL, which is provided by the voltage-to-time converter 400 in FIG. 4. The time-to-voltage converter circuit 500 is configured to charge the capacitor C.sub.1 by the reference current source 501 during an on-time of the time indicator pulse signal T.sub.CAL, and to produce a voltage 520 on the capacitor C.sub.1 as the voltage indicator signal V.sub.CAL.

(28) The time-to-voltage converter circuit 500 also has a second switch 513 is controlled by a control signal Φ.sub.1, for controlling the transfer of charges from capacitor C.sub.1 to a second capacitor C.sub.3 for holding the voltage at node 520 to provide the voltage indicator signal V.sub.CAL. A third switch 515 is controlled by a second control signal Φ.sub.2. For controlling the discharge of capacitor C.sub.2 in every cycle. The time-to-voltage conversion circuit is configured to provide an output signal V.sub.CAL, whose magnitude is based on the length of input voltage pulse signal T.sub.CAL. The operation of the time-to-voltage conversion circuit in FIG. 3 is described below with reference to FIG. 6.

(29) FIG. 6 is a waveform diagram illustrating the waveforms of T.sub.CAL, Φ.sub.1, and Φ.sub.2 described above in connection to FIG. 5 that embodies certain aspects of this invention. It can be seen in FIG. 5 that when T.sub.CAL is on and Φ.sub.1 and Φ.sub.2 are off, capacitor C.sub.2 is charged for a time duration T.sub.CAL. Next, T.sub.CAL is low, Φ.sub.1 is turned on, and C.sub.3 is charged by the voltage on C.sub.2. In this circuit, C.sub.2>>C.sub.3. Because the capacitance of C.sub.3 is much smaller than C.sub.2, the voltage on C.sub.2 essentially transfers to C.sub.3 with negligible voltage. Then, Φ.sub.2 turns on to discharge C.sub.2. The output V.sub.CAL at capacitor C.sub.3 can be expressed as follows.

(30) $V_{\mathrm{CAL}}=\frac{I_{\mathrm{REF}}}{C_2}{T}_{\mathrm{CAL}}$
In this circuit, C.sub.3<<C.sub.2. For example, the capacitance of C.sub.2 can be 10 times the capacitance of C.sub.3. In a specific example, C.sub.2 may have a capacitance of 10 pF, and C.sub.3 may have a capacitance of 1 pF. The output voltage V.sub.CAL can be held by a small capacitor C.sub.3 for processing in the next stage.

(31) FIG. 7 is a simplified schematic diagram illustrating a voltage-to-current converter circuit that embodies certain aspects of this invention. The voltage-to-current converter circuit 700 is an example of voltage-to-current converter circuit that can be used as the voltage-to-current converter circuit 330 of FIG. 3. In this example, the voltage-to-current converter circuit 700 a current regulator includes a current regulator for providing a current signal I.sub.CAL having a magnitude proportional to the an input voltage V.sub.CAL, which can be an output from the time-to-voltage converter circuit of FIG. 5. The current signal I.sub.CAL has a magnitude inversely related to the input voltage of the inverse voltage-to-current converter circuit 122 illustrated in FIG. 1 and the inverse voltage-to-current converter circuit 300 illustrated in FIG. 3.

(32) In FIG. 7, V.sub.CAL is an input to an operational amplifier 710 at the + input. The current I.sub.CAL is provided by a current mirror 720 and coupled to a resistor R2. Current mirror 720 is coupled to the output of the operational amplifier 710 in a feedback loop. The current I.sub.CAL is determined such that the voltage at the − input of the operation amplifier 710 is equal to V.sub.CAL. Therefore,

(33) $I_{\mathrm{CAL}}=\frac{V_{\mathrm{CAL}}}{R_2}$
I.sub.CAL is provided at the output by a current mirror circuit 720. Thus, the voltage-to-current converter circuit 700 produces an output current I.sub.CAL proportional to the voltage indicator signal V.sub.CAL.

(34) FIG. 8 is a simplified schematic diagram of a current selector circuit that embodies certain aspects of this invention. The current selector circuit 800 is an example of current limit selector circuit that can be used as the current limit setting circuit 124 of FIG. 1. As shown in FIG. 8, the current selector circuit includes a current comparator circuit ICMP (810) and a multiplexor circuit IMUX (820). The current comparator 810 is used to compare I.sub.CAL to I.sub.SET, the current limit I.sub.SET can be provided to the circuit either internally or externally on system board. The current multiplexer 820 to choose the smaller one between I.sub.CAL to I.sub.SET. To be the target current limit signal I.sub.LMT. The functions of the current selector circuit can be described with the following expressions.
If I.sub.CAL<I.sub.SET, set I.sub.LMT=I.sub.CAL;
If I.sub.CAL≥I.sub.SET, set I.sub.LMT=I.sub.SET;
In other words, the lower of the two input signals I.sub.CAL and I.sub.SET is used as the current limit provided to the over-current protection circuit.

(35) Referring to FIG. 1, in the protection circuit 100, the smaller one between I.sub.CAL to I.sub.SET is sent to the over-current protection circuit 110 to control the gate of power MOSFET in order to limit current through power MOSFET 20 at a current limit I.sub.LMT.

(36) Given a power limit, the values of the components in the over-power protection circuit can be determined to provide a target current limit signal to the over-current protection circuit 110 to control the gate of power MOSFET in order to limit the power to not exceed the power limit. From the equations described above.

(37) $T_{\mathrm{CAL}}=R_1{C}_1\frac{I_{\mathrm{REF}}}{\Delta V}$$V_{\mathrm{CAL}}=\frac{I_{\mathrm{REF}}}{C_2}{T}_{\mathrm{CAL}}$$I_{\mathrm{CAL}}=\frac{V_{\mathrm{CAL}}}{R_2}$
where ΔV is the voltage across the protected device.

(38) We can have

(39) $I_{\mathrm{CAL}}=\left(\frac{R_1{C}_1}{R_2{C}_2}{V}_{\mathrm{REF}}{I}_{\mathrm{REF}}\right)/\Delta V$
Let the sensing current ratio be defined as K.sub.C,

(40) $K_C=\frac{I}{I_{\mathrm{SENSE}}}$
in which I is the current flowing through the power MOSFET.

(41) When the over-current protection (OCP) condition occurs with the current limit set by I.sub.CAL, we have the following relationship:

(42) $P_{\mathrm{LMT}}=I_{\mathrm{CAL}}\Delta V=K_C\frac{R_1{C}_1}{R_2{C}_2}{V}_{\mathrm{REF}}{I}_{\mathrm{REF}}$
where ΔV is the voltage across the protected device.

(43) With a given P.sub.LMT, the appropriate values of the parameters can be selected. With these parameters, I.sub.CAL can be generated reversely proportional to ΔV. For example, depending on the embodiments, Kc can be between 10.sup.4 to 10.sup.6, R1 and R2 can be 20 KΩ to 800 KΩ, C.sub.1 and C.sub.2 can be 1 pF to 10 pf, V.sub.REF can be 1 V to 5V, and I.sub.REF can be 1 μA to 5 μA, etc.

(44) In these embodiments, I.sub.CAL can be made to be less dependent to variations in process conditions, supply voltage, and operating temperature. For example, R.sub.1, R.sub.2, C.sub.2 and C.sub.2 can be designed to match each other, V.sub.REF can be determined from a bandgap voltage circuit, and I.sub.REF can be derived from a bandgap voltage crossing a zero-Tc resistor.