Microstrip DC block

Abstract

A microstrip DC block includes a first signal line having a first signal line end and a first centreline (C.sub.1); a second signal line having a second signal line end and a second centreline (C.sub.2); a first spur-line extending from the first signal line end towards the second signal line end; a first stepped impedance line extending from the first signal line end towards the second signal line end, wherein the first stepped impedance line is parallel to the first spur line; a second spur-line extending from the second signal line end towards the first signal line end; a second stepped impedance line extending from the second signal line end towards the first signal line end, wherein the second stepped impedance line is parallel to the second spur line, and wherein the second stepped impedance line is coupled to the first stepped impedance line.

Claims

1. A microstrip DC block comprising: a first signal line having a first signal line end and a first centreline; a second signal line having a second signal line end and a second centreline; a first spur-line electrically connected to and extending from the first signal line end towards the second signal line end; a first stepped impedance line electrically connected to and extending from the first signal line end towards the second signal line end, wherein the first stepped impedance line is parallel to the first spur line; a second spur-line electrically connected to and extending from the second signal line end towards the first signal line end; a second stepped impedance line electrically connected to and extending from the second signal line end towards the first signal line end, wherein the second stepped impedance line is parallel to the second spur line, and wherein the second stepped impedance line is coupled to the first stepped impedance line; wherein the first spur-line extends from a portion of the first signal line end that is proximate to a side of the first signal line, and wherein the first stepped impedance line extends from a portion of the first signal line end that is adjacent to the first spur-line and is proximate to the first centreline; wherein the second spur-line extends from a portion of the second signal line end that is proximate to a side of the second signal line, and wherein the second stepped impedance line extends from a portion of the second signal line end that is adjacent to the second spur-line and is proximate to the second centreline, and wherein the first and second spur-lines and the first and second stepped impedance lines are parallel to one another.

2. The microstrip DC block of claim 1, wherein the first stepped impedance line has a narrow portion and a wide portion, and wherein the second stepped impedance line has a narrow portion and a wide portion.

3. The microstrip DC block of claim 2, wherein the narrow portion of the first stepped impedance line has a length greater than that of the first spur-line, and wherein the narrow portion of the second stepped impedance line has a length greater than that of the second spur-line.

4. The microstrip DC block of claim 2, wherein the wide portion of the first stepped impedance line is shorter than the narrow portion of the first stepped impedance line, and wherein the wide portion of the second stepped impedance line is shorter than the narrow portion of the second stepped impedance line.

5. The microstrip DC block of claim 2, wherein the wide portion of the first stepped impedance line has an end that is proximate to the second signal line end, and wherein the wide portion of the second stepped impedance line has an end that is proximate to the first signal line end.

6. The microstrip DC block of claim 2, wherein the narrow portion and the wide portion of the first stepped impedance line have a common edge with the stepped impedance line being widened by increasing its width from the common edge in a direction substantially perpendicular to the centreline of the first signal line.

7. The microstrip DC block of claim 1, wherein the DC block is for use with a signal having an alternating current, a frequency f, and a wavelength in the microstrip line λ g.

8. The microstrip DC block of claim 7, wherein the first spur-line has a length of approximately λ g/12.

9. The microstrip DC block of claim 7, wherein the second spur-line has a length of approximately λ g/12.

10. The microstrip DC block of claim 1, wherein the portion of the second signal line from which the second spur-line extends is diagonally opposite to the portion of the first signal line from which the first spur-line extends.

11. The microstrip DC block of claim 1, wherein the first centreline and the second centreline are substantially coincident.

12. The microstrip DC block of claim 1, wherein the overall electrical length, Q, of the stepped impedance line is $\frac{\pi }{2\text{.}88}\mathrm{rad}.$

Description

DRAWING DESCRIPTION

(1) Certain embodiments of the invention will now be described by way of example only and with reference to the accompanying drawings in which:

(2) FIG. 1 shows an example of a DC block comprising quarter-wave microstrip lines.

(3) FIG. 2 shows a DC block using coupled stepped impedance lines with spur lines.

(4) FIG. 3 shows a graph comparing the example DC block of FIG. 1 and the DC block of FIG. 2.

DETAILED DESCRIPTION

(5) In the RF microstrip terminology, impedance is the opposition of a circuit to the flow of electrical energy from a source. In order to efficiently transmit RF signals across RF components, the skilled person can employ impedance matching when designing these components. Impedance matching takes into account the impedance of the signal input line and the impedance of the signal output line and attempts to make the transition between these impedances as smooth as possible. Doing so minimises power losses across components. This is particularly important where the input signal is weak as it is desirable to transmit the signal across an active RF circuit with as little interference as possible.

(6) A signal at a particular frequency entering a RF circuit may also have harmonic frequencies of the particular frequency. Harmonics can interfere with the signal and with the RF circuit in a detrimental manner Filters may be employed in RF circuits to remove some or all of the harmonics as well as transmission of other unwanted frequencies. A DC block for a RF circuit may be combined with filters to prevent harmonics of a particular frequency or frequencies from entering or propagating through the RF circuit.

(7) FIG. 1 shows a quarter-wave open-circuit coupled microstrip line 100. Existing RF circuits may use quarter-wave coupled lines as a DC block. The DC block is shown in a schematic view. The quarter-wave coupled line 100 depicted here comprises a first signal line 102 having a first signal line end 104, a first microstrip line 106 connected to the first signal line 102, a second signal line 108 having a second signal line end 110, and a second microstrip line 112 connected to the second signal line 108. The first 106 and second 112 microstrip lines are disposed between the first signal line 102 and the second signal line 108. The first microstrip line 106 extends from the first signal line end 104 towards the second signal line end 110. The first microstrip line 106 does not physically connect to the second signal line 108 in a conducting plane, where the conducting plane is a plane that comprises the coupled line elements. The second microstrip line 112 extends from the second signal line end 110 towards the first signal line end 104 and parallel to the first microstrip line 106. The second microstrip line 112 does not physically connect to the first signal line 102 in the conducting plane. The second microstrip line 112 also does not physically connect to the first microstrip line 106 in the conducting plane.

(8) The first signal line 102 and the second signal line 108 are transmission lines for transmitting signals between each other. A signal transmitted from the first signal line 102 having an alternating current, a frequency f, and a wavelength in the microstrip line of λ.sub.g is transmitted to the second signal line 108 by electromagnetic induction. The first 106 and second 112 microstrip lines each have a length of λ.sub.g/4 and are considered to be coupled to one another.

(9) FIG. 2 illustrates a DC block 200 using coupled stepped impedance lines with spur lines. The DC block 200 of FIG. 2 comprises a first signal line 202, a first spur-line 206 connected to the first signal line 202, a first stepped impedance line 208 connected to the first signal line 202, a second signal line 220, a second spur-line 224 connected to the second signal line 220, and a second stepped impedance line 226 connected to the second signal line 220. The first signal line 202 has a first signal line end 204 and the second signal line 220 has a second signal line end 222. The first 206 and second 224 spur-lines and the first 208 and second 226 stepped impedance lines are disposed between the first signal line end 204 and the second signal line end 222.

(10) The first 202 and second 220 signal lines have centrelines C.sub.1, C.sub.2 that are substantially coincident. The first 202 and second 220 signal lines are substantially the same widths as one another. The first signal line end 204 is substantially perpendicular to the centreline C.sub.1 of the first signal line. The second signal line end 222 is substantially perpendicular to the centreline C.sub.2 of the second signal line 220.

(11) As in the DC block 100 of FIG. 1, the first signal line 202 and the second signal line 220 of FIG. 2 are transmission lines for transmitting signals between each other. A signal transmitted from the first signal line 202 having an alternating current, a frequency f, and a wavelength in the microstrip line λ.sub.g is transmitted to the second signal line 220 by electromagnetic induction.

(12) The first spur-line 206 extends from the first signal line end 204 towards the second signal line end 222. The first spur-line 206 is proximate to an outer edge 207 of the first signal line 202. The first stepped impedance line 208 extends from the first signal line end 204 and parallel to the first spur-line 206 towards the second signal line end 222. The first stepped impedance line 208 extends from a portion 205 of the first signal line 202 that is closer to the centreline C.sub.1 of the first signal line 202 than the first spur-line 206.

(13) The first stepped impedance line 208 has a narrow portion 209 and a wide portion 210. The narrow portion 209 is connected to the first signal line end 204. The wide portion 210 is connected to the narrow portion 209 and has an end 211 proximate to the second signal line end 222. The narrow portion 209 extends from the first signal line end 204 and has a length greater than the first spur-line 206.

(14) The second spur-line 224 extends from the second signal line end 222 towards the first signal line end 204. The second spur-line 224 is proximate to an outer edge 225 of the second signal line 220, wherein the outer edge 225 of the second signal line 220 to which the second spur-line 224 is proximate is opposite to the outer edge 207 of the first signal line 202 to which the first spur-line 206 is proximate. In other words, the first spur-line 206 and the second spur-line 224 are diagonally opposite to one another.

(15) The second stepped impedance line 226 extends from the second signal line end 222 and parallel to the second spur-line 224 towards the first signal line end 204. The second stepped impedance line 226 also extends parallel to the first stepped impedance line 208. The second stepped impedance line 226 extends from a portion 223 of the second signal line 220 that is closer to the centreline C.sub.2 of the second signal line 220 than the second spur-line 224.

(16) Similarly to the first stepped impedance line 202, the second stepped impedance line 220 has a narrow portion 227 and a wide portion 228. The narrow portion 227 is connected to the second signal line end 222. The wide portion 228 is connected to the narrow portion 227 and has an end 229 proximate to the first signal line end 204. The narrow portion 227 extends from the second signal line end 222 and has a length greater than the second spur-line 224.

(17) The wide portion 210 of the first stepped impedance line 208 is proximate to the narrow portion 227 of the second stepped impedance line 226. The wide portion 228 of the second stepped impedance line 226 is proximate to the narrow portion 209 of the first stepped impedance line 208.

(18) The first stepped impedance line 208 and the second stepped impedance line 226 are considered to be coupled to one another. A signal transmitted from the first signal line 202 having an alternating current, a frequency f, and a wavelength in the microstrip line λ.sub.g is transmitted to the second signal line 220 by electromagnetic induction. The length of the first 206 and second 224 spur-lines is approximately λ.sub.g/12. The length of the first stepped impedance line 208 and the second stepped impedance line 226 is shorter than λ.sub.g/4.

(19) FIG. 3 is a graph comparing the performances of the quarter-wave DC block 100 of FIG. 1 and the DC block 200 of FIG. 2. The line marked by triangles is for that of the quarter-wave DC block 100. The line marked by squares is for that of the exemplary DC block 200. The x-axis tracks the signal frequency and the y-axis tracks insertion losses across each DC block. In this example, the fundamental frequency is approximately 2 GHz. This frequency has harmonics at multiples of 2 GHz.

(20) As can be seen from the graph, the quarter-wave DC block 100 is able to transmit the fundamental frequency and can block the second and fourth harmonics. However, while the third and fifth harmonics are attenuated slightly, the quarter-wave DC block 100 does not attenuate them enough. Therefore, these harmonics would still interfere with the main signal frequency.

(21) On the other hand, the exemplary DC block 200 of FIG. 2, using coupled stepped impedance lines and spur lines, is able to significantly attenuate all of the harmonic frequencies while still transmitting the main signal frequency. Therefore, the exemplary DC block 200 is able to effectively attenuate signal harmonics without compromising on the quality of the main signal.