Hybrid five-level bidirectional DC/DC converter and voltage match modulation method thereof

Abstract

The present disclosure discloses a hybrid five-level bidirectional DC/DC converter and a voltage match modulation method thereof. The converter includes a first input filter capacitor C.sub.inp and a second input filter capacitor C.sub.inn, an output filter capacitor C.sub.o, a DC voltage source, a primary-side hybrid five-level unit, a primary-side two-level half bridge, a secondary-side single-phase full bridge H2, a high-frequency isolation transformer M.sub.1, a high-frequency inductor L.sub.s, and a controller. A positive pole of a DC bus of the primary-side hybrid five-level unit is coupled to a positive pole of the corresponding DC voltage source and to a positive pole of the input filter capacitor C.sub.inp respectively. A negative pole of the DC bus of the primary-side hybrid five-level unit is coupled to a negative pole of the corresponding DC voltage source and to a negative pole of the input filter capacitor C.sub.inn respectively. A terminal of the primary-side hybrid five-level unit is coupled to a midpoint between the first input filter capacitor C.sub.inp and the second input filter capacitor C.sub.inn connected in series. The primary-side hybrid five-level unit is coupled to a primary side of the high-frequency isolation transformer M.sub.1 through the high-frequency inductor L.sub.s, and a midpoint of the primary-side two-level half bridge is coupled to another terminal of the primary side of the high-frequency transformer.

Claims

1. A hybrid five-level bidirectional DC/DC converter, comprising a first input filter capacitor C.sub.inp, and a second input filter capacitor C.sub.inn, an output filter capacitor C.sub.o, a DC voltage source, a primary-side hybrid five-level unit, a primary-side two-level half bridge, a secondary-side single-phase full bridge H.sub.2, a high-frequency isolation transformer M.sub.1, a high-frequency inductor L.sub.s and a controller; wherein a positive pole of a DC bus of the primary-side hybrid five-level unit is coupled to a positive pole of the DC voltage source and to a positive pole of the input filter capacitor C.sub.inp respectively, a negative pole of the DC bus of the primary-side hybrid five-level unit is coupled to a negative pole of the DC voltage source and to a negative pole of the input filter capacitor C.sub.inn respectively, a terminal of the primary-side hybrid five-level unit is coupled to a midpoint between the first input filter capacitor C.sub.inp and the second input filter capacitor C.sub.inn connected in series, the primary-side hybrid five-level unit is coupled to a primary side of the high-frequency isolation transformer M.sub.1 through the high-frequency inductor L.sub.s and a midpoint of the primary-side two-level half bridge is coupled to another terminal of the primary side of the high-frequency isolation transformer, wherein a transformation ratio of the high-frequency isolation transformer M.sub.1 is N:1; a positive pole of a DC bus of the secondary-side single-phase full bridge H.sub.2 is coupled to a positive pole of a corresponding DC load and to a positive pole of the output filter capacitor C.sub.o respectively, a negative pole of the DC bus of the secondary-side single-phase full bridge H.sub.2 is coupled to a negative pole of the corresponding DC load and to a negative pole of the output filter capacitor C.sub.o respectively, and an AC side of the secondary-side single-phase full bridge H.sub.2 is coupled to a secondary side of the high-frequency isolation transformer; and an input terminal of a control signal of the primary-side hybrid five-level unit, an input terminal of a control signal of the primary-side two-level half bridge, and an input terminal of a control signal of the secondary-side single-phase full bridge are respectively coupled to an output terminal of a switch signal corresponding to the controller, wherein nine levels are produced by an AC port voltage v.sub.p of the primary-side five-level unit: $\pm v_{in}, \pm \frac{3 v_{in}}{4}, \pm \frac{v_{in}}{2}, \pm \frac{v_{in}}{4}$ and 0, wherein v.sub.in represents an input DC voltage of the hybrid five-level bidirectional DC/DC converter; and an AC port voltage v.sub.s of the secondary-side single-phase full bridge H.sub.2 produces three levels as follows: ±V.sub.out and 0, wherein v.sub.out represents an output voltage of the hybrid five-level bidirectional DC/DC converter, wherein the controller comprises a sampling unit, a PI controller, and a modulation unit, wherein the sampling unit comprises two signal input terminals, and the two signal input terminals respectively measure the input voltage v.sub.in and the output voltage v.sub.out; the PI controller uses an error obtained by comparing the output voltage v.sub.out and a reference voltage v.sub.ref thereof as an input, and uses an output x obtained after being processed by the PI controller as a modulation signal; and the modulation unit uses the input voltage v.sub.in, the output voltage v.sub.out, the reference voltage v.sub.ref and the output x as input signals, and obtains a voltage transmission ratio F and drive signals based on the input voltage v.sub.in, the output voltage v.sub.out, and the transformation ratio N of the high-frequency isolation transformer.

2. A voltage match modulation method for the hybrid five-level bidirectional DC/DC converter according to claim 1, comprising: setting a PI controller parameter of the controller, specifically, setting a proportionality coefficient k.sub.p and an integration coefficient k.sub.i, for the controller, and calculating the output x of the PI controller to serve as the modulation signal; outputting the voltage transmission ratio F and the output x of the PI controller respectively to the modulation unit of the controller to calculate a control variable; and driving, based on the control variable, a fully-controlled switch device of the primary-side hybrid five-level unit, a fully-controlled switch device of the primary-side two-level half bridge, and a fully-controlled switch device of the secondary-side single-phase full bridge to control actions of the fully-controlled switch devices to implement optimized operation.

3. The voltage match modulation method according to claim 2, wherein the voltage transmission ratio F is: $F = \frac{{Nv}_{out}}{v_{in}}$ wherein the transformation ratio N of the high-frequency isolation transformer serves as an initial value presetting.

4. The voltage match modulation method according to claim 2, wherein the output x of the PI controller is:
x=k.sub.p(v.sub.ref−v.sub.out)+k.sub.i∫(v.sub.ref−v.sub.out)dt wherein 0.1≤k.sub.p≤10, 0.001≤k.sub.i≤1, v.sub.ref represents a reference voltage; and the output x of the PI controller ranges from −0.5 to 1.

5. The voltage match modulation method according to claim 2, wherein the number of the control variable is six: D.sub.p0, D.sub.p2, D.sub.p3, D.sub.p4, D.sub.s0, and D.sub.ss; wherein D.sub.p0 controls a zero level of the primary-side hybrid five-level unit; D.sub.p2 controls a ½ level of the primary-side hybrid five-level unit; D.sub.p3 controls a ¾ level of the primary-side hybrid five-level unit; D.sub.p4 controls a ±v.sub.in level of the primary-side hybrid five-level unit; D.sub.s0controls a zero level of the secondary-side single-phase full bridge H.sub.2; and D.sub.ss controls a phase shift between the primary-side hybrid five-level unit and the secondary-side single-phase full bridge H.sub.2.

6. The voltage match modulation method according to claim 5, wherein the step of calculating the control variable comprises: classifying, based on a value of the voltage transmission ratio F, the converter into five operation conditions to calculate six control variables: in the first operation condition, 0<F<¼, specifically, 4×Nv.sub.out<v.sub.in, calculation of each control variable being as follows:
D.sub.ss=x
D.sub.s0=0
D.sub.p4=0
D.sub.p3=0
D.sub.p2=0
D.sub.p0=1−4F in the second operation condition, ¼<F<½, specifically, v.sub.in<4×Nv.sub.out<2v.sub.in, calculation of each control variable is as follows:
D.sub.ss=x
D.sub.s0=0
D.sub.p4=0
D.sub.p3=0
D.sub.p2=4F−1
D.sub.p0=0 in the third operation condition, ½<F<¾, specifically, 2v.sub.in<4×Nv.sub.out<3v.sub.in, calculation of each control variable is as follows:
D.sub.ss=x
D.sub.s0=0
D.sub.p4=0
D.sub.p3=4F−2
D.sub.p2=3−4F
D.sub.p0=0 in the fourth operation condition, ¾<F<1, specifically, 3v.sub.in<4×Nv.sub.out<4v.sub.in, calculation of each control variable is as follows: and
D.sub.ss=x
D.sub.s0=0
D.sub.p4=4F−3
D.sub.p3=4(1−F)
D.sub.p2=0
D.sub.p0=0 in the fifth operation condition, 1<F, specifically, v.sub.in<Nv.sub.out, calculation of each control variable is as follows: $D_{ss} = x$ $D_{s 0} = 1 - \frac{1}{F}$ $D_{p 4} = 0$ $D_{p 3} = 0$ $D_{p 2} = 0$ $D_{p 0} = 0$ based on the aforementioned modulation method, following equation is satisfied:
∫.sub.0.sup.t.sup.5v.sub.p(t)dt=∫.sub.0.sup.t.sup.5Nv.sub.s(t)dt wherein v.sub.p represents an AC port voltage of the primary-side five-level unit, and v.sub.s represents an AC port voltage of the secondary-side single-phase full bridge H.sub.2.

7. The voltage match modulation method according to claim 6, wherein the modulation unit is set based on: a duty ratio D.sub.p0 of the zero level of the primary-side five-level unit; a duty ratio D.sub.p2 of the ½ level of the primary-side five-level unit; a duty ratio D.sub.p3 of the ¾ level of the primary-side five-level unit; a duty ratio D.sub.p4 of the ±v.sub.in level of the primary-side five-level unit; a duty ratio D.sub.s0 of the zero level of the secondary-side single-phase full bridge H.sub.2; and the phase shift D.sub.ss between the primary-side five-level unit and the secondary-side single-phase full bridge H.sub.2; wherein a drive signal pulse is inputted in chronological order, and the fully-controlled switch device of the primary-side hybrid five-level unit and the fully-controlled switch device of the primary-side two-level half bridge H.sub.2 are controlled to complete a modulation process.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

(1) FIG. 1 is a schematic block diagram of a hybrid five-level bidirectional DC/DC converter according to an embodiment of the present disclosure;

(2) FIG. 2 is a schematic block diagram of a controller of the hybrid five-level bidirectional DC/DC converter according to an embodiment of the present disclosure;

(3) FIG. 3 is a circuit topological structure diagram in an application example of the hybrid five-level bidirectional DC/DC converter according to an embodiment of the present disclosure;

(4) FIG. 4 is a diagram showing an implementation manner of a switch signal corresponding to the controller of the hybrid five-level bidirectional DC/DC converter according to an embodiment of the present disclosure;

(5) FIG. 5 is a typical waveform diagram of AC voltage and current of a primary side and a secondary side of the hybrid five-level bidirectional DC/DC converter according to an embodiment of the present disclosure;

(6) FIG. 6 is a schematic diagram showing voltage match control according to an embodiment of the present disclosure; and

(7) FIG. 7-FIG. 16 are schematic diagrams showing modal operations of each switch of the hybrid five-level bidirectional DC/DC converter according to an embodiment of the present disclosure.

DETAILED DESCRIPTION OF THE EMBODIMENTS

(8) Technical solutions in the embodiments of the present disclosure will be described clearly and completely below with reference to the accompanying drawings in the embodiments of the present disclosure. Apparently, the described embodiments are some but not all of the embodiments of the present disclosure. All other embodiments obtained by those of ordinary skills in the art based on the embodiments of the present disclosure without creative efforts shall fall within the protection scope of the present disclosure.

(9) As shown in FIG. 1, a hybrid five-level bidirectional DC/DC converter provided by an embodiment of the present disclosure includes a first input filter capacitor C.sub.inp and a second input filter capacitor C.sub.inn, an output filter capacitor C.sub.o, a DC voltage source, a primary-side hybrid five-level unit, a primary-side two-level half bridge, a secondary-side single-phase full bridge H.sub.2, a high-frequency isolation transformer M.sub.1, a high-frequency inductor L.sub.s, and a controller. A positive pole of a DC bus of the primary-side hybrid five-level unit is coupled to a positive pole of the corresponding DC voltage source and to a positive pole of the input filter capacitor C.sub.inp respectively. A negative pole of the DC bus of the primary-side hybrid five-level unit is coupled to a negative pole of the corresponding DC voltage source and to a negative pole of the input filter capacitor C.sub.inn respectively. A terminal of the primary-side hybrid five-level unit is coupled to a midpoint between the first input filter capacitor C.sub.inp and the second input filter capacitor C.sub.inn connected in series. The primary-side hybrid five-level unit is coupled to a primary side of the high-frequency isolation transformer M.sub.1 through the high-frequency inductor L.sub.s, and a midpoint of the primary-side two-level half bridge is coupled to another terminal of the primary side of the high-frequency transformer. A positive pole of a DC bus of the secondary-side single-phase full bridge H.sub.2 is coupled to a positive pole of a corresponding DC load and to a positive pole of the output filter capacitor C.sub.o respectively. A negative pole of the DC bus of the secondary-side single-phase full bridge H.sub.2 is coupled to a negative pole of the corresponding DC load and to a negative pole of the output filter capacitor C.sub.o respectively, and an AC side of the secondary-side single-phase full bridge H.sub.2 is coupled to a secondary side of the high-frequency isolation transformer. An input terminal of a control signal of the primary-side hybrid five-level unit, an input terminal of a control signal of the primary-side two-level half bridge, and an input terminal of a control signal of the secondary-side single-phase full bridge are respectively coupled to an output terminal of a switch signal corresponding to the controller.

(10) Further, referring to FIG. 2, the controller includes a sampling unit, a PI controller, and a modulation unit. The sampling unit includes two signal input terminals, and the two signal input terminals respectively measure the input voltage v.sub.in and the output voltage v.sub.out. The PI controller uses an error obtained by comparing the output voltage v.sub.out and a reference voltage v.sub.ref thereof as an input, and uses an output x obtained after being processed by the PI controller as a modulation signal. The modulation unit uses the input voltage v.sub.in, the output voltage v.sub.out, the reference voltage v.sub.ref and the output x as input signals, and obtains a voltage transmission ratio F and a drive signal of each switch based on the input voltage v.sub.in, the output voltage v.sub.out, and the transformation ratio N of the high-frequency isolation transformer.

(11) In a specific application example, referring to FIG. 3, fully-controlled switch devices T.sub.1˜T.sub.4 and S.sub.1˜S.sub.4 and an autotransformer M.sub.2 constitute a primary-side hybrid five-level unit, and fully-controlled switch devices S.sub.5 and S.sub.6 constitute a two-level half bridge. The secondary-side single-phase full bridge H.sub.2 includes fully-controlled switch devices Q.sub.1˜Q.sub.4. A positive pole of a DC bus of the primary-side hybrid five-level unit is coupled to a positive pole of the corresponding DC voltage source and to a positive pole of the input filter capacitor C.sub.inp respectively, and a negative pole of the DC bus of the primary-side hybrid five-level unit is coupled to a negative pole of the corresponding DC voltage source and to a negative pole of the input filter capacitor C.sub.inn respectively. A terminal of the fully-controlled switch devices T.sub.1˜T.sub.4 is coupled to a midpoint between the first input filter capacitor C.sub.inp and the second input filter capacitor C.sub.inn connected in series, and another terminal of the fully-controlled switch devices T.sub.1˜T.sub.4 is coupled to two terminals of the autotransformer M.sub.2. A center tap of the autotransformer M.sub.2 is coupled to a primary side of the high-frequency isolation transformer through the high-frequency inductor L.sub.s. A midpoint of the two-level half bridge constituted by the fully-controlled switch devices S.sub.5 and S.sub.6 is coupled to another terminal of the primary side of the high-frequency isolation transformer. A positive pole of a DC bus of the secondary-side single-phase full bridge H.sub.2 is coupled to a positive pole of a corresponding DC load and to a positive pole of the output filter capacitor C.sub.o respectively, a negative pole of the DC bus of the secondary-side single-phase full bridge H.sub.2 is coupled to a negative pole of the corresponding DC load and to a negative pole of the output filter capacitor C.sub.o respectively, and an AC side of the secondary-side single-phase full bridge H.sub.2 is coupled to a secondary side of the high-frequency isolation transformer. An input terminal of a control signal of the fully-controlled switch devices S.sub.1˜S.sub.6 and T.sub.1˜T.sub.4 and an input terminal of a control signal of the fully-controlled switch devices Q.sub.1˜Q.sub.4 are respectively coupled to an output terminal of a switch signal corresponding to the controller. FIG. 4 and FIG. 5 respectively show an implementation manner of a switch signal corresponding to the controller of the hybrid five-level bidirectional DC/DC converter and a waveform diagram of AC voltage and current of a primary side and a secondary side of the hybrid five-level bidirectional DC/DC converter in this embodiment. As can be seen from FIG. 5, an AC port voltage v.sub.p of the primary-side hybrid five-level unit can produce nine levels:

(12) $\pm v_{in}, \pm \frac{v_{in}}{4}, \pm \frac{v_{in}}{2}, \pm \frac{3 v_{in}}{4},$
and 0; and an AC port voltage v.sub.s of the secondary-side single-phase full bridge H.sub.2 produces three levels: ±v.sub.out and 0. A duty ratio of the zero level of the primary-side five-level unit is D.sub.p0; a duty ratio of the ½ level of the primary-side five-level unit is D.sub.p2; a duty ratio of the ¾ level of the primary-side five-level unit is D.sub.p3; a duty ratio of the ±v.sub.in level of the primary-side five-level unit is D.sub.p4; a duty ratio of the zero level of the secondary-side single-phase full bridge H.sub.2 is D.sub.s0; and a relative phase shift between the primary-side five-level unit and the secondary-side single-phase full bridge H.sub.2 is D.sub.ss.

(13) According to another embodiment of the present disclosure, a voltage match modulation method for the above hybrid five-level bidirectional DC/DC converter includes following steps:

(14) setting a PI controller parameter of a controller, specifically, setting a proportionality coefficient k.sub.p and an integration coefficient k.sub.i for the controller, and calculating an output x of the PI controller to serve as a modulation signal;

(15) outputting the voltage transmission ratio F and the output x of the PI controller respectively to a modulation unit of the controller to calculate a control variable; and

(16) driving, based on the control variable, a fully-controlled switch device of the primary-side hybrid five-level unit, a fully-controlled switch device of the primary-side two-level half bridge, and a fully-controlled switch device of the secondary-side single-phase full bridge to control actions of the fully-controlled switch devices to implement optimized operation.

(17) In a further preferred embodiment, the voltage transmission ratio F is:

(18) $F = \frac{{Nv}_{out}}{v_{in}}$

(19) wherein the transformation ratio N of the high-frequency isolation transformer serves as an initial value presetting.

(20) In a further preferred embodiment, the output x of the PI controller is:
x=k.sub.p(v.sub.ref−v.sub.out)+k.sub.i∫(v.sub.ref−v.sub.out)dt

(21) wherein 0.1≤k.sub.p≤10, 0.001≤k.sub.i≤1, v.sub.ref represents a reference voltage; and the output x of the PI controller ranges from −0.5 to 1.

(22) Specifically, an optimized control strategy provided by this example includes:

(23) calculating the control variable; and classifying, based on a value of the voltage transmission ratio F, the hybrid five-level bidirectional DC/DC converter of the embodiments of the present disclosure into five operation conditions to calculate six control variables to satisfy the following conditions:

(24) in the first operation condition, 0<F<¼, specifically, 4×Nv.sub.out<v.sub.in, calculation of each control variable is as follows:
D.sub.ss=x
D.sub.s0=0
D.sub.p4=0
D.sub.p3=0
D.sub.p2=0
D.sub.p0=1−4F

(25) in the second operation condition, ¼<F<½, specifically, v.sub.in<4×Nv.sub.out<2v.sub.in, calculation of each control variable is as follows:
D.sub.ss=x
D.sub.s0=0
D.sub.p4=0
D.sub.p3=0
D.sub.p2=4F−1
D.sub.p0=0

(26) in the third operation condition, ½<F<¾, specifically, 2v.sub.in<4×Nv.sub.out<3v.sub.in, calculation of each control variable is as follows:
D.sub.ss=x
D.sub.s0=0
D.sub.p4=0
D.sub.p3=4F−2
D.sub.p2=3−4F
D.sub.p0=0

(27) in the fourth operation condition, ¾<F<1, specifically, 3v.sub.in<4×Nv.sub.out<4v.sub.in, calculation of each control variable is as follows: and
D.sub.ss=x
D.sub.s0=0
D.sub.p4=4F−3
D.sub.p3=4(1−F)
D.sub.p2=0
D.sub.p0=0

(28) in the fifth operation condition, 1<F, specifically, v.sub.in<Nv.sub.out, calculation of each control variable is as follows:

(29) $D_{ss} = x$ $D_{s 0} = 1 - \frac{1}{F}$ $D_{p 4} = 0$ $D_{p 3} = 0$ $D_{p 2} = 0$ $D_{p 0} = 0$

(30) Through the above modulation method, the following condition may be satisfied to approximately match an input/output voltage: allowing areas of two shaded portions in FIG. 6 to be equal, S.sub.A1=S.sub.A2, that is, ∫.sub.0.sup.t.sup.5v.sub.p(t)dt=∫.sub.0.sup.t.sup.5Nv.sub.s(t)dt, wherein v.sub.p represents an AC port voltage of the primary-side five-level unit, and v.sub.s represents an AC port voltage of the secondary-side single-phase full bridge H.sub.2.

(31) The modulation unit is set based on: a duty ratio D.sub.p0 of the zero level of the primary-side five-level unit; a duty ratio D.sub.p2 of the ½ level of the primary-side five-level unit; a duty ratio D.sub.p3 of the ¾ level of the primary-side five-level unit; a duty ratio D.sub.p4 of the ±v.sub.in level of the primary-side five-level unit; a duty ratio D.sub.s0 of the zero level of the secondary-side single-phase full bridge H.sub.2; and a relative phase shift D.sub.ss between the primary-side five-level unit and the secondary-side single-phase full bridge H.sub.2. A drive signal pulse is inputted in chronological order, and the fully-controlled switch device of the hybrid five-level unit and the fully-controlled switch device of the primary-side two-level half bridge H.sub.2 are controlled to complete a modulation process.

(32) A hybrid five-level dual active bridge topology generally adopts PWM+phase shift control, which may be divided into 10 switching modes. Because the working waveform of the converter is half-cycle symmetrical, working conditions of each switching mode are as follows, and the waveform diagram is as shown in FIG. 5.

(33) Switching mode 1 [t.sub.0, t.sub.1], as shown in FIG. 7, in the t.sub.0−t.sub.1 stage, switch transistors S.sub.1, S.sub.3 and S.sub.6 are enabled, secondary-side devices Q.sub.1 and Q.sub.4 are enabled, v.sub.p=v.sub.in, v.sub.s=Nv.sub.out, the inductive current rises linearly, and a rate of rise of the current is the largest.

(34) Switching mode 2 [t.sub.1, t.sub.2], as shown in FIG. 8, at the moment of t.sub.1, the switch transistor S.sub.1 is disabled, the fully-controlled switch devices T.sub.1 and T.sub.2 are enabled, the secondary-side devices Q.sub.1 and Q.sub.4 are enabled, and during this period of time, the voltage across the transformer is: v.sub.p=¾v.sub.in, v.sub.s=Nv.sub.out, the inductive current continues to increase, and the rate of rise of the current decreases.

(35) Switching mode 3 [t.sub.2, t.sub.3], as shown in FIG. 9, at the moment of t.sub.2, the switch transistor S.sub.3 is disabled, the fully-controlled switch devices T.sub.3 and T.sub.4 are enabled, the secondary-side devices Q.sub.1 and Q.sub.4 are enabled, and during this period of time, the voltage across the transformer is: v.sub.p=½v.sub.in, v.sub.s=Nv.sub.out, the rate of change of the inductive current is determined by ½v.sub.in−Nv.sub.out.

(36) Switching mode 4 [t.sub.3, t.sub.4], as shown in FIG. 10, at the moment of t.sub.3, the fully-controlled switch devices T.sub.3 and T.sub.4 are disabled, the switch transistor S.sub.4 is enabled, the secondary-side devices Q.sub.1 and Q.sub.4 are enabled, and during this period of time, the voltage across the transformer is: v.sub.p=¼v.sub.in, v.sub.s=Nv.sub.out, and the inductive current decreases linearly.

(37) Switching mode 5 [t.sub.4, t.sub.5], as shown in FIG. 11, at the moment of t.sub.4, the fully-controlled switch devices T.sub.1 and T.sub.2 are disabled, the switch transistor S.sub.2 is enabled, the secondary-side devices Q.sub.1 and Q.sub.4 are enabled, and during this period of time, the voltage across the transformer is: v.sub.p=0, v.sub.s=Nv.sub.out, and the inductive current decreases linearly.

(38) Switching mode 6 [t.sub.5, t.sub.6], as shown in FIG. 12, in the t.sub.5-t.sub.6 stage, switch transistors S.sub.2, S.sub.4 and S.sub.5 are enabled, secondary-side devices Q.sub.2 and Q.sub.3 are enabled, v.sub.p=−v.sub.in, v.sub.s=−NV.sub.out, an absolute value of the inductive current rises linearly, and the rate of rise of the current is the largest.

(39) Switching mode 7 [t.sub.6, t.sub.7], as shown in FIG. 13, at the moment of t.sub.6, the switch transistor S.sub.4 is disabled, the fully-controlled switch devices T.sub.3 and T.sub.4 are enabled, the secondary-side devices Q.sub.2 and Q.sub.3 are enabled, and during this period of time, the voltage across the transformer is: v.sub.p=−¾v.sub.in, v.sub.s=−Nv.sub.out, the absolute value of the inductive current continues to increase, and the rate of rise of the current decreases.

(40) Switching mode 8 [t.sub.7, t.sub.5], as shown in FIG. 14, at the moment of t.sub.7, the switch transistor S.sub.2 is disabled, the fully-controlled switch devices T.sub.1 and T.sub.2 are enabled, the secondary-side devices Q.sub.2 and Q.sub.3 are enabled, and during this period of time, the voltage across the transformer is: v.sub.p=−½v.sub.in, v.sub.s=−Nv.sub.out, and the rate of change of the inductive current is determined by −½v.sub.in+Nv.sub.out.

(41) Switching mode 9 [t.sub.5, t.sub.9], as shown in FIG. 15, at the moment of t.sub.5, the fully-controlled switch devices T.sub.1 and T.sub.2 are disabled, the switch transistor S.sub.1 is enabled, the secondary-side devices Q.sub.2 and Q.sub.3 are enabled, and during this period of time, the voltage across the transformer is: v.sub.p=−¼v.sub.in, v.sub.s=−Nv.sub.out, and the absolute value of the inductive current decreases linearly.

(42) Switching mode 10 [t.sub.9, t.sub.10], as shown in FIG. 16, at the moment of t.sub.9, the fully-controlled switch devices T.sub.3 and T.sub.4 are disabled, the switch transistor S.sub.3 is enabled, the secondary-side devices Q.sub.2 and Q.sub.3 are enabled, and during this period of time, the voltage across the transformer is: v.sub.p=0, v.sub.s=−Nv.sub.out, and the absolute value of the inductive current decreases linearly.

(43) According to the hybrid five-level bidirectional DC/DC converter and the voltage match modulation method thereof provided by the present disclosure, six-degree-of-freedom global optimization control is implemented based on six control variables as follows: a duty ratio of the zero level of the primary side of the hybrid five-level bidirectional DC/DC converter; a duty ratio of a high level of the primary side, a duty ratio of the ½ level of the primary side, a duty ratio of the ¾ level of the primary side, a duty ratio of the zero level of the secondary side, and a relative phase shift between the primary side and the secondary side. By coordinating the six control variables of the converter, the RMS value of the current is reduced, and the operation efficiency of the converter is improved. Furthermore, a voltage range of an input/output side may be increased, a conduction loss may be reduced, and an energy conversion efficiency within an ultra-wide voltage range may be improved.

(44) In a specific application example, each parameter may be preferably selected as follows: the voltage transmission ratio F=0.5, the input voltage v.sub.in=400V, the output voltage v.sub.out=200V, a switching frequency f.sub.s=200 kHz, an AC inductance L.sub.s=20 μH, the transformer transformation ratio N=1, the output filter capacitor C.sub.o=100 μF, and the input filter capacitors C.sub.inp=40 μF and C.sub.inn=40 μF.

(45) It is to be appreciated that the exemplary embodiments set forth herein are illustrative rather than restrictive. Although one or more embodiments of the present disclosure are described with reference to the accompanying drawings, those of ordinary skill in the art should understand that various changes in form and details may be made without departing from the spirit and scope of the present disclosure as defined by the appended claims.

Hybrid five-level bidirectional DC/DC converter and voltage match modulation method thereof

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Cpc classification

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H02M3/33573

ELECTRICITY

Classification Explorer

H02M1/0064

ELECTRICITY

Classification Explorer

H02M7/487

ELECTRICITY

Classification Explorer

H02M7/5388

ELECTRICITY

Classification Explorer

H02M1/00

ELECTRICITY

Classification Explorer

H02M1/0095

ELECTRICITY

Classification Explorer

H02M1/0048

ELECTRICITY

Classification Explorer

H02M3/33584

ELECTRICITY

Classification Explorer

Y02B70/10

GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS

Classification Explorer

H02M3/285

ELECTRICITY

International classification

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H02M3/335

ELECTRICITY

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H02M1/00

ELECTRICITY

Abstract

Claims

Description