METHOD FOR PRODUCING AN ELECTRICALLY CONDUCTIVE CONNECTION ON A SUBSTRATE, MICROELECTRONIC DEVICE AND METHOD FOR THE PRODUCTION THEREOF

Abstract

The invention relates to a method (110) for producing an electrically conductive connection (112, 112′) on a substrate (114), comprising the following steps: a) providing a substrate (114), wherein the substrate (114) is configured for receiving an electrically conductive connection (112, 112′); b) providing a reservoir of an electrically conductive liquid alloy, wherein the reservoir has a surface at which the alloy has an insulating layer; c) providing a capillary (120) configured for taking up the electrically conductive liquid alloy; d) penetrating of a tip (122) of the capillary (120) under the surface of the reservoir and taking up of a portion of the alloy from the reservoir; and e) applying the portion of the alloy at least partly to the substrate (114) in such a manner that an electrically conductive connection (112, 112′) is formed from the alloy on the substrate (114), wherein the alloy remains on the substrate (114) by adhesion.

The invention furthermore relates to a method for producing a microelectronic device (124) and to a microelectronic device (124), in particular a transistor (130).

Claims

1. A method for producing an electrically conductive connection on a substrate, comprising the following steps: a) providing a substrate wherein the substrate is configured for receiving an electrically conductive connection; b) providing a reservoir of an electrically conductive liquid alloy, wherein the reservoir has a surface at which the alloy has an insulating layer; c) providing a capillary configured for taking up the electrically conductive liquid alloy; d) penetrating of a tip the capillary under the surface of the reservoir and taking up of a portion of the alloy from the reservoir; and e) applying the portion of the alloy at least partly to the substrate in in such a manner that an electrically conductive connection is formed from the alloy on the substrate, wherein the alloy remains on the substrate by adhesion.

2. The method of claim 1, wherein the alloy provided in accordance with step c) comprises gallium and at least one further chemical element, selected from indium (In), tin (Sn), sodium (Na), potassium (K), gold (Au), magnesium (Mg), lead (Pb), nickel (Ni) and mercury (Hg).

3. The method of claim 1, wherein the capillary has a body having an inside, wherein the inside has a metallic surface.

4. The method of claim 3, wherein the body of the capillary comprises a nonmetallic material, wherein the body of the capillary is covered with a metallic layer.

5. The method of claim 4, wherein gold is used for the metallic layer.

6. The method of claim 4, wherein a layer thickness of 5 nm to 50 nm is adjusted for the metallic layer.

7. The method of claim 4, wherein the metallic layer is applied to the inside of the body of the capillary using radio-frequency sputtering, a thermal method or a chemical coating method.

8. The method of claim 1, wherein the capillary assumes an external diameter of 0.1 mm to 2 mm and an internal diameter of 100 nm to 1.5 mm, wherein the external diameter exceeds the internal diameter.

9. The method or claim 1, wherein the tip of the capillary comprises a taper of an end of the capillary, wherein an external diameter is reduced by up to at least 25% in the region of the tip.

10. The method of claim 1, wherein the applying of the portion of the alloy at least partly to the substrate is effected in such a manner that the capillary forms an angle with respect to the surface of the substrate of at most 45°.

11. The method of claim 1, wherein the applying of the portion of the alloy to the substrate in accordance with step e) is effected using a scanning probe lithography, wherein the capillary is used as a probe for the scanning probe lithography.

12. A method for producing a microelectronic device, comprising steps a) to e) of the method wherein the substrate provided in accordance with step a) comprises at least two microelectronic components and applying the portion of the alloy to the substrate in accordance with step e) is effected in such a manner that an electrically conductive connection is formed between at least two of the microelectronic components on the substrate.

13. A microelectronic device, comprising a substrate; at least two microelectronic components; and at least one electrically conductive connection between the at least two microelectronic components, wherein the electrically conductive connection is an alloy comprising gallium and at least one further chemical element selected from indium (In), tin (Sn), sodium (Na), potassium (K), gold (Au), magnesium (Mg), lead (Pb), nickel (Ni) and mercury (Hg), and wherein the electrically conductive connection has a width of at most 100 μm.

14. The microelectronic device of claim 13, wherein the at least two microelectronic components are selected from an electrically conductive electrode, a solid electrolyte, a semiconducting component and an insulating region.

15. The microelectronic device of claim 13, wherein the microelectronic device comprises a transistor, a memory cell or a logic gate.

Description

BRIEF DESCRIPTION OF THE FIGURES

[0061] Further details and features of the present invention are evident from the following description of preferred exemplary embodiments, particularly in conjunction with the dependent claims. In this case, the respective features can be realized by themselves or as a plurality in combination with one another. However, the invention is not restricted to the exemplary embodiments. The exemplary embodiments are illustrated schematically in the following figures. In this case, identical reference numerals in the figures designate identical or functionally identical elements or elements that correspond to one another with regard to their functions.

[0062] Specifically in the figures:

[0063] FIG. 1 shows a schematic illustration of one preferred embodiment of the method according to the invention for producing an electrically conductive connection on a substrate;

[0064] FIG. 2 shows an illustration of a novel transistor produced by the method according to the invention for producing an electrically conductive connection on a substrate; and

[0065] FIGS. 3a and 3b show an illustration of measurement diagrams of a transistor according to FIG. 2.

DESCRIPTION OF THE EXEMPLARY EMBODIMENTS

[0066] FIG. 1 shows a schematic illustration of one preferred embodiment of step e) of the method 110 according to the invention for producing an electrically conductive connection 112, 112′ on a substrate 114. While the electrically conductive connection 112 has already been completed, FIG. 1 shows the production of the electrically conductive connection 112′ on the substrate 114. The substrate 114 illustrated schematically in FIG. 1, which substrate was provided in accordance with step a), has a planar support 116, on which four microelectronic components 118, 118′, 118″, 118″ are applied, which are spatially separated from one another. However, other types of substrates 114 are likewise possible.

[0067] Herein, FIG. 1 shows how, in accordance with step e), by using a capillary 120 having a tip 122, a portion of an alloy is applied to the substrate 114 in such a manner that the electrically conductive connection 112′ forms from the alloy on the substrate 114 by manner of the alloy remaining on the substrate 114 by adhesion. As illustrated in FIG. 1, applying the portion of the alloy to the substrate 114 in accordance with step e) of the present method 110 is effected in such a manner that the desired electrically conductive connection 112′ is formed between the two of the microelectronic components 118, 118′″ that are spatially separated from one another on the substrate 114. By contrast, the already completed electrically conductive connection 112, connects the two of the microelectronic components 118, 118′″ that are spatially separated from one another on the substrate 114. It is possible to apply further electrically conductive connections on the substrate 114.

[0068] The capillary 120 illustrated in the figure, which was provided in accordance with step c) of the present method 110, is an internally hollow small tube composed of quartz glass which has an external diameter of 1 mm and a cavity having an internal diameter of 0.5 mm, and which was obtained by drawing from a glass capillary. After that, the capillary 120 was covered with a metallic layer (not illustrated) of sputtered gold (Au), wherein the layer has a layer thickness of 10 nm to 20 nm. However, other types of capillaries or metallic coatings of the capillary 120 are possible. In this respect, reference is made to the above description, in particular.

[0069] In accordance with step b) of the present method 110, a reservoir of an electrically conductive liquid alloy was previously provided, wherein the reservoir has a surface at which the alloy has an insulating layer. In order to produce the electrically conductive connection 112, 112′ illustrated schematically in FIG. 1 on the substrate 114, use was made of an electrically conductive liquid alloy composed of Galinstan®, which denotes a eutectic alloy comprising gallium in a concentration of 65 to 95% by weight, indium in a concentration of 5 to 22% by weight and optionally tin in a concentration of 0 to 11% by weight. A melting point of −20° C. to below +20° C. is typical for such alloys, such that they are liquid at room temperature, i.e. at a temperature of 20° C. to 25° C., in particular at 20° C. or 25° C. Other types of electrically conductive alloys are likewise usable, however, as long as they are in a liquid state of matter at room temperature. In this respect, reference is likewise made to the above description.

[0070] Step d) of the present method 110 involved penetration of the tip 122 of the capillary 120 under a surface of the reservoir, said surface having an insulating layer, in particular an oxide layer, and subsequent taking up of a portion of the alloy from the reservoir into the cavity of the capillary 120. The tip 122 of the capillary 120 ensures, firstly, that the insulating layer on the surface of the reservoir cannot be pierced particularly easily and, secondly, that the liquid alloy can be applied from the cavity of the capillary 120 onto a spatially more restricted region of the surface of the substrate 114. As was able to be established in corresponding experiments, in particular the capillary 120 having on its inside the metallic layer of the sputtered gold exhibits a high wettability that ensures a sufficient and uniform material flow when the liquid alloy is dispensed onto the surface of the substrate 114. However, a use of other metallic materials that bring about a high wettability is likewise possible.

[0071] After the portion of the alloy had been taken up from the reservoir into the cavity of the capillary 120, as illustrated in FIG. 1, in accordance with step e), the portion of the alloy present in the cavity of the capillary 120 is applied to the substrate 114 wholly or partly by using the capillary 120 through the tip 122 such that firstly the electrically conductive connection 112 and then the further electrically conductive connection 112′ were produced on the substrate 114, the alloy in each case remaining on the substrate 114 by adhesion. As a result of contact with the surroundings, an insulating layer, in particular an oxide layer, forms in each case on the surface of the electrically conductive connections 112, 112′ facing the surroundings, said layers advantageously being suitable in particular for passivating and insulating the surfaces of the electrically conductive connections 112, 112′, such that parasitic capacitances in the electrically conductive connections 112, 112′ can be distinctly reduced.

[0072] The microelectronic device 124 illustrated schematically in FIG. 2 can also be produced in this manner, said microelectronic device comprising a plurality of microelectronic components 126 fitted on the planar support 128, wherein the microelectronic components 126 and the planar support 128 here together form the substrate 114. The microelectronic device 124 shown here is a transistor 130, in particular a field effect transistor (FET), which has a source electrode 132, a drain electrode 134, a gate electrode 136, a solid electrolyte 138, a semiconducting layer 140 and an insulating region 142. In this exemplary embodiment, the electrodes 132, 134, 136 comprise a highly conductive transparent metal oxide, in particular indium tin oxide (ITO). However, other electrode materials, including aluminum-doped zinc oxide (AZO), fluorine-doped tin oxide (SnO2:F; FTO), magnesium oxide (MgO), graphene or electrically highly conductive polymers can likewise be used. In the present exemplary embodiment, the semiconducting layer 140, which partly covers the solid electrolyte 138 and connects the electrolyte 140 to the gate electrode 136, comprises a dispersion of poly(3,4-ethylene dioxythiophene) and polystyrenesulfonic acid (PEDOT:PSS); however, a use of some other organic or inorganic semiconductor is likewise possible.

[0073] The insulating region 142 illustrated in FIG. 2 is made of indium oxide and is situated between the two electrically conductive connections 112, 112′ produced in accordance with the present method 110, wherein the electrically conductive connection 112 is arranged between the source electrode 132 and the semiconducting layer 140, while the further electrically conductive connection 112′ is embodied between the drain electrode 134 and the semiconducting layer 140. As a result of an electrical voltage being applied to the gate electrode 136, a transistor channel of the transistor 130 forms, which transistor channel in this exemplary embodiment has a length corresponding to the distance between the source electrode 132 and the drain electrode 134. A width of the transistor 130 can be defined perpendicular thereto, along the electrically conductive connections and overlap thereof. The transistor 130 illustrated in FIG. 2 is an n-type accumulation-mode transistor. Upon the application of a positive electrical voltage or a negative electrical voltage, both being possible, of −800 mV to +800 mV, the threshold voltage of the transistor 130 can be reached and the transistor 130 becomes electrically conducting.

[0074] The transistor 130 illustrated schematically in FIG. 2 has distinctly improved electrical properties. In this regard, a lack of contact between the electrically conductive electrodes 132, 134, 136 and the solid electrolyte 138 is particularly advantageous. Moreover, parasitic capacitances are distinctly reduced in the transistor 130 illustrated schematically in FIG. 2, in particular on account of the insulating oxide layer of the electrically conductive connections 112, 112′ according to the invention.

[0075] FIGS. 3a and 3b show in each case measurement diagrams that were recorded with the novel transistor 130 illustrated schematically in FIG. 2. The illustrations here show in each case a current IDS in A and respectively mA between the drain electrode 134 and the source electrode 132 as a function of the voltage between the gate electrode 136 and the source electrode 132 (FIG. 3a) and respectively between the drain electrode 134 and the source electrode 132 (FIG. 3b).

[0076] FIG. 3a shows a transfer characteristic curve of a typical field effect transistor, which operates at a negative threshold voltage in this illustration. If the applied voltage between the gate electrode 136 and the source electrode 132 exceeds a value of approximately −284 mV, the transistor 130 becomes conducting and reaches currents of approximately 1 mA in the saturation region.

[0077] FIG. 3b shows the family of output characteristic curves for various electrical voltages between the gate electrode 136 and the source electrode 132 of 0 V to 1 V. The higher the gate voltage, the higher the saturation current to be attained. The exemplary embodiment illustrated here shows a saturation current of approximately 0.5 mA when an electrical voltage of 2 V is applied between the drain electrode 134 and the source electrode 132. In the linear region, i.e. at a lower electrical voltage between the drain electrode 134 and the source electrode 132, it is possible to determine a typical linearly rising current with rising electrical voltage between the drain electrode 134 and the source electrode 132, said current indicating a good ohmic contacting of the drain electrode 134 and the source electrode 132.

LIST OF REFERENCE SIGNS

[0078] 110 method for producing an electrically conductive connection on a substrate [0079] 112 electrically conductive connection [0080] 114 substrate [0081] 116 planar support [0082] 118 microelectronic component [0083] 120 capillary [0084] 122 tip [0085] 124 microelectronic device [0086] 126 microelectronic components [0087] 128 planar support [0088] 130 transistor [0089] 132 source electrode [0090] 134 drain electrode [0091] 136 gate electrode [0092] 138 solid electrolyte [0093] 140 semiconducting layer [0094] 142 insulating region