METHOD FOR MANUFACTURING EPITAXIAL WAFER, SILICON-BASED SUBSTRATE FOR EPITAXIAL GROWTH, AND EPITAXIAL WAFER

Abstract

A method for manufacturing an epitaxial wafer including the steps of: preparing a silicon-based substrate having a chamfered portion in a peripheral portion; forming an annular trench in the chamfered portion of the silicon-based substrate along an internal periphery of the chamfered portion; and performing an epitaxial growth on the silicon-based substrate having the trench formed. This provides a method for manufacturing an epitaxial wafer by which a crack generated in a peripheral chamfered portion can be suppressed from extending towards the center.

Claims

1-9. (canceled)

10. A method for manufacturing an epitaxial wafer comprising the steps of: preparing a silicon-based substrate having a chamfered portion in a peripheral portion; forming an annular trench in the chamfered portion of the silicon-based substrate along an internal periphery of the chamfered portion; and performing an epitaxial growth on the silicon-based substrate having the trench formed.

11. The method for manufacturing an epitaxial wafer according to claim 10, wherein a plurality of the trench is formed concentrically.

12. The method for manufacturing an epitaxial wafer according to claim 10, wherein the trench is formed by machining, polishing, or dry etching.

13. The method for manufacturing an epitaxial wafer according to claim 11, wherein the trench is formed by machining, polishing, or dry etching.

14. The method for manufacturing an epitaxial wafer according to claim 10, wherein in a diametrical direction of the silicon-based substrate, 10 to 100/mm of the trench are formed.

15. The method for manufacturing an epitaxial wafer according to claim 11, wherein in a diametrical direction of the silicon-based substrate, 10 to 100/mm of the trench are formed.

16. The method for manufacturing an epitaxial wafer according to claim 12, wherein in a diametrical direction of the silicon-based substrate, 10 to 100/mm of the trench are formed.

17. The method for manufacturing an epitaxial wafer according to claim 13, wherein in a diametrical direction of the silicon-based substrate, 10 to 100/mm of the trench are formed.

18. The method for manufacturing an epitaxial wafer according to claim 10, wherein the trench is formed to have a width of 4 to 30 μm in a diametrical direction of the silicon-based substrate and an arithmetic average roughness Ra of 0.1 to 10 μm.

19. The method for manufacturing an epitaxial wafer according to claim 10, wherein at least a gallium nitride (GaN) layer is grown in the step of performing the epitaxial growth.

20. A silicon-based substrate for epitaxial growth comprising: a chamfered portion formed in a peripheral portion of the silicon-based substrate; and an annular trench formed in the chamfered portion along an internal periphery of the chamfered portion.

21. The silicon-based substrate for epitaxial growth according to claim 20, wherein a plurality of the trench is formed concentrically.

22. An epitaxial wafer comprising an epitaxial layer on the silicon-based substrate for epitaxial growth according to claim 20.

23. An epitaxial wafer comprising an epitaxial layer on the silicon-based substrate for epitaxial growth according to claim 21.

Description

BRIEF DESCRIPTION OF DRAWINGS

[0043] FIG. 1 shows a conceptual diagram of a peripheral portion of a silicon-based substrate according to the present invention.

[0044] FIG. 2 shows a conceptual diagram of a peripheral portion of an epitaxial wafer according to the present invention.

[0045] FIG. 3 shows a flow chart for manufacturing an epitaxial wafer according to the present invention.

[0046] FIG. 4 shows observation photographs of a peripheral portion of an epitaxial wafer in the Example.

[0047] FIG. 5 shows observation photographs of a peripheral portion of an epitaxial wafer in the Comparative Example.

[0048] FIG. 6 shows a conceptual diagram of a peripheral portion of an epitaxial wafer according to a conventional example.

DESCRIPTION OF EMBODIMENTS

[0049] Hereinafter, the present invention will be described in detail with reference to the drawings. However, the present invention is not limited thereto.

[0050] As described above, a method for manufacturing an epitaxial wafer by which a crack generated in a peripheral chamfered portion can be suppressed from extending towards the center has been desired.

[0051] The present inventors have earnestly studied the above problems, and found out that according to a method for manufacturing an epitaxial wafer including the steps of:

[0052] preparing a silicon-based substrate having a chamfered portion in a peripheral portion;

[0053] forming an annular trench in the chamfered portion of the silicon-based substrate along an internal periphery of the chamfered portion; and

[0054] performing an epitaxial growth on the silicon-based substrate having the trench formed, there is no risk of degrading the radial distribution of film thickness, a crack generated in a peripheral chamfered portion can be suppressed from extending towards the center, and an epitaxial wafer with few cracks in the wafer surface can be manufactured, and completed the present invention.

[0055] In addition, the present inventors have earnestly studied the above problems, and found out that using a silicon-based substrate for epitaxial growth including:

[0056] a chamfered portion formed in a peripheral portion of the silicon-based substrate; and

[0057] an annular trench formed in the chamfered portion along an internal periphery of the chamfered portion, an epitaxial wafer with few cracks in the wafer surface can be manufactured when epitaxial growth is performed, and completed the present invention.

[0058] FIG. 1 shows a conceptual diagram of a silicon-based substrate according to the present invention, and is an enlarged view of a chamfered portion in a peripheral portion of a silicon-based substrate for epitaxial growth according to the present invention. In FIG. 1, (a) shows a diagram of the vicinity of the peripheral portion 7 of the silicon-based substrate 1 seen from above the surface of the substrate, and (b) shows a cross-sectional view in A-A of (a). As shown in FIG. 1, a chamfered portion 3 is formed in the peripheral portion 7 of the silicon-based substrate 1 so as to slope from an edge portion 2 towards the surface of the silicon-based substrate 1. An annular trench 8 is formed in the chamfered portion 3 (slope) along an internal periphery 4 of the chamfered portion 3.

[0059] Note that examples of the silicon-based substrate 1 include a silicon (Si) substrate and a silicon carbide (SiC) substrate. The plane orientation (orientation) of the main surface of the substrate and the size of the substrate are not particularly limited, and can be appropriately selected according to the epitaxial growth layer. When epitaxial growth of a nitride semiconductor film such as a GaN-based film is performed, a silicon wafer with a plane orientation of <111> is possible, for example.

[0060] Here, the “annular trench” includes a case where the trench is broken along the way, besides a trench that is continuous along the entire internal periphery of the chamfered portion of the substrate.

[0061] FIG. 1 shows an example where a plurality of trenches are formed, but a single annular trench is also possible. In this case, a single trench appears in the cross-section of the chamfered portion. In this event, when the trench is formed to describe a single circle continuous along the entire internal periphery of the chamfered portion of the substrate, extension of a crack in the epitaxial layer can be suppressed with more certainty when the epitaxial growth is performed. Extension of a crack can also be suppressed when the trench is broken, and in this case, the trench can be formed simply and conveniently, and is therefore advantageous from aspects of workability and cost.

[0062] Furthermore, as shown in FIG. 1, extension of a crack can also be suppressed with more certainty when a plurality of the trench 8 is formed concentrically. In this case too, the trenches 8 may be formed to describe a single continuous circle, or a plurality of broken annular trenches 8 may be formed concentrically, but the trenches are preferably formed over the entire chamfered surface.

[0063] In addition, in a diametrical direction, 10 to 100/mm of the trench 8 in the chamfered portion 3 can be formed. When the number of the trenches 8 is in such a range, extension of a crack towards the center can be stopped with more certainty.

[0064] Furthermore, the width of the trench 8 in the chamfered portion 3 can be 4 to 30 μm, and the arithmetic average roughness Ra can be 0.1 to 10 μm. When the ranges are as described, extension of a crack towards the center can be stopped with even more certainty.

[0065] When an epitaxial layer is formed on the above-described silicon-based substrate 1, an epitaxial wafer with the extension of a crack towards the center stopped is possible.

[0066] FIG. 2 shows a conceptual diagram of an epitaxial wafer according to the present invention, and is an enlarged view of a chamfered portion 3 in a peripheral portion 7 of the epitaxial wafer. Explanation will be appropriately omitted regarding parts that are the same as FIG. 1.

[0067] In FIG. 2, (a) shows a diagram of the vicinity of the peripheral portion of the epitaxial wafer 20 seen from above the surface of the wafer, and (b) shows a cross-sectional view in A-A of (a). As shown in FIG. 2, cracks 6 that are generated in the chamfered portion 3 when the epitaxial layer is formed extend towards the inner part of the epitaxial wafer 20. However, extension of the cracks 6 can be stopped at the annular trench 8 part provided in the chamfered portion 3 of the silicon-based substrate 1. In this way, an epitaxial wafer 20 with few cracks in the wafer surface is possible.

[0068] Note that after growing the epitaxial layer 5, the trenches 8 provided in the silicon-based substrate 1 become covered with the epitaxial layer 5, and therefore, the trenches 8 have been shown with dotted lines in (a) of FIG. 2.

[0069] Next, the method for manufacturing an epitaxial wafer according to the present invention will be described with reference to FIGS. 1 to 3. FIG. 3 shows a flow chart of the method for manufacturing an epitaxial wafer according to the present invention.

[0070] Firstly, as shown in FIG. 3 (a), a silicon-based substrate 1 having a chamfered portion 3 in a peripheral portion 7 is prepared.

[0071] Next, as shown in FIG. 3 (b), a trench 8 is formed in the chamfered portion 3 of the silicon-based substrate 1 along an internal periphery 4 of the chamfered portion 3. Note that the chamfered portion 3 where the trench 8 is formed is a slope on the surface side where an epitaxial growth is performed.

[0072] The method for forming the trench 8 is not particularly limited as long as a groove can be formed in the chamfered portion 3. Formation by machining and polishing with a grinding wheel or the like is inexpensive and preferable. On the other hand, when a chemical method such as dry etching is employed, the shape of the trench can be controlled with precision.

[0073] Next, as shown in FIG. 3 (c), an epitaxial growth is performed on the silicon-based substrate 1 having the trench 8 formed in the chamfered portion 3. The method for performing the epitaxial growth is not particularly limited. A chemical vapor deposition method (CVD) method such as a thermal CVD method, a plasma CVD method, a catalyst CVD method, and an MOVPE (MOCVD) method can be employed.

[0074] The composition, thickness, etc. of the epitaxial layer 5 are not particularly limited, but a nitride semiconductor is possible. The nitride semiconductor can be any one or more of AlN, AlGaN, and GaN.

[0075] The epitaxial layer 5 can be an epitaxial layer including: a buffer layer including, for example, a GaN layer, an AlN layer, or an AlGaN layer for relaxing stress due to difference in thermal expansion coefficient and difference in lattice constant; and a functional layer formed on the buffer layer. For example, it is possible to form an AlN layer, then grow a buffer layer by alternately laminating an AlGaN layer and a GaN layer, and form a GaN layer on the surface thereof, and the epitaxial layer can be grown with a thickness of about 3 to 10 μm in total.

[0076] When forming an epitaxial layer of a nitride semiconductor, the MOVPE method can be employed. For example, an epitaxial growth layer can be formed on a silicon-based substrate with the temperature set to 900 to 1350° C.

[0077] In a case where a trench 8 is not formed in the chamfered portion 3, as is conventional, cracks 6 generated in the chamfered portion 3 extend directly to the epitaxial layer 5 of the wafer surface (see FIG. 6). However, in the method for manufacturing an epitaxial wafer according to the present invention, as shown in FIG. 2, by forming a nitride semiconductor layer on the chamfered portion 3 with the trench 8 formed beforehand in order to stop the cracks 6 extending towards the center with the trench 8, a wafer with few cracks in the surface can be obtained.

EXAMPLE

[0078] Hereinafter, the present invention will be described in detail with reference to an Example. However, the present invention is not limited thereto.

Example

[0079] A silicon substrate having a chamfered portion formed in the periphery of the substrate, a diameter of 150 mm, a thickness of 1 mm, and a plane orientation of <111> was prepared. The chamfered portion of this silicon substrate was polished with a #800 grinding wheel to form, in the chamfered portion, concentric trenches with a roughness Ra of 0.350 μm and a trench width of 15 μm.

[0080] Using this silicon substrate, an AlN layer was formed, then a buffer layer was grown by alternately laminating an AlGaN layer and a GaN layer, and a GaN layer was further formed on the upper surface thereof by an MOCVD method. The total thickness of the epitaxial layer was set to 10 μm.

[0081] The peripheral portion of this epitaxial wafer was observed under a collimated light. FIG. 4 shows observation photographs of the vicinity of the peripheral portion of the epitaxial wafer according to the Example. The observation photographs are observation photographs taken in three different points. The parts that appear to be black and white stripes in FIG. 4 correspond to the parts in the chamfered portion of the substrate where the trenches were formed. As shown in FIG. 4, no large cracks extending to the wafer surface were observed in the region inwards of the chamfered portion in the observation under the collimated light. It was confirmed that extension of the cracks to the wafer surface was suppressed by the trenches formed in the chamfered portion of the silicon substrate.

[0082] In addition, in the epitaxial growth of this Example, a cover for the edge portion or the like as described in Patent Document 2 is not necessary, and therefore, there is no risk of the radial distribution of film thickness being degraded.

Comparative Example

[0083] An epitaxial growth was performed in the same manner as in the Example except that trenches were not formed in the chamfered portion of the silicon substrate and the chamfered portion remained mirror-polished (roughness Ra: 0.065 μm).

[0084] FIG. 5 shows observation photographs of the vicinity of the peripheral portion of the epitaxial wafer in the Comparative Example. As in the Example, the observation photographs are observation photographs taken in three different points. As shown in FIG. 5, there were no trenches in the chamfered portion and cracks were observed in nearly the entire circumference of the wafer in the observation under the collimated light, and it was confirmed that the cracks that were generated in the vicinity of the edge portion had extended towards the wafer surface.

[0085] As described above, according to the Example of the present invention, cracks generated in the vicinity of the edge portion were successfully suppressed from extending to the wafer surface without causing degradation of the radial film thickness distribution of the epitaxial layer.

[0086] It should be noted that the present invention is not limited to the above-described embodiments. The embodiments are just examples, and any examples that have substantially the same feature and demonstrate the same functions and effects as those in the technical concept disclosed in claims of the present invention are included in the technical scope of the present invention.