SYSTEMS AND METHODS FOR MITIGATING HARMONICS IN ELECTRICAL SYSTEMS BY USING ACTIVE AND PASSIVE FILTERING TECHNIQUES

Abstract

Systems and methods of the present disclosure involve passive, hybrid, and active filtering configurations to mitigate current harmonics for various electrical loads. One hybrid filtering configuration is medium voltage (MV) active filtering using a DC-DC converter and a multi-level inverter, and low voltage (LV) passive filtering. Another hybrid filtering configuration is MV passive filtering and LV active filtering using a two-level inverter. An active filtering configuration includes both MV and LV active filtering. The present disclosure also features power distribution unit (PDU) transformers electrically coupled to respective power supplies on the LV side of an electrical system. Each PDU transformer includes primary coils in a delta configuration and secondary coils in a wye configuration. The secondary coils are in series with respective leakage inductance coils. The secondary coils and the leakage inductance coils are integrated together into a single unit or module.

Claims

1. (canceled)

2. A system, comprising: an active filter configured to electrically couple to transformers including secondary coils in a wye configuration; an uninterruptible power supply (UPS) including: a multi-level inverter electrically coupled to the transformers; and a DC-DC converter electrically coupled to the multi-level inverter and configured to electrically couple to an energy storage device; and a controller operably coupled to the DC-DC converter and the multi-level inverter of the UPS, the controller configured to operate the DC-DC converter and the multi-level inverter of the UPS in an active filtering mode to supply a harmonic current from the UPS to compensate for a harmonic portion of a load current and in a UPS mode to supply power from the UPS if an interruption in power is detected.

3. The system of claim 2, further comprising a line reactor electrically coupled between an electrical grid and the transformers.

4. The system of claim 3, wherein the line reactor is electrically coupled between the electrical grid and a cooling system, and wherein the UPS is electrically coupled to the cooling system.

5. The system of claim 4, wherein the cooling system is selected from the group consisting of fans for drawing hot air through evaporator coils, a cooling distribution unit (CDU) having a pump, a cooling system pump, a fluid cooler having fans, a chiller having a compressor, and combinations thereof.

6. The system of claim 2, further comprising a current sensor configured to sense a load current, wherein the controller filters the load current to obtain a harmonic portion of the load current and controls the DC-DC converter and the multi-level inverter of the UPS to generate the harmonic current based on the harmonic portion of the load current.

7. The system of claim 2, wherein the transformers are electrically coupled to respective server power supplies and fan variable frequency drives.

8. The system of claim 2, further comprising an LCL filter coupled to an output of the multi-level inverter of the UPS.

9. The system of claim 2, wherein each transformer includes primary coils in a delta configuration.

10. The system of claim 2, wherein the secondary coils are electrically coupled to leakage inductance coils, respectively.

11. The system of claim 2, further comprising a line reactor electrically coupled to the transformers.

12. The system of claim 2, wherein the active filter includes an energy storage device and a two-level inverter.

13. The system of claim 12, wherein the active filter includes an LCL filter.

14. The system of claim 12, wherein the energy storage device includes an ultracapacitor, a battery, or a combination of an ultracapacitor and a battery.

15. A system, comprising: an active filter configured to electrically couple to transformers including secondary coils in a wye configuration; an uninterruptible power supply (UPS) including: a multi-level inverter electrically coupled to the transformers; and a DC-DC converter electrically coupled to the multi-level inverter and configured to electrically couple to an energy storage device; and a controller coupled to the DC-DC converter and the multi-level inverter of the UPS, the controller configured to operate the DC-DC converter and the multi-level inverter of the UPS to supply a harmonic current from the UPS to compensate for a harmonic portion of a load current and to supply power from the UPS if an interruption in power is detected.

16. The system of claim 15, wherein the active filter includes an energy storage device and a two-level inverter.

17. The system of claim 16, wherein the active filter includes an LCL filter.

18. The system of claim 16, wherein the energy storage device includes an ultracapacitor, a battery, or a combination of an ultracapacitor and a battery.

19. The system of claim 15, further comprising a line reactor electrically coupled between an electrical grid and the transformers.

20. The system of claim 19, wherein the transformers are electrically coupled to respective server power supplies and fan variable frequency drives, wherein the line reactor is electrically coupled between the electrical grid and a cooling system, and wherein the UPS is electrically coupled to the cooling system.

21. The system of claim 20, wherein the cooling system is selected from the group consisting of fans for drawing hot air through evaporator coils, a cooling distribution unit (CDU) having a pump, a cooling system pump, a fluid cooler having fans, a chiller having a compressor, and combinations thereof.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

[0022] Various embodiments of the present disclosure are described with reference to the accompanying drawings wherein:

[0023] FIG. 1 is a schematic block diagram of an existing medium voltage (MV) data center (DC) electrical system for supplying power to server and mechanical cooling loads and incorporating a line reactor located at the MV distribution;

[0024] FIG. 2 is a schematic block diagram of an existing MV DC electrical system incorporating an additional line reactor located at the LV distribution to mitigate harmonic current;

[0025] FIG. 3 is a schematic block diagram of an existing MV DC electrical system incorporating line reactors at the MV and LV distribution points and not incorporating any step-up transformers at the output of an MV uninterruptible power supply (UPS);

[0026] FIG. 4 is a circuit diagram of a conventional power distribution unit (PDU) transformer;

[0027] FIG. 5 is a circuit diagram of the power distribution unit of FIG. 4 coupled to an external line reactor;

[0028] FIG. 6 is a circuit diagram of a power distribution unit according to embodiments of the present disclosure;

[0029] FIG. 7 is a schematic block diagram of an MV DC electrical system employing a passive filtering configuration according to some embodiments of the present disclosure;

[0030] FIGS. 8-10 are schematic block diagrams of MV DC electrical systems employing hybrid active and passive filtering configurations according to other embodiments of the present disclosure;

[0031] FIG. 11 is a schematic block diagram of an MV DC electrical system employing an active filtering configuration according to yet other embodiments of the present disclosure;

[0032] FIG. 12 is a schematic block diagram of an exemplary load for a data center according to embodiments of the present disclosure;

[0033] FIG. 13 is a flow diagram of an exemplary method of performing active filtering to generate a harmonic signal to mitigate harmonic current in the electrical system; and

[0034] FIG. 14 is a circuit diagram of a DC-DC converter according to embodiments of the present disclosure;

[0035] FIG. 15 is a circuit diagram of a five-level diode-clamped inverter according to embodiments of the present disclosure; and

[0036] FIG. 16 is a circuit diagram of an active filter including a two-level inverter according to embodiments of the present disclosure.

DETAILED DESCRIPTION

[0037] FIG. 1 shows an existing MV DC electrical system for supplying power to server and mechanical cooling loads. The system includes a utility/generator power supply system and a MVUPS 130, a shunt connected Voltage Source Inverter (VSI) with battery energy storage 132 that includes a step-up transformer 136 for MV applications. The system also incorporates a line reactor L 115 located at the MV distribution point to mitigate line current harmonics at the grid. The line reactor L is coupled to an AC MV line to reduce harmonics in the power supplied by the MV utility supply 111 or generator supply 112. Line reactor L 115 is in the passive filtering mode. A step-down transformer 118 is disposed in series with the IT load 120 and the mechanical cooling loads, i.e., a cooling distribution unit (CDU) having a pump 125, a pump skid having multiple pumps 126, a fluid cooler having fans 127, and a chiller having a compressor 128. The IT server load 120 is connected to an AC-DC-DC switching power supply 122, which, in turn is connected to the PDU transformer 121. An evaporator cooling fan systems 123 are also connected to the PDU transformers 121. The CDU 125, the pump skid 126, the fluid cooler 127, and the chiller 128 are connected to the step-down transformer and are used for mechanical cooling of the IT server load 120, i.e., to remove waste heat generated by the IT server load 120.

[0038] Under normal load conditions, the entire power supplied to the DC is supplied to the load by the utility supply 111. The utility supply 111 supplies an AC voltage (ranging from about 3.3 kV to 13.8 kV) for MV application. A bypass line 117 allows for maintenance tasks or other work to be performed on the electrical system when an ON/OFF switch (not shown) of the bypass line is closed and a static transfer switch (STS) 116 is opened. The STS 116 supplies power to an IT load when it is in the ON position. The step-down transformer 118 converts the medium voltage supplied by the utility supply 111, e.g., 13.8 kV, to a low voltage, e.g., 480 V. The PDU transformers 121 are used to generate low voltage (e.g., either 208 V or 230 V) for the IT server load 120.

[0039] When an interruption or disturbance in the power supplied by the utility supply 111 is detected, the STS 116 opens and the MVUPS 130 starts supplying about 100% of the power to the load within, for example, 2 to 4 ms via the MVUPS's step-up transformer 136. The MVUPS 130 can supply power to the load for a short period, e.g., approximately two to five minutes depending on Amp-hour storage capacity of the energy storage device 132, but generally the generator starts producing power if the interruption is more than a few seconds.

[0040] The MVUPS 130 generates power from a low-voltage energy storage device, e.g., one or more lead-acid or lithium-ion batteries arranged in parallel. The low voltage of the energy storage device 132 may range, for example, from about 700 V to about 1000 V. The voltage of the energy storage device 132 is then converted to a low AC voltage, e.g., 480 V, using a two-level IGBT inverter 134. The AC voltage output from the two-level inverter 134 passes through a filter (not shown), such as an inductor-capacitor (LC) filter, to the step-up transformer 136. The step-up transformer 136, converts the low AC voltage (e.g., 480 V) to a medium AC voltage, e.g., 13.8 kV. The medium AC voltage output from the step-up transformer 136 is then provided to the step-down transformer 118, which converts the medium AC voltage, e.g., 13.8 kV, to a low AC voltage, e.g., 480 V, appropriate for the DC loads.

[0041] Once the generator 112 has reached its reference speed and is stabilized, the transfer switch 114 shifts the primary power source from the utility supply 111 to the generator 112. During this shift, the output voltage of the MVUPS 130 is synchronized to be in phase with the output voltage of the generator 112. Once the STS 116 is closed, a soft transfer from the MVUPS 130 to the generator 112 is executed until the load is entirely powered by the generator 112. The energy storage device 132 of the MVUPS 130 is then recharged by the power generated by the generator 112.

[0042] After the power interruption or disturbance ends, the load is shifted from the generator 112 to the MVUPS 130 because the utility supply 111 may be out of phase with the generator 112 and the STS 116 shifts the primary power source to the utility supply 111. The output voltage of the MVUPS 111 is then synchronized to be in phase with the output voltage of the utility supply 111. Once the output voltage of the MVUPS and the utility supply 111 are synchronized, the load is quickly transferred from the MVUPS 130 to the utility supply 111. Then, the energy storage devices 132 of the MVUPS 111 are recharged from the utility supply 111 so that the MVUPS is ready for future interruptions or disturbances in the utility supply 111.

[0043] The IT server load 124 is normally powered by the utility supply 111 as shown in FIG. 1. The IT server load 124 draws current harmonics from the utility supply 111 due to the presence of a non-linear power supply to power the IT server load 124. Passive, active, and hybrid filtering techniques are used to reduce current harmonics to adhere to the IEEE-519 and 1547 allowable harmonics standard that may be required by the grid.

[0044] FIG. 2 shows a MV DC electrical system incorporating a line reactor L.sub.M 202 located at the MV distribution to mitigate harmonic current. Line reactor L.sub.M 202 is coupled to AC MV line to reduce harmonics in the power supplied by the utility supply 111 or generator supply 112. The MV DC electrical system also incorporates additional modular line reactors L.sub.S located at the LV distribution point at the output of individual existing PDU transformers 121. The combination of line reactors L.sub.M and L.sub.S reduces a large amount of harmonic current in comparison to FIG. 1. Both line reactors L.sub.M and L.sub.S are in the passive filtering mode.

[0045] FIG. 3 shows a multi-level MVUPS electrical system without any step-up transformer and incorporating a line reactor L.sub.M 202 located at the MV distribution point. The line reactor L.sub.M 202 is coupled to AC MV line to reduce harmonics in the power supplied by the utility supply 111 or generator supply 112. SVPWM control of multi-level (ML) inverter 302 in the MVUPS 300 provides advantages of superior harmonic quality in comparison to sinusoidal PWM. The ML inverter 302 with LCL filter 310 at its output also provides additional harmonic reduction. The LCL filter 310 is used due to use of lower IGBT switching frequency (1 kHz) as it helps to attenuate, for example, 60 dB/decade, above the resonant frequency. The multi-level MVUPS 300 reduces harmonics due to use of SVPWM control and the LCL filter 310 at the output of the multi-level MVUPS 300 in comparison to the two-level MVUPS 130 with the step-up transformer 136. Also, good current ripple attenuation is achieved with small values of inductances in the LCL filter 310. The multi-level MVUPS electrical system also incorporates additional modular line reactors Ls 204 located at the LV distribution side after at the output of the existing PDU transformers 121. The combination of line reactor L.sub.M 202 and line reactors Ls 204 reduce extra harmonic current in comparison to FIG. 1 and provides passive filtering.

[0046] FIG. 4 illustrates a typical configuration of a 3-phase PDU transformer. The PDU transformer includes a primary side 410 having windings 411-413 in a delta configuration and a secondary side 420 having windings 421-423 in a wye configuration with a neutral connection 427. As shown, the primary side 410 and the secondary side 420 are electrically isolated from each other 316.

[0047] FIG. 5 shows both a PDU transformer 500 and a separate line reactor L.sub.S module 500 having line reactors 501-503 to reduce current harmonics. This configuration is expensive and occupies extra IT space or volume as it contains two discrete magnetic circuits.

[0048] FIG. 6 shows a magnetically coupled PDU transformer 600 with added values of line impedance using leakage inductance coils 601-603 in one modular frame. The leakage inductance coils 601-603 are formed by additional windings coupled to the respective windings 421-423 and incorporated into the same package as the windings 421-423.

[0049] FIG. 7 shows a multi-level MVUPS electrical system incorporating the PDU transformer 600 of FIG. 6 according to embodiments of the present disclosure. Appropriate values of line impedance may be obtained by adjusting allowable values of leakage inductances of the PDU transformers 600 to reduce line current harmonics. There are no separate line reactor components in addition to the respective PDU transformers 600. Hence, the electrical system 700 reduces both size and overall cost. As shown, the electrical system 700 uses a passive filtering configuration.

[0050] FIG. 8 shows an electrical system 800 having a line reactor L.sub.M 202 located at the MV supply line. The electrical system 800 uses a transformerless medium voltage uninterruptible power supply (MVUPS) 300 including a multi-level inverter 302 and an LCL filter. The electrical system 800 also uses LV active filtering (AF) for the IT server assembly 120 coupled to the secondary coils of the PDU transformer. Thus, the electrical system 800 incorporates hybrid filtering including both MV passive and LV active filtering.

[0051] The active filters 802 may include another energy storage device, e.g., the energy storage device 1602 of FIG. 16, such as an ultracapacitor, a battery, or a combination of the battery and the ultracapacitor, a two-level inverter, e.g., the two-level inverter 1606 of FIG. 16, and LCL filters, e.g., the LCL filters 1608 of FIG. 16, to provide harmonic current to compensate for the harmonic current drawn by the nonlinear electrical components of the IT server assembly 120 and the mechanical cooling equipment 125-128. In embodiments, the other energy storage device of the active filter 802 is coupled in parallel with the two-level inverter, and the two-level inverter is coupled in series with the LCL filters. The two-level inverter is controlled by a digital signal processor. The advantage of using an active filter is that it does not introduce a voltage drop like the passive line reactor does.

[0052] FIG. 9 shows an electrical system 900 incorporating a transformerless MV DCSTATCOM. The electrical system includes the DC-DC converter 133, the multi-level inverter 302, LCL filter 310, and a controller 935 coupled to the DC-DC converter 133 and the multi-level inverter 302 located at the medium voltage utility/grid side 910. The controller 935 generates space vector pulse width modulation (SVPWM) signals and operates the multi-level inverter 302 using the SVPWM signals. The controller 935 also operates the DC-DC converter 133 and the multi-level inverter 302 in Active Filtering and MVUPS operation modes. In embodiments, the MVUPS mode is enabled during an interruption in power. The electrical system also includes, at the load side 920, existing PDU transformers 121 and line reactors 204 coupled to the secondary side of the PDU transformers 121. Thus, the electrical system 900 incorporates hybrid filtering including MV active filtering and LV passive filtering.

[0053] The control circuits for active filtering analyze and determine the harmonic components of the current with respect to the fundamental component of the current (e.g., all or a portion of the harmonic components within the range of the second harmonic component to the thirty-fifth harmonic component) delivered to the load and inject opposite harmonic currents to mitigate the overall line harmonics current. To determine the harmonic components of the current, a current sensor 825 of the electrical systems of FIGS. 8 and 11 senses a current at a location between the active filters 802 and the IT server assemblies 120 and/or a current sensor 925 of the electrical systems of FIGS. 9-11 senses a current at a location between the PCC and the transfer switch 114, and the current is filtered by a high-pass filter to obtain the harmonic components of the current with respect to the fundamental component of the current. The active filtering can achieve minimum current harmonic distortion levels. The cost to implement active filtering is high because of the use of power electronics devices, e.g., the multi-level inverter 302, and the DSP devices, e.g., the controller 935, used to control the power electronics devices.

[0054] Thus, the electrical system may be designed to obtain a minimum or a reasonable amount of harmonic current reductions for any particular application so that the implementation costs are minimized or are at a reasonable level. For example, the cost of the AF to reduce the overall current harmonics to 15% is less than the cost of the AF to reduce the overall current harmonics to 5% as the AF to reduce the overall current harmonics to 15% needs to inject less harmonic current into the electrical system to cancel harmonic current at that level.

[0055] In the AF mode, simultaneous independent active (P) power compensation and reactive (Q) power compensation is achieved by controlling the phase angle ∂ between the voltage of the multi-level inverter 302 V.sub.INV and the voltage of the grid V.sub.GRID, and the modulation index (m) to obtain variable V.sub.INV, according to the following equations:

P=3*V.sub.GRID*V.sub.INV*sin ∂/ω*L-  (1)

Q=3*V.sub.GRID*(V.sub.INV*cos ∂−V.sub.GRID)/ω*L  (2)

where ω is the line frequency and L is the effective line reactance of the LCL filters. The active (P) power compensation portion supplies the harmonic current by operating the switching devices, e.g., IGBTs, of the multi-level inverter 302 to compensate for the harmonic component of the current from the nonlinear load. The reactive (Q) power compensation portion maintains the power factor at PCC. The phase angle ∂ is controlled to be a positive value to supply harmonic current in the case of AF mode and/or fundamental current in the case of MVUPS during an interruption in power from the MV utility supply 111. The phase angle determines harmonic current to compensate for the line harmonics introduced by the nonlinear load from the switching of the power supplies.

[0056] FIG. 10 shows another electrical system 1000 that is the same as the electrical system 900 of FIG. 9, except that each combination of the existing PDU transformer 121 and the line reactor 204 is replaced by the PDU transformer 600 of FIG. 6 on the load side 920. Thus, the electrical system 1000 incorporates hybrid filtering including MV active filtering and LV passive filtering.

[0057] FIG. 11 shows still another electrical system 1100 that is the same as the electrical system 900 of FIG. 9, except that each line reactor 204 is replaced by the active filter 802 in parallel with the existing PDU transformer 121. Thus, the electrical system 1100 incorporates active filtering including both MV active filtering and LV active filtering.

[0058] FIG. 12 shows the load side of the electrical systems of the present disclosure. The load side includes the server racks, the evaporative cooling devices, the CDUs, the pump skids, the fluid coolers, and the chillers. The server racks each include an AC-DC-DC power supply 122, rack 1202 to hold the power supply and the server, and the IT server load 124. The evaporative cooling devices each include a fan drive 1204 and a fan 123 electrically coupled to the fan drive 1204. The AC-DC-DC power supplies 122 and the fan drives 1204 are electrically coupled to the step-down transformer 118 via the PDU transformer 121.

[0059] The CDUs each include a variable frequency drive 1206 and a pump motor 1208 electrically coupled to the variable frequency drive 1206. The pump skid includes variable frequency drives 1206 and pump motors 1210 electrically coupled to respective variable frequency drives 1206. The fluid coolers include fan drives 1204 and fans 1212 electrically coupled to respective fan drives 1204. The chillers include variable frequency drives 1206 and compressors 1210 electrically coupled to respective variable frequency drives 1206. The variable frequency drives 1206 of the CDUs, the pump skid, and the chillers, and the fan drives 1204 of the fluid coolers are electrically coupled to the step-down transformer 118.

TABLE-US-00001 TABLE 1 1 MW Data Center Module Amps Equipment Quantity Harmonic Sources kW (3-Phase) Individual Capacity Comments IT server racks: 100 AC-DC-DC switching 1000 3084 Server Rack: 1000 kW; 208 V, 3-phase Power supplies for Server 10 kW (average) Power for IT (120 V, 1-phase) board, CPU, Memory, (100 × 10 = 1 MW IT server Load hard drives etc. electrical load) Evaporative 34 Non-linear EC Fan Drive 57 174 Heat absorption: 30 kW 378 kW; cooling devices: for EC fans, Switching (each includes 4 EC Fans Power for IT 208 V LL, 1-phase Power supplies for totaling 136 fans) server Control etc. (34 × 30 = 1 MW cooling cooling capacity) equipment (worst ambient condition) CDUs: 3 Non-linear VFD Drive for 22 30 Heat absorption: 335 480 V, 3-phase Pump Motor, Switching kW each (each includes Power supplies for one Pump) (3 × 335 = 1 Control etc. MW cooling capacity) Pump skid: 1 Each Pump house has 22 30 Heat absorption: 480 V, 3-phase two Pump motors; Non- 1 MW capacity linear VFD Drive for Pump Motor, Switching Power supplies for Control etc. Fluid coolers: 2 Non-linear EC Fan Drive 37 50 Heat absorption: 500 480 V, 3-phase for EC fans, Switching kW (each includes 8 EC Power supplies for Fans totaling 16 fans) Control etc. (2 × 500 = 1 MW cooling capacity) Chiller module: 2 Non-linear VFD Drive for 239 320 Heat absorption: 500 480 V, 3-phase Compressor Motor, kW (each includes one Switching Power supplies Compressor) (2 × 500 = for Control etc. 1 MW cooling capacity)

[0060] Table 1 shows exemplary specifications of a 1 MW data center module that includes 100 IT server rack modules (with the assumption that average IT capacity of each rack is 10 kW). For a 1 MW IT server load, the IT servers need a 3-phase AC supply having 3084 fundamental amperes and 208 volts. The remaining equipment, e.g., the evaporator cooling device, the CDUs, the pump skid, the fluid cooler, and the chiller are used to cool the IT server racks. The average cooling capacity of each evaporator cooling device is 30 kW. Therefore, 34 evaporator cooling devices are needed to provide 1 MW cooling capacity. The evaporator cooling devices need a 1-phase AC supply having 174 A (with respect to 3-phase) and 208 V. The average cooling capacity of each CDU is 335 kW. Therefore, 3 CDUs are needed to provide 1 MW cooling capacity. The CDUs need a 3-phase AC supply having 30 A and 480 V. The average cooling capacity of the pump skid is 1 MW. Therefore, one pump skid is needed to provide 1 MW cooling capacity. The pump skid needs 3-phase AC supply having 30 A and 480 V.

[0061] The average cooling capacity of each fluid cooler is 500 kW. Therefore, 2 fluid coolers are needed to provide 1 MW cooling capacity. The fluid coolers need a 3-phase AC supply having 50 A and 480 V. The average cooling capacity of each chiller module is 500 kW. Therefore, 2 chiller modules are needed to provide 1 MW cooling capacity. The chiller modules need 3-phase AC supply having 320 A at 480 V. Therefore, 378 kW of additional power is needed for all the mechanical cooling equipment to cool 1 MW IT load at extreme ambient conditions.

TABLE-US-00002 TABLE 2 Individual and Total Current Harmonics Passive Hybrid Existing Filter Filter: 1 Amps (FIG. 1) (FIGS. 2, 3, 6) (FIG. 8) Data Center Amps (3-Phase) harmonics Individual harmonics Individual harmonics Loads (3-Phase) at 480 V Amps THD-I % Amps THD-1% Amps IT racks 3084 1336 468 35 164 12 70 Evaporator 174 76 26 35 9 12 4 cooling devices CDUs 30 30 11 35 4 12 4 Pump Skid 30 30 10 35 4 12 4 Fluid Cooler 50 50 18 35 18 35 18 Chiller 320 320 112 35 39 12 39 Total 1842 Fundamental Amps Total 645 237 138 Harmonics (Amps) % THD-I at 35 13 Grid Comments L at MV Grid L.sub.M, effective L.sub.M, 15% AF L.sub.s and at LV and additional additional line reactors line reactors for other for other loads loads Hybrid Active Filter: 2 Filter (FIGS. 9, 10) (FIG. 11) Data Center Individual Harmonics Individual Harmonics Individual Loads THD-I % Amps THD-I % Amps THD-I % IT racks 5 70 5 40 3 Evaporator 5 4 5 2 3 cooling devices CDUs 12 2 5 2 7 Pump Skid 12 2 5 2 7 Fluid Cooler 35 8 15 10 20 Chiller 12 17 5 22 7 Total Fundamental Amps Total 102 79 Harmonics (Amps) % THD-I at 8 6 4 Grid Comments 15% AF at 20% AF at MV, effective MV, 15% AF L.sub.s and at LV and additional additional line reactors line reactors for other for other loads loads

[0062] Table 2 shows that a total of 1842 amps of 3-phase fundamental current are needed for a 1 MW DC block at 480 V. The existing electrical system of FIG. 1 with a 5% line reactor L at MV generates a total of 645 amps of harmonic current. With a 5% impedance line reactor, the maximum achievable current distortion level is 35%. Therefore, the total harmonic distortion current (THD-I) at the grid is 35%. The THD-I for IT server racks is also 35%. According to the IEEE 519 standard, the maximum allowed THD-I limit is 8%.

[0063] The total harmonic distortion (THD) is the amount of distortion, i.e., the second and greater harmonics, in the current or voltage waveform with respect to the fundamental, i.e., the first harmonic, current or voltage waveform. The total harmonic current distortion (THD-I) is defined as:

THD-I=I.sub.Total Harmonic/I.sub.1  (3)

where I.sub.Total Harmonic is the total harmonic current and I1 is the fundamental current, i.e., the first harmonic current.

[0064] To improve THD-I further, another 5% effective line reactance L.sub.S (either independent or coupled PDU) is added before the IT server and evaporative cooling device loads as shown in FIGS. 2, 3, and 6 at the LV side and additional 5% individual line reactors are added for CDU pump-motor VFDs, pump skid pump-motor VFDs, and chiller module compressor-motor VFDs. The electrical system also includes a 5% line reactor L.sub.M at the MV side in addition to the above added filters. This is part of passive filtering techniques. The combination of all the above filters generates 237 A of harmonic current. Therefore, the total harmonic distortion current (THD-I) at the grid is 13%, which is lower in comparison to the THD-I of FIG. 1. The THD-I for the IT server racks is 12%.

[0065] The hybrid filtering technique is implemented to further improve the THD-I. For example, in the hybrid filtering technique implemented in FIG. 8, both passive and active filtering are performed. In addition to the 5% compensation provided by the line reactor L.sub.M at MV, the hybrid filtering technique implemented in FIG. 8 also provides active filtering having a 15% compensation capacity for IT servers and evaporative cooling devices. There are also 5% individual line reactors for CDU pump-motor VFDs, pump skid pump-motor VFDs, and chiller module compressor motor VFDs. The combination of all the above compensation components generates 138 amps of harmonic current. Therefore, the total harmonic distortion current (THD-I) at the grid is 8%, which satisfies the IEEE 519 standard and is lower than the THD-I of the electrical systems of FIGS. 2, 3, and 6. The THD-I for the IT server racks is 5%.

[0066] In the hybrid filtering techniques implemented in the electrical systems of FIGS. 9 and 10, both the active and passive filtering are performed. In addition to the 15% compensation capacity provided by the MV active filtering technique, the hybrid filtering techniques implemented in the electrical systems of FIGS. 9 and 10 also provide 5% compensation from the line reactor L.sub.S at the LV side for the IT servers and evaporative cooling devices. There is also 5% compensation capacity provided by the individual line reactors for the harmonics introduced by the CDU pump motor VFDs, the pump skid pump motor VFDs, and the chiller module compressor motor VFDs. In sum, the hybrid filtering techniques implemented in the electrical systems of FIGS. 9 and 10, generates 102 amps of harmonic current. Therefore, the total harmonic distortion current (THD-I) at the grid is 6%, which is lower than the maximum limit specified by the IEEE 519 standard and is lower than the THD-I of FIG. 8. The THD-I for the IT server racks is 5%.

[0067] To achieve lower THD-I, active filtering techniques for both MV (20% capacity) and LV (15% capacity) may be employed. There are also 5% individual line reactors for CDU pump motor VFDs, pump skid pump motor VFDs, and chiller module compressor motor VFDs. As a result, there is only 79 amps of harmonic current. Therefore, the THD-I at the grid is only 4%. The THD-I for the IT server racks is only 3%.

TABLE-US-00003 TABLE 3 Current THD (THD-I) value and relative cost of various filtering configurations IT and Fluid Filtering Grid side eSYNC Pump Skid Cooler Chiller Relative Technique THD-I THD-I CDU THD-I THD-I THD-I THD-I Comments Comments Cost Existing 35% due to L 35% due 35% due to 35% due to 35% due 35% due to Regular PDU Line filter 15% Passive for non- to L L L to L L Transformer L: 5% line Filtering linear DC impedance (FIG. 1) load Passive 13% due to L.sub.M, 12% due to 12% due to 12% due to 35% due 12% due to Either due Line filters 30% Filtering effective L.sub.s and both L.sub.M both L.sub.M and both L.sub.M and to L.sub.M both L.sub.M and to external L.sub.M and L.sub.s: (FIGS. Line filters for and L.sub.s 5% VFD line 5% VFD line 5% VFD line L.sub.s or 5% line 2, 3, and 6) non-linear DC Filter Filter Filter coupled PDU impedance load Transformer Hybrid 8% due to L.sub.M, 5% due to 12% due to 12% due to 35% due 12% due to Regular PDU Line filter 55% Filtering 1 LV AF and Line both L.sub.M both L.sub.M and both L.sub.M and to L.sub.M both L.sub.M and Transformer L.sub.M: 5% line (FIG. 8) filters for and LV AF 5% VFD line 5% VFD line 5% VFD line impedance; non-linear DC (15% Filter Filter Filter 15% THD-I load capacity) reduction by LV AF (to optimize AF cost) Hybrid 6% due to 5% due to 5% due to 5% due to 15% due 5% due to Either due 15% THD-I 75% Filtering 2 DCSTATCOM MV both MV AF both MV AF both MV AF to MV AF both MV AF to external reduction (FIGS. 9 and AF, effective L.sub.s and L.sub.s and 5% and 5% VFD and 5% VFD L.sub.s or by MV AF (to 10) and Line filters VFD line line Filter line Filter coupled PDU optimize AF for non-linear DC Filter Transformer cost); load Line filter Ls: 5% line impedance Active 4% due to 3% due to 7% due to 7% due to 20% due 7% due to No L.sub.M or L.sub.s 20% THD-I 100%  Filtering DCSTATCOM MV both MV AF both MV AF both MV AF to MV AF both MV AF are needed; reduction (FIG. 11) AF and LV AF and LV AF and 5% and 5% VFD and 5% VFD Regular by MV AF for non-linear VFD line line Filter line Filter PDU (to optimize DC load Filter Transformer MV AF cost further) and 15% LV AF

[0068] Table 3 illustrates the THD-I values for various filtering configurations and the relative cost to implement those filtering configurations to mitigate harmonic line current.

[0069] The existing passive filtering of FIG. 1 is low cost because a single line inductor L is used. The overall THD-I is 35% at the grid. This is higher than the allowed 8% current harmonics specified by the IEEE 519 standard. As a result, the efficiency of the electrical system is low because of the presence of extra higher harmonic current, e.g., 645 amps, in the electrical system. Also, there is a 5% line voltage drop across the line inductor L. The cost of the existing passive filtering employed in the electrical system of FIG. 1 is 15% with respect to the cost of the MV and LV active filtering technique employed in FIG. 11.

[0070] The passive filtering techniques employed in the electrical systems of FIGS. 2, 3 and 6 are more expensive than the passive filter technique employed in FIG. 1 because of the use of two line inductors L.sub.M and L.sub.S in the electrical systems of FIGS. 2 and 3 and the use of the line inductor L.sub.M and coupled to the PDU of FIG. 6. The overall THD-I is 13% at the grid. This is higher than the 8% current harmonics allowed by the IEEE 519 standard. The passive filtering technique employed in the electrical systems of FIGS. 2, 3, and 6 also increases efficiency of the electrical system because of the lower current harmonics, e.g., 237 amps, in the electrical system, which is lower than the current harmonics of FIG. 1. The electrical system of FIG. 6 with the coupled PDU is more compact in terms of volume than FIGS. 2 and 3 (with independent discrete magnetic circuits) and saves IT floor space, which is at premium value. The total 10% line voltage drop occurs across both of the line inductors. The cost of the passive filtering technique employed in the electrical systems of FIGS. 2, 3, and 6 is 30% of the cost of the active filtering technique employed in FIG. 11.

[0071] The first hybrid filtering technique employed in the electrical system of FIG. 8 is more expensive than the passive filtering techniques employed in the electrical systems of FIGS. 2, 3, and 6 because of the use of MV passive filtering using the line reactor L.sub.M and LV active filtering. The overall THD-I is 8% at grid and thus satisfies the IEEE 519 standard. The efficiency of the electrical system employing the first hybrid filtering technique is higher because of the lower harmonics current, e.g., 138 amps). There is no voltage drop across the LV active filters 802. There is a 5% line voltage drop across line reactor L.sub.M 202. The cost of the first hybrid filtering configuration employed in the electrical system 800 of FIG. 8 may be 55% of the cost of the MV and LV active filtering configuration employed in the electrical system of FIG. 11.

[0072] The electrical systems employing the second hybrid filtering configuration of FIGS. 9 and 10 are more expensive than the electrical system employing the second hybrid filtering techniques of FIG. 8 because of the use of both MV active filtering and LV passive filtering. The overall THD-I is 6% at the grid, which is lower than the IEEE 519 standard. The efficiency of the electrical systems of FIGS. 9 and 10 are better because of the lower harmonic current, e.g., 102 amps. There is no voltage drop across the MV active filter. There is a 5% line voltage drop across the line reactors L.sub.S. The cost of the second hybrid filing configuration employed in the electrical systems of FIGS. 9 and 10 may be 75% of the cost of the MV and LV active filtering configuration of FIG. 11.

[0073] The relative cost of using the MV and LV active filtering configuration to mitigate harmonics as illustrated by FIG. 11 is the greatest in comparison to the passive and hybrid filtering configurations. The overall THD-I at the grid is 4% and the efficiency of the electrical system of FIG. 11 is the best compared to the efficiency of the hybrid and fully passive configurations because the current harmonics are at minimum, e.g., 79 amps in the exemplary specifications of Table 2. The MV and LV active filtering configuration also increases the equipment life cycle, reduces occasional malfunctions of the DSP controllers, reduces safety hazards associated with higher current, and possibly reduces or eliminates the potential penalties imposed by the utility. Also, there is no line voltage drop across the active filters.

[0074] Therefore, the first and second hybrid configurations fulfill the harmonic requirement of the IEEE 519 standard, i.e., 8% limit at the grid, with lower cost in comparison to the full active filtering configuration. In some applications, however, the cost may not be a factor, but the overall performance and efficiency of the electrical system may be a factor. Thus, the selection of the filtering technique for a particular application depends upon a number of factors including the cost, the harmonic requirements, and the efficiency requirements.

[0075] FIG. 13 is a flow diagram of an example process performed by the controller 935 and the controller of FIG. 8 to compensate for the grid harmonic current. After starting, a first DC voltage is supplied from an energy storage device, e.g., energy storage device 132 or energy storage device 1602, in step 1302. In step 1304, the first DC voltage is converted into a second DC voltage. Step 1304 may not be performed in the active filters 802 that do not include a DC-DC converter 1604 because the voltage of the energy storage device 1602 is high enough to not require the DC-DC converter 1604, which acts as a boost converter. In step 1306, an AC voltage is generated from the second DC voltage or, in the case where the DC-DC converter 1604 is not included in the active filter 802, the AC voltage is generated from the first DC voltage.

[0076] In step 1308, a load current is measured, for example, by the current sensor 825 and/or the current sensor 925. In step 1310, the measured load current is filtered using a high pass filter to obtain a harmonic portion of the measured load current, e.g., the controller 835 and/or the controller 935 filters the measured load current. In step 1312, an opposite harmonic current is generated based on the harmonic portion of the measured load current. The opposite harmonic current is an AC current that is 180 degrees out of phase from the harmonic portion of the measured load current. Then, in step 1314, before the process of FIG. 13 ends, the opposite harmonic current is supplied to the grid. In the case of the MVUPS 300, the opposite harmonic current is supplied to the grid at the point of common coupling (PCC).

[0077] FIG. 14 depicts a DC-DC converter 1400, which may be employed as the DC-DC converter 133 of FIGS. 7-11 and which may be employed in the active filter 802 of FIGS. 8 and 11. The DC-DC converter 1400 is a bi-directional two-stage DC-DC converter having a first stage 1424 and a second stage 1426. The first DC-DC stage 1424 converts the voltage from the energy storage device 132 into voltage V1. Voltage V1 is a DC voltage higher than the voltage of the energy storage device 132. The second DC-DC stage 1426 converts the voltage V1 into voltage V2, which is higher than voltage V1. The voltage boost from the first and second stages 1424, 1426 can range from about 1:5 to about 1:10. The voltage boost of the DC-DC converter 1400 can be adjusted by changing the size of the switches at each level, the number of stages, and/or the number of levels in each stage. The optimum boost voltage requirement is based on the given voltage of the energy storage device 132 and the required voltage output from the inverter 302. For lower voltage outputs from the inverter 302 the boost voltage ratio can be lower. For higher voltage outputs from the inverter 302 the boost voltage ratio can be higher. The efficiency of the DC-DC converter 1400 is reduced when the boost ratio is greater than about 7.

[0078] In FIG. 14, output capacitor C.sub.0 and inductor L.sub.0 connect the first stage 1424 to the second stage 1426. The first stage 1424 of the DC-DC converter 1400 is shown as a bidirectional, two-level DC-DC converter having one insulated gate bipolar transistor (IGBT) switch S.sub.U connected in series with another IGBT switch S.sub.L. The switches S.sub.U and S.sub.L are connected to the energy storage device 132 of FIGS. 7-11, for example, through an LC filter, which includes capacitor C and inductor L.

[0079] If the switch S.sub.U is formed into a boost converter, the first stage 1424 may provide a range of duty or boost ratios. For example, as shown in Table 4 below, the boost ratio may range from 0 to 0.9. Thus, if the input voltage (VS) to the first stage 1424 is about 1 kV, the output voltage (V1) ranges from 1 kV to 10 kV depending on the value of the boost ratio, as shown in Table 4. The voltage V1 varies depending upon the inductance of L multiplied by the rate of change of current di/dt. As used herein, voltage V1 refers to the voltage output of the first stage 1424 of the DC-DC converter 1400. Also, as used herein, voltage V2 refers to the output voltage of the second stage 1426 of the DC-DC converter 1400.

TABLE-US-00004 TABLE 4 VS (~1 kV) Duty (Boost) ratio V1 1 kV 0 1 kV 1 kV 0.2 1.25 kV 1 kV 0.4 1.66 kV 1 kV 0.6 2.5 kV 1 kV 0.7 3.3 kV 1 kV 0.8 5 kV 1 kV 0.9 10 kV

[0080] The IGBT in switch S.sub.U may be configured in such a way as to handle a lower voltage and a higher current. Furthermore, because the IGBT of switch S.sub.U is handling a lower voltage, the overall size of the IGBT may be smaller.

[0081] The two-stage bidirectional DC-DC converter 1400 is a bi-directional converter. Switches S.sub.U and S.sub.1dc-S.sub.4dc are used to discharge the energy storage 132) and switches S.sub.L and S5-S8 are used to charge the energy storage device 132. In particular, switch S.sub.U is configured as a boost converter that converts the voltage Vs of the energy storage device 132 to a higher voltage and switch S.sub.L is configured as a buck converter that converts voltage from the utility supply 111 to a lower voltage appropriate for charging the energy storage device 132, e.g., a voltage slightly more than Vs.

[0082] Each of the switches S.sub.1dc-S.sub.8dc outputs a voltage equal to the input voltage V1. Since the switches S.sub.1dc-S.sub.8dc are connected in series, the output voltage V2 is equal to the sum of the voltages output from each of the switches S.sub.1dc-S.sub.8dc. Thus, the boost ratio is 4:1 and V2 equals 4×V1.

[0083] The capacitors C.sub.1-C.sub.4-4 are relatively small capacitors, e.g., capacitors rated for about 5 kV with a capacitance value that is about ten times less than a capacitor for a conventional DC-DC converter. For example, if a conventional two-level DC-DC converter needs a capacitor having a value of about 2000 μF, then the multi-level flying capacitor arrangement (e.g., C.sub.1-C.sub.4-4) needs a capacitor having a value of about 200 μF. In a five-level arrangement, each switch S.sub.1dc-S.sub.4dc operates at a fixed duty cycle of 25% and a fixed switching frequency without pulse width modulation. The voltages across the capacitors C.sub.1-C.sub.4-4 may be balanced in every switching cycle due to fixed duty cycle operation. Additionally, the voltage across each switch S.sub.1dc-S.sub.4dc maintains 25% of the high voltage V2.

[0084] As shown in FIG. 14, the number of capacitors coupled in series between the collectors of switches arranged in the upper portion of a stage and the emitters of the switches arranged in the lower portion of the stage depends on the level of the switch to which the capacitors are coupled. The DC-DC converter 1400, however, may include any number of capacitors coupled in series between the collectors and emitters of appropriate switches to achieve a desired result. The DC-DC converter 1400 of FIG. 14 is a five-level converter in a flying capacitor configuration.

[0085] FIG. 15 shows a five-level diode-clamped inverter 1500, which may be employed as the multi-level inverter 302 of FIGS. 7-11 and which may be used to convert the DC voltage output V2 from the DC-DC converter 1400 to three-phase AC voltage V3. The five-level inverter 1500 includes three groupings of switches and diodes 1502, 1504, and 1506 to generate the three phases of the AC voltage V3, which is the output voltage of the inverter 1500. Each grouping of diodes and corresponding switches S.sub.1U-S.sub.8U, S.sub.1V-S.sub.8V, and S.sub.1W-S.sub.8W are connected together in a diode-clamped configuration.

[0086] Switches S.sub.1U-S.sub.8U, S.sub.1V-S.sub.8V, and S.sub.1W-S.sub.8W may be IGBTs. IGBTs allow for higher voltages/currents and higher switching frequencies. The five-level inverter 1500 illustrated in FIG. 15 allows for sharing of the high voltage among the switches S.sub.1U-S.sub.8U, S.sub.1V-S.sub.8V, and S.sub.1W-S.sub.8w, and reduces harmonic distortion.

[0087] The switches S.sub.1U-S.sub.8U, S.sub.1V-S.sub.8V, and S.sub.1W-S.sub.8W are controlled by controller 935, which may include a digital signal processor (DSP). The DSP may use a space vector pulse width modulation (SVPWM) technique for operating the switches S.sub.1U-S.sub.8U, S.sub.1V-S.sub.8V, and S.sub.1W-S.sub.8W in such a way that the neutral-point voltage remains balanced in open-loop operation. The SVPWM technique is an inverter modulation technique for synthesizing a voltage space vector V* over a modulation sampling period T. SVPWM control methods that can be used to control the multi-level inverters is described in PCT Patent Application No. PCT/US15/56785 (which published on Apr. 28, 2016, with Publication No. WO 2016/065087), the entire contents of which are incorporated herein by reference.

[0088] The SVPWM technique provides the advantages of superior harmonic quality and large under-modulation range that extends the modulation factor from 78.5% to 90.7%. Alternatively or in addition to the SVPWM, an artificial neural network (ANN) control technique can be used to reduce harmonics outputted from the inverter 1500.

[0089] FIG. 16 is an embodiment of an active filter 1600, which may be employed as the active filter 802 of FIGS. 8 and 11. The active filter 1600 includes an energy storage device 1602, a two-level inverter 1606, and LCL filters 1608 coupled to respective outputs of the two-level inverter 1606. In some embodiments, the active filter 1600 optionally includes a DC-DC converter 1604. The DC-DC converter 1604 may be needed in active filters 802 that include a very low voltage energy storage device 1602 so that the voltage can be boosted prior to the two-level inverter 1606. The energy storage device 1602 may be a battery, an ultracapacitor, or a combination of a battery and an ultracapacitor. The DC-DC converter 1604 is a two-level DC-DC converter having switch S.sub.U and switch S.sub.L connected together in series. The switches S.sub.U and S.sub.L may be insulated gate bipolar transistors (IGBTs). The switches S.sub.U and S.sub.L are connected to the energy storage device 132 through an LC filter.

[0090] The two-level inverter 1606 includes three pairs of series-connected switches, e.g., IGBTs, which are coupled together in parallel. The two-level inverter 1606 may be controlled according to space vector pulse width modulation (SVPWM) control to increase the linear operating range of the two-level inverter (e.g., from 78.5% to 90.7%) and to reduce the harmonic levels at the output of the two-level inverter 1606 as compared to sinusoidal PWM-based (SPWM) control. The switches of the DC-DC converter 1604 and the two-level inverter 1606 are controlled by a controller (not shown), which may include a digital logic circuit, such as a Field Programmable Gate Array (FPGA), and/or a processor, such as a digital signal processor (DSP) or a microprocessor. Techniques for controlling the two-level inverter 1606 are described in U.S. patent application Ser. No. 14/994,850 (filed on Jan. 13, 2016), the contents of which are incorporated herein by reference in their entirety.

[0091] While several embodiments of the disclosure have been shown in the drawings and/or discussed herein, it is not intended that the disclosure be limited thereto, as it is intended that the disclosure be as broad in scope as the art will allow and that the specification be read likewise. Therefore, the above description should not be construed as limiting, but merely as exemplifications of particular embodiments. Those skilled in the art will envision other modifications within the scope and spirit of the claims appended hereto.