AC-DC POWER CONVERTER WITH POWER FACTOR CORRECTION

Abstract

The present invention relates to an AC-DC power converter which comprises a resonant DC-DC converter and a charge pump circuit. The charge pump circuit is configured to perform power factor correction of the AC-DC power converter by drawing current pulses at a switching frequency of the converter from an AC line voltage such that electrical charges of the current pulses vary substantially proportionally with instantaneous amplitude of the AC line voltage.

Claims

1. An AC-DC power converter comprising: an AC rectification circuit configured to convert an AC line voltage into a rectified line voltage, a rectifying element connected between the rectified line voltage and a DC supply voltage of a resonant DC converter; said resonant DC converter comprising: a resonant inverter configured to convert the DC supply voltage into a resonant inverter voltage at a fixed or controllable switching frequency, and an output rectification circuit configured to generate a DC output voltage or DC output current from the resonant voltage for supply to a converter load, a charge pump circuit connected to the rectified line voltage and the resonant inverter voltage, where said charge pump circuit is configured to draw current pulses at the switching frequency from the AC line voltage, wherein electrical charges of the current pulses vary proportionally to instantaneous amplitude of the AC line voltage.

2. An AC-DC power converter according to claim 1, wherein the charge pump circuit comprises: a smoothing capacitor connected to the DC supply voltage of the resonant DC-DC converter; a pump or flying capacitor connected from the resonant inverter voltage to the rectified line voltage.

3. An AC-DC power converter according to claim 2, wherein the charge pump circuit is configured to, during a cycle of the switching frequency, sequentially cycle through states of: a first state where each of the rectifying element and AC rectification circuit is non-conducting/off and a voltage across the pump/flying capacitor remains substantially constant; a second state where AC rectification circuit is conducting/on and the rectifying element is non-conducting/off to charge the pump/flying capacitor by line current drawn from the AC line voltage; a third state where each of the rectifying element and AC rectification circuit is non-conducting/off and the voltage across the pump/flying capacitor remains substantially constant; a fourth state where the AC rectification circuit is in a non-conducting/off state and the rectifying element is in a conducting/on state such that discharge current flows from the pump/flying capacitor into the smoothing capacitor to increase the DC supply voltage of the resonant inverter and decrease the voltage across the pump/flying capacitor.

4. An AC-DC power converter according to claim 3, wherein the charge pump circuit is configured to: cycle through its second state during a rising edge of a waveform of the resonant inverter voltage; and cycle through its fourth state during a falling edge of the waveform of the resonant inverter voltage.

5. An AC-DC power converter according to claim 2, wherein a capacitance of the smoothing capacitor and a capacitance of the pump/flying capacitor are selected such that the DC supply voltage of the resonant inverter is higher than the AC line voltage across an entire cycle of the AC line voltage.

6. An AC-DC power converter according to claim 1, further comprising: a voltage or current regulation loop configured to adjust the DC output voltage or DC output current in accordance with a DC reference voltage or a DC reference current.

7. An AC-DC power converter according to claim 6, wherein the voltage or current regulation loop is configured to: adjust the DC output voltage or DC output current by adjusting the controllable switching frequency, and/or adjust the DC output voltage or DC output current by off/on duty cycle modulation of the fixed or controllable switching frequency.

8. An AC-DC power converter according to claim 1, where in the resonant inverter comprises at least one semiconductor switch connected between the DC supply voltage and a negative supply rail; said at least one semiconductor switch comprising one or more wide bandgap transistors such as one or more gallium nitride FET(s).

9. An AC-DC power converter according to claim 8, wherein a switch signal, at the fixed or controllable switching frequency, is applied to a control terminal of the least one semiconductor switch of the resonant inverter.

10. An AC-DC power converter according to claim 1, where in the resonant inverter and/or the output rectification circuit of DC-DC converter is configured for zero voltage switching (ZVS) and/or zero current switching (ZVS).

11. An AC-DC power converter according to claim 1, wherein the output rectification circuit comprises one or more passive diodes, or one more active/controllable diodes.

12. An AC-DC power converter according to claim 1, where in the resonant inverter comprises a series resonant network and/or a parallel resonant network having a predetermined resonance frequency.

13. An AC-DC power converter according to claim 1, where in the switching frequency is between 100 kHz and 300 MHz.

14. An AC-DC power converter according to claim 1, further comprising galvanic isolation barrier coupled between the resonant output voltage and an input of the output rectification circuit.

15. A method of applying power factor correction to an AC-DC power converter using a charge pump circuit, said method comprising steps of: converting an AC line voltage into a rectified line voltage, applying the rectified line voltage to a DC supply voltage of a resonant DC-DC converter through a rectifying element, generating a resonant inverter voltage by switching a resonant inverter at a fixed or controllable switching frequency, rectifying the resonant inverter voltage to generate a DC output voltage or DC output current, drawing charging pulses, at the switching frequency, from the AC line voltage into a pump or flying capacitor connected between the rectified line voltage and the resonant inverter voltage, wherein electrical charges of the charging pulses vary proportionally to an instantaneous amplitude of the AC line voltage, discharging the pump or flying capacitor into a smoothing capacitor, connected to the DC supply voltage, by supplying current pulses, at the switching frequency, into the smoothing capacitor.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

[0037] A preferred embodiment of the invention will be described in more detail in connection with the appended drawings, in which:

[0038] FIG. 1 is a top-level block diagram of AC-DC power converters in accordance with the invention,

[0039] FIG. 2 is a simplified electrical circuit diagram of a class-DE series resonant converter of the AC-DC power converter,

[0040] FIG. 2A shows block diagrams of various exemplary embodiments of AC-DC power converters in accordance with the invention,

[0041] FIG. 3 is a simplified equivalent diagram of the charge pump circuit of the AC-DC power converter,

[0042] FIG. 4 is a simplified electrical diagram of a first exemplary embodiment of the AC-DC power converter based on a class-DE converter and a charge-pump circuit,

[0043] FIG. 4A is a simplified electrical diagram of a second exemplary embodiment of the AC-DC power converter based on a class-DE converter and a charge-pump circuit,

[0044] FIG. 5 shows low-frequency operation of the charge pump circuit across a half-line cycle, 50 Hz, of the mains line voltage inputted to the AC-DC power converter,

[0045] FIG. 6 illustrates high frequency operation of an exemplary embodiment of the AC-DC power converter across two switching cycles of the switching frequency of the class DE resonant converter,

[0046] FIG. 7 shows simulation results for the mains line current and mains voltage input of the exemplary embodiment of the AC-DC power converter,

[0047] FIG. 8 shows simulated waveforms of various internal voltages and currents of the exemplary embodiment of the AC-DC power converter,

[0048] FIG. 9 shows simulated losses of an exemplary inductor of a resonant network of the class-DE converter,

[0049] FIG. 10 simulated core losses at 1 MHz of the exemplary inductor of the resonant network of the class-DE converter

[0050] FIG. 11—upper plot shows measured output power and conversion efficiency of an experimental prototype AC-DC power converter across its operational frequency range from 960 kHz to 1040 kHz,

[0051] FIG. 11—lower plot shows measured PFC results of the experimental prototype AC-DC power converter across its operational frequency range from 960 kHz to 1040 kHz,

[0052] FIG. 12 shows measured harmonics distribution of the mains line current at full-load operation and half-load operation of the experimental prototype AC-DC power converter,

[0053] FIG. 13 shows line-frequency time domain waveforms of the experimental prototype AC-DC power converter; and

[0054] FIG. 14 shows measured harmonics distribution of the mains line current for the experimental prototype AC-DC power converter at 120 V_RMS and 230 V_RMS line voltage inputs.

DETAILED DESCRIPTION OF PREFERRED EMBODIMENTS

[0055] In the following, various exemplary embodiments of the present AC-DC power converter are described with reference to the appended drawings. The skilled person will understand that the accompanying drawings are schematic and simplified for clarity and therefore merely show details which are essential to the understanding of the invention, while other details have been left out. Like reference numerals refer to like elements or components throughout. Like elements or components will therefore not necessarily be described in detail with respect to each figure. It will further be appreciated that certain actions and/or steps may be described or depicted in a particular order of occurrence while those skilled in the art will understand that such specificity with respect to sequence is not actually required.

[0056] FIG. 1 shows a simplified block diagram of the present AC/DC power converter 100. The AC/DC power converter 100 comprises an AC rectification circuit (101) which is coupled to an AC line voltage (V.sub.IN) which may deliver AC mains voltages like 230 V/50 Hz or 110V/60 Hz. The AC rectification circuit (101) may include a mains input filter as illustrated below. The AC rectification circuit (101) is configured to convert the AC line voltage V.sub.IN into a rectified line voltage (V.sub.B). The AC/DC power converter 100 additionally comprises a charge pump circuit (103), which preferably included a smoothing capacitor (C.sub.DC), and class DE resonant converter (105). The smoothing capacitor (C.sub.DC) is connected to the DC supply voltage (V.sub.DC) of the resonant inverter (101). The resonant converter (105) is configured to convert the DC supply voltage (V.sub.DC) firstly into a resonant inverter voltage (illustrated below) at a fixed or adjustable switching frequency. Secondly, an output rectification circuit (not shown) of the resonant converter (105) generates a DC output voltage (V.sub.OUT) of the AC/DC power converter 100 by rectifying the resonant inverter voltage. A schematically illustrated converter load (R.sub.L), such as a LED lamp assembly, is connected to the DC output voltage (V.sub.OUT). The converter load may generally exhibit inductive, capacitive or resistive impedance. The charge pump circuit (103) is configured to perform power factor correction (PFC) of the AC/DC power converter 100 by drawing charging pulses from the AC line voltage where electrical charges of the charging pulses vary substantially proportionally with an instantaneous amplitude of the AC line voltage as discussed in additional detail below.

[0057] FIG. 2 shows a simplified electrical circuit diagram of the resonant class DE power converter (105). The class DE power converter comprises a controllable switch network 212, a series resonant tank or network (214) comprising an inductor L.sub.RES and a capacitor C.sub.RES. The skilled person will understand that other types of resonant tanks or tank circuits (214) may be used in alternative embodiments of the present AC/DC power converters as schematically illustrated on FIG. 2A. The class DE power converter comprises the previously discussed rectifier or rectification circuit 216. The skilled person will appreciate that alternative resonant power converter topologies such as Class E or LLC topologies may be employed in the present AC/DC power converter 100. The controllable switch network 212 is connected to positive and negative terminals or nodes of the DC supply voltage (V.sub.DC) to energize the converter 105. The resonant class DE power converter 105 typically comprises of two stages, wherein the first stage comprises the controllable switch network 212 and the resonant tank 214. The controllable switch network 212 converts a DC voltage input from the DC supply voltage (V.sub.DC) into a high frequency AC output, i.e. the resonant inverter voltage V.sub.REC and the series resonant tank 214 may perform an AC-AC gain. The second stage of the resonant converter 105 comprises the high frequency AC-DC rectification circuit 216 wherein energy/power supplied by the series resonant tank may be tapped off and delivered to the converter/output load (R.sub.L). The rectification circuit 216 may comprise SiC Schottky diodes D.sub.R1 and D.sub.R2 as discussed in additional detail below. The skilled person will understand that other types of AC-DC rectification circuits 216 may be used in alternative embodiments of the present AC/DC power converters, including rectification circuits that include an isolation transformer such as an center-tapped isolation transformer as schematically illustrated on FIG. 2A.

[0058] The utilization of a resonant power converter (105) allows utilization of soft-switching techniques through the intrinsic alternating behaviour of the currents and voltages through high-side and low-side semiconductor switches Q.sub.HS and Q.sub.LS of the half-bridge 212, or controllable switch network, resulting in substantially lower switching losses. Driving signals (not shown) to the gate driver 213 are preferably synchronized with the same duty cycle and extended dead-time adjustment to avoid cross conduction between the semiconductor switches Q.sub.HS and Q.sub.LS switches and allow the resonant inductor current to charge or discharge the output capacitance of the half-bridge switches Q.sub.HS and Q.sub.LS so that their drain voltages reach the appropriate supply rail voltage before switching the gate. Therefore, ensuring zero voltage switching (ZVS) operating conditions of the half-bridge 212.

[0059] As discussed below in connection with the design of the charge pump stage, a gain of the class DE resonant inverter or stage should preferably be relatively high, e.g. a gain from about 0.5 to 1 to provide high power factor and low total harmonic distortion (THD) of the AC input current waveform. The inventors have found that a good approximation would be to design for 300 V of DC output voltage and assuming an input DC voltage to the half-bridge equal to the peak of the mains input voltage, e.g. 325 V. The design is preferably based on the well-known First Harmonic Approximation (FHA) approach even though alternative procedures may be used. The computation procedure or flow for an exemplary design of the AC/DC power converter with a target output power of 50 W may start by calculating a rectifier input resistance R.sub.REC from the load resistance R.sub.L through impedance transformation via the resonant rectifier as follows:

[00001]$\begin{array}{cc}{R}_L=\frac{{V_{\mathrm{OUT}}}^2}{P_{OUT}}=1.8k\Omega & \left(1\right)\\ R_{REC}=\frac{2R_L}{{\pi }^2}=365\Omega & \left(2\right)\end{array}$

[0060] The converter voltage conversion ratio is equal to:

M.sub.V=V.sub.OUT/V.sub.IN=0.923  (3)

[0061] While gains of the half-bridge 212 and class-DE rectifier are equal to 0.45 and 2.22 respectively, the required gain of the series resonant tank 214 can be calculated by:

[00002]$\begin{array}{cc}{M}_{\mathrm{V\_RES}}=\frac{M_V}{M_{\mathrm{V\_HB}}.Math.M_{\mathrm{V\_REC}}}=0.924& \left(4\right)\end{array}$

[0062] The converter loaded quality factor is calculated using the following equation:

[00003]$\begin{array}{cc}{Q}_L=\sqrt{\frac{1}{\frac{{M_{\mathrm{V\_RES}}}^2}{f_n-\frac{1}{f_n}}}-1}& \left(5\right)\end{array}$

[0063] where f.sub.n is the normalized switching frequency, equal to f.sub.sw/f.sub.o—with f.sub.o being a resonant frequency of the series resonant tank 214. In order to ensure the validity of the above equations given the FHA approach, the loaded quality factor Q.sub.L of the resonant tank or circuit 214 needs to be high enough so that the resonant inverter current through the resonant tank 214 is substantially sinusoidal. A loaded quality factor of 2.5 is chosen for this design [5]. Using equation (5) to calculate the normalized switching frequency, and for a switching frequency of 1 MHz, the resonant frequency is calculated to 921 kHz. Therefrom, the resonant circuit component values may be calculated as:

[00004]$\begin{array}{cc}{L}_{RES}=\frac{Q_L.Math.R_{REC}}{{\omega }_o}=157\mu H& \left(6\right)\\ C_{RES}=\frac{1}{{\omega }_o.Math.Q_L.Math.R_{REC}}=190pF& \left(7\right)\end{array}$

[0064] Rectifier devices stresses are calculated as follows:

V.sub.D_max=V.sub.OUT=300 V  (8)

I.sub.D_max=πI.sub.OUT=524 mA  (9)

[0065] A voltage stress across the half-bridge switches:

V.sub.S_max=V.sub.IN=325 V  (10)

[0066] The current stresses of the half-bridge semiconductor switches Q.sub.HS and Q.sub.LS and components of the series resonant network may be calculated from:

[00005]$\begin{array}{cc}{I}_{\mathrm{RES\_max}}=\pi P_{OUT}\left(\frac{2}{\eta .Math.V_{\mathrm{IN\_pk}}}+\frac{1}{V_{OUT}}\right)& \left(11\right)\end{array}$

[0067] FIG. 3 shows a simplified electrical equivalent circuit or diagram of an exemplary charge pump circuit 103 of the present AC-DC power converter 100. Through the addition of a capacitor, a diode and the previously discussed smoothing capacitor (C.sub.DC) to the resonant converter (105), mains input current drawn from the AC line voltage can be regulated to be substantially proportional to the instantaneous AC line voltage. The present embodiment of the resonant converter (105) comprises a series-resonant inverter circuit in conjunction with and a high-frequency rectification circuit to support LED driver applications. The smoothing capacitor (C.sub.DC), or DC energy storage capacitor, is arranged at the converter input. The illustrated electrical equivalent circuit of the charge pump circuit 103 comprises a pump or flying capacitor C.sub.P and pump diode D.sub.P. The AC rectification circuit (101) is schematically represented by diode D.sub.B and the rectifier input voltage (V.sub.REC) is modelled by an independent high frequency square-wave voltage source 321. The capacitor C.sub.DC is preferably designed in accordance with the pump capacitor C.sub.P, such that the DC supply voltage V.sub.DC for power supply of the resonant inverter is always higher than the AC line voltage V.sub.IN such that the AC rectification circuit D.sub.B and the pump diode D.sub.P do not cross-conduct. Consequently, the input current I.sub.IN drawn from the AC line voltage is equal to a positive charging current I.sub.P of the pump capacitor C.sub.P. In other words the capacitance of the smoothing capacitor (C.sub.DC) and the capacitance of the pump/flying capacitor (C.sub.P) are selected such that the DC supply voltage V.sub.DC is higher than the AC line voltage across an entire cycle of the AC line voltage as discussed in additional detail below.

[0068] First, the pump/flying capacitor (C.sub.P) is preferably large enough to store a maximum input charge from the AC mains, which input charge is function of the output power, the peak input voltage and the switching frequency of the power converter. Those constraints ensure the pump capacitor (C.sub.P) can store the maximum charge needed. This maximum charge occurs at the peak input current and voltage:

[00006]$\begin{array}{cc}{C}_P\ge \frac{2P_{\mathrm{OUT}}}{\eta .Math.f_s.Math.{V_{\mathrm{IN\_pk}}}^2}& \left(12\right)\end{array}$

[0069] Second, the capacitance of the smoothing capacitor (C.sub.DC) is preferably dimensioned such that the voltage across it, which may correspond to the DC supply voltage (V.sub.DC) of the resonant inverter is higher than the AC line voltage, or mains input voltage, across the entire cycle of the AC line voltage at least during steady state operation of the power converter 100. That constraints ensures the AC rectification circuit (D.sub.B) or diode bridge and the pump diode (D.sub.P) do not conduct at the same time. Hence, avoiding a direct current flow from the AC line voltage to the smoothing capacitor (C.sub.DC) and therefore providing control on the input current, which has to flow through the pump capacitor C.sub.p.

[00007]$\begin{array}{cc}{C}_{DC}\ge \frac{P_{\mathrm{OUT}}}{2{\omega }_l.Math.V_{\mathrm{DC\_ripple}}.Math.V_{\mathrm{DC\_avg}}}& \left(13\right)\end{array}$

[0070] As mentioned before, the class-DE stage is preferably designed with a high voltage gain (close to unity) which markedly reduces the dependence of the input current on the voltage across the smoothing capacitor (C.sub.DC) and the output voltage and makes it a function of only the AC input voltage under steady state operation of the power converter 100.

[0071] FIG. 5 shows low-frequency operation of the charge pump circuit 103, where the pump capacitor (C.sub.P) gets charged and discharged within fall and rise times of the rectifier input voltage V.sub.REC, respectively. The electrical charge ΔQ.sub.P is largely proportional to a voltage difference across the pump capacitor C.sub.P and this voltage difference varies between a low-frequency high-value V.sub.P_high and a constant low-value V.sub.P_low as indicated on the waveform plot 505. The circuit ensures that the electrical charge variation of pump capacitor C.sub.P, which is proportional to the voltage variation across C.sub.P, i.e. V.sub.P_high−V.sub.P_low, follows, or varies proportionally with, the AC line voltage V.sub.IN across the line cycle 50/60 Hz. Accordingly, the average of the mains line current I.sub.IN follows or tracks instantaneous amplitude of the AC mains line voltage with high accuracy and consequently a power factor very close to unity can ideally be obtained. Experimental results described below illustrates that an impressively high power factor in the range 0.95-0.99 is readily obtainable.

[0072] The skilled person will appreciate that the rectifier input voltage V.sub.REC can be any kind of waveform with a substantially constant AC amplitude and that any DC bias of the rectifier input voltage V.sub.REC has no effect on the line input current shape. This feature provides compatibility with different arrangements of the resonant tank circuit including the parallel-resonant, LCC, and LLC tank topologies or circuit arrangements.

[0073] FIG. 6 illustrates high frequency operation across two switching cycles of the switching frequency of the class DE resonant converter (105) and includes inter alia waveforms of the charging current I.sub.P and mains line current I.sub.IN showing the AC-DC converter operation at a maximum power point (ω.sub.lt=π/2) to illustrate the charge pump circuit operation. The maximum power point corresponds to a resonant frequency of the series resonant tank. Across every switching cycle, at steady-state, the operation of the charge pump circuit spans over four intervals 1, 2, 3 and 4 or states as indicated along the time axis of the waveform plots on FIG. 6, as follows:

[0074] 1) In a first interval, the rectified line voltage V.sub.B as shown on plot 621 is lower than the DC supply voltage V.sub.DC and higher than the line input voltage V.sub.IN where the V.sub.IN waveform refers to the voltage on the node interfacing the LC-mains filter and the diode bridge D.sub.B so both diodes are off and no current flows through the pump capacitor C.sub.P and the voltage V.sub.P as shown on plot 623 is essentially constant at V.sub.P_low.

[0075] 2) A second interval or states takes place during the fall time of the rectifier input voltage V.sub.REC as shown on plot 622. Once V.sub.REC starts to decrease, V.sub.B has to decrease along until diode D.sub.B gets forward biased and the rectified line voltage V.sub.B gets pulled to V.sub.IN. While V.sub.REC continues decreasing while V.sub.B remains substantially constant, because the 50/60 Hz grid frequency varies much slower, e.g. with a factor 1000 or more, than the switching frequency of V.sub.REC, V.sub.P increases and the pump capacitor C.sub.P is charged by the mains line current I.sub.IN as shown on plot 627, until V.sub.REC reaches its low-value and V.sub.P reaches its high-value, where:

V.sub.P_high=V.sub.IN−V.sub.REC_low  (20)

[0076] 3) A third interval or state begins once V.sub.REC settles at the low-value, where C.sub.P stops charging while diode D.sub.P still remains non-conducting or blocking. Similar to the first interval, no current flows through the pump capacitor and the voltage across the pump capacitor C.sub.P remains substantially constant.

[0077] 4) Eventually, a fourth interval or state takes place during a rise time of V.sub.REC. Once V.sub.REC starts to increase, V.sub.B is forced increase along until pump diode D.sub.P gets forward biased or conducting and V.sub.B is pulled to the DC supply voltage V.sub.DC. While V.sub.REC (622) continues increasing, with DC supply voltage V.sub.DC constant, V.sub.P decreases and pump capacitor C.sub.P deliver a discharge current into the smoothing capacitor C.sub.DC to increase the DC supply voltage V.sub.DC and decrease the voltage across pump capacitor C.sub.P until V.sub.REC reaches its high-value, V.sub.REC_high, and V.sub.P reaches its low-value, where

V.sub.P_low=V.sub.DC−V.sub.REC_high  (21)

[0078] By the end of the fourth interval, the operation of the charge pump circuit reverts to interval or state 1) again and the cycle repeats.

[0079] This analysis shows that the mains line current I.sub.IN on plot 627 is discontinuous. The positive charging current I.sub.P on current waveform plot 625 is likewise discontinuous and only flows into the charge pump circuit during the second interval or state. As illustrated by the current waveform plot 627 of the mains line current I.sub.IN on FIG. 6, a charging current pulse having the electrical charge ΔQ.sub.P is drawn from the AC mains line voltage during every interval 2 period and the electrical charge ΔQ.sub.P varies substantially proportionally with the instantaneous amplitude of the AC line voltage. As illustrated by the current waveform plot 625 of the pump capacitor current I.sub.P on FIG. 6, a corresponding charging current pulse, possessing an electrical charge ΔQ.sub.P, is drawn into the pump capacitor C.sub.P during every interval 2) state. However, a corresponding charging current pulse is drawn out of the pump capacitor C.sub.P during every interval 4) state and that electrical charge is supplied into the smoothing capacitor C.sub.DC to increase the DC supply voltage V.sub.DC.

[0080] FIG. 4 is a schematic electrical diagram of a first exemplary embodiment of the previously discussed AC-DC power converter 100 based on a class-DE series resonant inverter as schematically illustrated on FIG. 2. The AC-DC power converter 100 comprises an optional mains input filter including inductor L.sub.IN and capacitor C.sub.IN inserted between the mains voltage and the AC rectification circuit 401 which may comprise a diode bridge as illustrated. A class DE resonant inverter is configured to convert the DC supply voltage V.sub.DC into the resonant inverter voltage V.sub.REC at a fixed or adjustable switching frequency. The class DE resonant inverter 405 comprises high-side and low-side semiconductor switches Q.sub.HS and Q.sub.LS which are driven in a non-overlapping manner by gate driving circuit 413. The gate driving circuit 413 may comprise a digital isolator, such as Si8610BC by Silicon Labs, and an off-the-shelf type of gate driver such as UCC27611 by Texas Instruments, for each of the semiconductor switches Q.sub.HS and Q.sub.LS. The output voltage V.sub.SW of the half-bridge driver comprising high-side and low-side semiconductor switches Q.sub.HS and Q.sub.LS is applied to a series resonant tank 414 to produce a flow of resonant current I.sub.RES through the tank and a resonant inverter voltage V.sub.REC at the output of the tank 414.

[0081] The switching frequency or duty cycle may be adjusted or controlled by an output current or output voltage regulation loop or mechanism. The output current or output voltage regulation loop may comprise a switching frequency controller 440 or alternatively a duty cycle controller, i.e. using on/off control of the converter. One input of the controller 440 may be coupled to the output voltage V.sub.OUT while another input is coupled to a voltage or current reference generator (not shown) which sets a target output voltage V.sub.REF or target output current of the AC-DC power converter 100. The frequency controller 440 generates a switch control signal F.sub.SW to an input of the gate driver 413 to adjust the switching frequency of the class DE resonant inverter 405 such that a target DC output voltage (V.sub.OUT) or target DC output current is achieved as discussed in additional detail below in connection with experimental results of a prototype AC-DC power converter. The AC-DC power converter 100 additionally comprises a high frequency AC-DC rectification circuit 416 which is configured to generate the DC output voltage (V.sub.OUT) to the converter/output load (R.sub.L) by tapping off energy/power supplied by the series resonant tank 414 of the class DE inverter.

[0082] The AC-DC power converter 100 additionally comprises a charge pump circuit operating according to the principles discussed in connection with FIG. 3 above and which performs the previously discussed advantageous power factor correction (PFC) of the AC-DC power converter 100. The charge pump circuit comprises pump or flying capacitor C.sub.P, a smoothing capacitor C.sub.DC and pump diode D.sub.P. The rectifier input voltage which is equal to V.sub.REC is applied at the junction node between output rectification diodes D.sub.R1 and D.sub.R2. The pump or flying capacitor C.sub.P is connected between the rectified line voltage V.sub.B and the rectifier input voltage V.sub.REC which is equal to the resonant inverter voltage produced by the class DE resonant inverter.

[0083] Table I shows target specifications of the AC-DC power converter 100 according to one embodiment:

TABLE-US-00001 TABLE I Parameter Specification Operational Voltage 230 V.sub.RMS Line Frequency  50 Hz Output Power  50 W Power Factor >0.9

[0084] The charge pump circuit 103 (FIG. 3) is preferably designed such that the capacitance of the pump capacitor C.sub.P is large enough to store a maximum input current coming from the offline mains voltage. From the analysis above and considering that for a series-resonant converter, the resonant inverter voltage V.sub.REC varies between V.sub.OUT and 0 V and can be evaluated as follows:

V.sub.P_high=V.sub.IN−V.sub.REC_low=V.sub.IN−0=V.sub.IN  (11)

V.sub.P_low=V.sub.DC−V.sub.REC_high=V.sub.DC−V.sub.OUT  (12)

[0085] The equations (11), (12) show that the high values for the voltage across the pump capacitor C.sub.P take the envelope of the input voltage, while the low values take the envelope of the difference between the resonant converter's input and output voltages, which can be considered constant in high frequency converters.

[0086] Across one switching cycle, the variation of charge in the pump capacitor is equal to:

ΔQ.sub.P=C.sub.P.Math.ΔV.sub.P=C.sub.P(V.sub.P.sub.high−V.sub.P.sub.low)=C.sub.P(V.sub.IN−V.sub.DC+V.sub.OUT)  (13)

[0087] The pump capacitor current I.sub.P when averaged across one switching cycle is equal to:

[00008]$\begin{array}{cc}{l}_P=\frac{\Delta Q_P}{T_s}=f_s.Math.\Delta Q_P=f_s.Math.C_P\left(V_{\mathrm{IN}}-V_{DC}+V_{OUT}\right)& \left(14\right)\end{array}$

[0088] Considering the class-DE inverter stage operates near resonance with a high gain close to 1, the difference between the DC supply voltage V.sub.DC and V.sub.OUT will be very small. Therefore, at steady state, for a constant switching frequency, the pump capacitor current or charging current I.sub.P and, accordingly mains line current I.sub.IN, become proportional to the input voltage, i.e. line voltage, of the AC-DC converter, resulting in a high power factor and low THD. In that case, the maximum current through the pump capacitor (averaged over a switching cycle) will be equal to the maximum input current, which can be calculated as follows. Assuming 90% converter efficiency, the average input power is equal to:

[00009]$\begin{array}{cc}{P}_{\mathrm{IN\_avg}}=\frac{P_{\mathrm{OUT\_avg}}}{\eta }=55.5W& \left(15\right)\end{array}$

[0089] Assuming a power factor of 1, the input power is the product of two sinusoids, resulting in a peak input power of:

P.sub.IN_max=2P.sub.IN_avg=111 W  (16)

[0090] Accordingly, the maximum mains line current I.sub.IN or input current is:

[00010]$\begin{array}{cc}{I}_{\mathrm{IN\_max}}=\frac{P_{\mathrm{IN\_max}}}{V_{\mathrm{IN\_max}}}=\frac{111W}{325V}=342\mathrm{mA}=I_{\mathrm{P\_max}}& \left(17\right)\end{array}$

[0091] By substituting those values in equation (14), the capacitance for the pump capacitor C.sub.P can be calculated as follows:

[00011]$\begin{array}{cc}{C}_P=\frac{I_{\mathrm{P\_max}}}{f_s.Math.V_{\mathrm{IN\_max}}}=\frac{342\mathrm{mA}}{1\mathrm{MHz}*325V}=1.06\mathrm{nF}& \left(18\right)\end{array}$

[0092] The value for C.sub.P can be adjusted to account for the DE inverter stage gain not being exactly 1 (V.sub.DC−V.sub.OUT≠0). In this design, a value of 1.3 nF is chosen. Whereas the maximum voltage seen by the pump capacitor C.sub.P is equal to:

ΔV.sub.P_max=V.sub.IN_max=325 V  (19)

[0093] Based on the analysis and calculations outlined above, the exemplary embodiment of the present AC-DC power converter was simulated using LTspice. The switching frequency is set to 1.04 MHz for the simulation. The output power delivered to the converter load is 51 W and an average output voltage of 301V. The power factor is determined to about 0.99 and total harmonic distortion (THD) of the mains line current is 5.4%. FIG. 7 shows a mains line voltage waveform 750 of 230 V.sub.RMS, 50 Hz inputted to the AC-DC converter for the LTspice circuit simulation. A current waveform 755 of the corresponding the mains line current I.sub.IN 7 drawn by the AC-DC converter is also shown. It is evident that that the mains line current I.sub.IN is largely in-phase with the mains line voltage and distortion of the current waveform is relatively low.

[0094] Due to the charge pump circuit operation, the current in the resonant tank 414 peaks to the same value as pump capacitor current I.sub.P, which takes place at the peak of the input power (ω.sub.lt=π/2, 3π/4). The current in the resonant tank 414 is further a function of the switching frequency, the output power, and a shape of the V.sub.REC waveform. The value is obtained from the simulation results, as shown in FIG. 8, which indicates that the resonant inductor current peaks to about 1.7 A. This is also the maximum value of pump capacitor current I.sub.P at the maximum output power of the AC-DC power converter.

[0095] Error! Reference source not found. below summarizes specifications for the design of an exemplary inductor L.sub.RES of the series resonant tank (214) which are obtained from the circuit analysis and simulation results as described above.

TABLE-US-00002 TABLE II Parameter Specifications Inductance 156 μH Current Frequency  1 MHz Sinusoid Current Amplitude 1.7 A

[0096] When handling high frequency AC currents, a key factor to the inductor design is choosing the right core material. Several magnetic materials [6][7] are investigated and compared in terms of core losses at 1 MHz, as shown in Error! Reference source not found. FIG. 10, wherein the 3F46 material (Ferroxcube) may be chosen as it shows the lowest core losses at the design operating conditions.

[0097] The following equation was used to estimate the inductor core loss. The peak flux density in the core can be calculated from:

[00012]$\begin{array}{cc}{B}_{pk}=\frac{1}{N}.Math.\frac{I_{\mathrm{pk}}.Math.L}{A_e}& \left(22\right)\end{array}$

[0098] where N is the number of turns, I.sub.pk is the amplitude of the resonant current, L is the inductance, and A.sub.e is the effective core area. Considering that the core loss is a function of the peak flux density for a chosen material, the loss for a given number of turns and core size can be estimated. The following calculation of the DC resistance of the windings gives an estimate of the winding losses.

[0099] The total cross-sectional area of the windings may be calculated from:

A.sub.c=n.sub.wires.Math.π.Math.r.sub.wire.sup.2  (23)

[0100] where n.sub.wires is the number of strands of Litz wire and r.sub.wire is the wire radius. The DC resistance may then calculated from:

[00013]$\begin{array}{cc}{R}_{dc}={\rho }_{\mathrm{cu}}.Math.\frac{MLT.Math.N}{A_c}& \left(24\right)\end{array}$

[0101] where ρ.sub.cu is the copper resistivity and MLT is the mean length of turn. For an EFD 25/13/9 core size, with two parallel layers of 20*0.05 mm Litz wire, the DC resistance is 8.6 mΩ.Math.N. Next, AC resistance of the windings is calculated. The skin effect is negligible when using Litz wire at 1 MHz, but the proximity effect can have a significant influence on the closely wound wires. Modelling the AC resistance to be three times larger than the DC resistance estimates the winding losses to

[00014]$\begin{array}{cc}{P}_{cu}=R_{ac}.Math.I_{\mathrm{rms}}^2=3.Math.R_{dc}.Math.\frac{I_{\mathrm{pk}}^2}{2}=37\mathrm{mW}.Math.N& \left(25\right)\end{array}$

[0102] Based on these estimates, the inductor is designed with 52 turns, which helps distribute the losses evenly between the core and the windings and results in acceptable total losses. An airgap of 1.2 mm, distributed across the three legs of the core, adjusted the desired inductance.

[0103] FIG. 4A is a schematic electrical diagram of a second exemplary embodiment of the previously discussed AC-DC power converter 100a based on class-DE resonant inverter. Compared to the previously discussed first exemplary embodiment of the AC-DC power converter on FIG. 4, the present AC-DC power converter 101 additionally comprises a transformer T1 (no denotation) with a certain voltage conversion ratio to step-up or step-down the resonant inverter voltage V.sub.res. The transformer T1 provides galvanic isolation between primary side circuitry and secondary side circuitry of AC-DC power converter 100a and is coupled between the resonant output voltage V.sub.res and an input node 411a of the output rectification circuit 416a connected to diodes D.sub.R1 and D.sub.R2. As discussed above in connection with non-isolated AC-DC power converter 100a, the charge pump circuit comprises a pump capacitor C.sub.P, a smoothing capacitor C.sub.DC and pump diode D.sub.P. The pump capacitor C.sub.P is connected between the rectified line voltage V.sub.B and the resonant inverter voltage V.sub.REC produced by the class DE resonant inverter. Preferably, the electrical interconnection between the rectified line voltage V.sub.B and resonant inverter voltage V.sub.REC is based on capacitor only network, for example exclusively including the pump capacitor C.sub.P. This provides a compact and low-cost connection that may be based on standard, low cost and readily available capacitors as discussed below. Hence, the electrical interconnection between the rectified line voltage V.sub.B and resonant inverter voltage V.sub.REC is therefore preferably carried out without the use of any inductive coupling or component from the isolation transformer, T, such as a separate transformer winding, back to the rectified line voltage V.sub.B.

[0104] FIG. 9 shows inductor losses in the inductor L.sub.RES of the series resonant tank (214) vs. number of turns. Based on these estimates, L.sub.RES is preferably designed with about 52 turns, which helps distribute the losses evenly between the core and the windings and results in acceptable total losses. An airgap of 1.2 mm, distributed across the three legs of the core may be utilized to adjust the desired inductance. An experimental prototype of the AC-DC converter was implemented and assembled on a printed circuit board. Because of the charge pump circuit operation, high frequency AC current runs through the AC rectification circuit, or input bridge, The latter is therefore preferably implemented using four fast recovery diodes as rectification elements. With respect to selection of the high-side and low-side semiconductor switches Q.sub.HS and Q.sub.LS of the half-bridge 412 the inventors found gallium nitride FETs to show superior performance compared to the silicon super-junction and silicon carbide counterparts. However, the skilled person will appreciate that semiconductor switches may be used for the purpose based on design constraints imposed on any specific embodiment of the present AC-DC power converter. For the rectification circuit 416, including diodes D.sub.R1 and D.sub.R2, silicon carbide Schottky diodes may be employed because they show higher energy efficiency and thermal stability over the silicon counterparts.

[0105] Error! Reference source not found. shows a breakdown of the incorporated power stage components of the experimental prototype AC-DC power converter.

TABLE-US-00003 TABLE III Component Simulated Prototype Type L.sub.IN 100 μH 100 μH Inductor SLF7045 C.sub.IN 30 nF 2 * 15 nF Ceramic (C0G) Diode Bridge 4 * ESH1GMRSG Si Fast Recovery C.sub.DC 10 μF 1 * 10 μF Electrolytic 3 * 0.1 μF Ceramic (C0G) D.sub.P RF201LAM4S Si Fast Recovery C.sub.P 1.36 nF 2 * 680 pF Ceramic (C0G) Q.sub.HS, Q.sub.LS GS66502B GaN Switches L.sub.RES 156 μH 152 μH Custom design C.sub.RES 188 pF 220 pF Ceramic (C0G) D.sub.R1, D.sub.R2 GB01SLT06214 SiC Schottky C.sub.OUT 30 nF 2 * 15 nF Ceramic (C0G)

[0106] The experimental prototype AC-DC power converter was tested for operation from a mains voltage of 230 V.sub.RMS and running at converter switching frequencies between 0.96 MHz and 1.04 MHz. The latter frequency range lies within an inductive mode of operation for the resonant converter such that soft-switching operation, i.e. ZVS, of the class DC inverter was achieved.

[0107] FIG. 11 (top plot) shows the measured output power (left scale) and conversion efficiency (right scale) across the operational frequency range from 960 kHz to 1040 kHz of the experimental prototype AC-DC power converter. The depicted measurement results illustrate how output power modulation or control is achieved from 26 W to 50 W of output power through control of the switching frequency. At the same time a peak efficiency of 87.9% at 1.04 MHz switching frequency is achieved.

[0108] FIG. 11 (bottom plot) shows measured PFC results of the experimental prototype AC-DC power converter. The PFC results exhibit a peak power factor of 0.99 and minimum THD of 8.6% at an output power of 50 W and switching frequency of 960 kHz. The measured data shows that operation at lower frequencies, close to resonance of the series resonant tank with higher gain achieves higher power factor and lower THD. This is consistent with the analysis given in the previous sections.

[0109] FIG. 12 shows measured harmonics distribution of the mains line current at full-load operation and at half-load operation of the experimental prototype AC-DC power converter where THD figures of 8.6% and 17.4% are measured, respectively. Since one of the potential applications for the proposed converter is the rectifier or rectification circuit or stage in LED drivers, the figure illustrates the harmonics magnitudes against the IEC 61000-3-2 standard class-C device limits [1][2], where the histogram shows that the measured harmonics magnitudes are well-within the limits set by the IEC standard.

[0110] FIG. 13 shows line-frequency time domain waveforms of the experimental prototype AC-DC power converter. The experimental prototype AC-DC power converter is delivering an output or load power of 12.8 W and has a measured power factor of 0.99 and a THD of 9.1% for an average DC output voltage of 179 V with 20 V low-frequency ripple as illustrated by the V.sub.OUT waveform.

[0111] FIG. 14 shows measured harmonics distribution of the mains line current for the experimental prototype AC-DC power converter at 120 V_RMS and 230 V_RMS line voltage inputs against the IEC 61000-3-2 standard class-C device limits [1][2]. FIGS. 13 and 14 illustrate that a high power factor and low THD of the prototype AC-DC power converter are achieved with different line input voltages as the charge pump circuit works in the same manner.

REFERENCES

[0112] [1] IEC 61000-3-2, Fifth Edition, International Electrotechnical Commission, 2018. [0113] [2] EN 61000-3-2, European Committee for Electrotechnical Standardization, 2014. [0114] [3] X. Xie, C. Zhao, L. Zheng and S. Liu, “An Improved Buck PFC Converter With High Power Factor,” in IEEE Transactions on Power Electronics, vol. 28, no. 5, pp. 2277-2284, May 2013. [0115] [4] X. Wu, J. Yang, J. Zhang and M. Xu, “Design Considerations of Soft-Switched Buck PFC Converter With Constant On-Time (COT) Control,” in IEEE Transactions on Power Electronics, vol. 26, no. 11, pp. 3144-3152, November 2011. [0116] [5] D. C. Marian, K. Kazimierczuk, Resonant Power Converters, 2nd Edition ed., Wiley-IEEE Press, 2011. [0117] [6] Ferroxcube material datasheet—https://www.ferroxcube.com/upload/media/design/FXCStainmetzCoefficients.xls. [0118] [7] Micrometals material datasheet—https://micrometalsarnoldpowdercores.com/pdf/mix/Mix-6-DataSheet.pdf.