Abstract
A photonic buried interposer for converting light between a first optical mode of a first optical component and a second optical mode of a second optical component, the second optical component being larger than the first optical component; the buried interposer comprising a bi-layer taper, the bi-layer taper comprising: a top device layer comprising an upper tapered waveguide; and a bottom device layer comprising a lower tapered waveguide; wherein the upper tapered waveguide extends from a first end for coupling to the first optical component to a second end for coupling to the second optical component; and the lower tapered waveguide starts from an intermediate location between the first and second ends and extends from the intermediate location to the second end.
Claims
1. A photonic buried interposer for converting light between a first optical mode of a first optical component and a second optical mode of a second optical component, the second optical component being larger than the first optical component; the photonic buried interposer comprising a bi-layer taper, the bi-layer taper comprising: a top device layer comprising an upper tapered waveguide; and a bottom device layer comprising a lower tapered waveguide; wherein the upper tapered waveguide extends from a first end for coupling to the first optical component to a second end for coupling to the second optical component; and the lower tapered waveguide starts from an intermediate location between the first and second ends and extends from the intermediate location to the second end.
2. The photonic buried interposer of claim 1, wherein the upper tapered waveguide is a rib waveguide.
3. The photonic buried interposer of claim 1, wherein the upper tapered waveguide has a linear taper between the first optical component and the intermediate location.
4. The photonic buried interposer of claim 1, wherein the upper tapered waveguide and/or the lower tapered waveguide has a nonlinear taper between the intermediate location and the second optical component.
5. The photonic buried interposer of claim 1, wherein the first optical component is an integrated waveguide.
6. The photonic buried interposer of claim 5, wherein the first optical component is a 3 μm rib waveguide.
7. The photonic buried interposer of claim 1, wherein the second optical component is an optical fiber.
8. The photonic buried interposer of claim 1, wherein the upper tapered waveguide is formed of silicon.
9. The photonic buried interposer of claim 1, wherein the lower tapered waveguide is formed of silicon.
10. The photonic buried interposer of claim 8, wherein the upper tapered waveguide is formed from epitaxially grown silicon.
11. The photonic buried interposer of claim 1, wherein the minimum width of the lower tapered waveguide is more than 1 μm.
12. The photonic buried interposer of claim 1, wherein, at the intermediate location, the width of the lower tapered waveguide is between ⅙.sup.th and ⅓.sup.rd of the width of the upper tapered waveguide at the intermediate location.
13. The photonic buried interposer of claim 1, wherein the shape parameter, α has a value of no less than 0.3 and no more than 0.4.
14. A method of fabricating a photonic buried interposer for converting light between a first optical mode of a first optical component and a second optical mode of a second optical component, the second optical component being larger than the first optical component; the method comprising: creating a bi-layer taper, the bi-layer taper comprising: a top device layer including an upper tapered waveguide; and a bottom device layer including a lower tapered waveguide; wherein the upper tapered waveguide extends from a first end for coupling to the first optical component to a second end for coupling to the second optical component; and the lower tapered waveguide starts from an intermediate location between the first and second ends and extends from the intermediate location to the second end.
15. The method of claim 14, wherein the upper tapered waveguide is at least partially formed from epitaxially grown silicon.
Description
BRIEF DESCRIPTION OF THE DRAWINGS
[0032] These and other features and advantages of the present invention will be appreciated and understood with reference to the specification, claims, and appended drawings wherein:
[0033] FIG. 1A shows an example of a photonic buried interposer which forms a part of the prior art;
[0034] FIG. 1B shows a schematic example of a photonic buried interposer according to an embodiment of the present invention;
[0035] FIG. 2 shows a further embodiment of a photonic buried interposer according to the present invention, with example measurements. FIG. 2 also shows the results of simulation calculations to determine insertion loss (IL) at various locations along the lateral direction of the buried interposer. Insertion loss has been calculated for a range of different tip widths;
[0036] FIG. 3 shows further simulations for the photonic buried interposer of FIG. 2 with example measurements and also results of simulation calculations to determine polarization dependent loss (PDL) at various locations along the lateral direction of the buried interposer. PDL has been calculated for a range of different tip widths;
[0037] FIG. 4A shows a top view of an embodiment of the present invention and contains example dimensions at given points with reference to FIG. 4A whilst FIG. 4B shows a side view of the embodiment of FIG. 4A;
[0038] FIG. 5A and FIG. 5B each depict simulation measurements made at points S0 and S1 respectively on the embodiment shown in FIG. 4A;
[0039] FIG. 6 shows simulation data for insertion loss and polarization dependent loss as a function of width;
[0040] FIG. 7A depicts a plot of transmission vs width at the second end of the interposer;
[0041] FIG. 7B shows a simulation of a mode at stage S2 of the interposer contrasted with a simulation of a Gaussian mode in FIG. 7C such as that which may be found in an optical fiber;
[0042] FIG. 8 shows a top view of an embodiment of the present invention, a corresponding top view, and examples of possible taper parameters for an embodiment of the present invention;
[0043] FIG. 9A shows an embodiment of an interposer and FIG. 9B shows a simulation of insertion loss vs length in the single layer region from S0 to S1 as shown in FIG. 9A; and
[0044] FIG. 10A shows an alternative view of the embodiment of FIG. 9A with the bi-layer section from S1 to S2 highlighted along with simulation results for a range of parameters; and FIG. 10B shows calculations of transmission and polarization dependent loss for various parameters including the example widths shown in FIG. 10A.
DETAILED DESCRIPTION
[0045] The detailed description set forth below in connection with the appended drawings is intended as a description of exemplary embodiments of a photonic buried interposer provided in accordance with the present invention and is not intended to represent the only forms in which the present invention may be constructed or utilized. The description sets forth the features of the present invention in connection with the illustrated embodiments. It is to be understood, however, that the same or equivalent functions and structures may be accomplished by different embodiments that are also intended to be encompassed within the spirit and scope of the invention. As denoted elsewhere herein, like element numbers are intended to indicate like elements or features.
[0046] A first embodiment of a photonic buried interposer is shown in FIG. 1B. The photonic buried interposer includes a bi-layer taper which includes a top device layer and a bottom device layer, the top device layer comprising an upper tapered waveguide, and the bottom device layer including a lower tapered waveguide.
[0047] The upper tapered waveguide 21 extends from a first end S0 of the interposer which is configured to couple to a first optical component to a second end S2 of the interposer which is configured to couple to a second optical component, the second optical component having a larger width as compared to the first optical component. Unlike prior art designs such as that shown in FIG. 1A, the lower tapered waveguide 22 does not extend from the first end to the second end of the interposer. Instead of starting at the first end, it starts at an intermediate location S1, the intermediate location being between the first end and the second end. The lower tapered waveguide 22 extends from the intermediate location, along the longitudinal axis of the tapered waveguide to the second end S1 of the interposer. As can be seen from FIG. 1B, the interposer therefore contains a first region from the first end S0 to the intermediate location S1 which includes only a single tapered layer, and a second region from the intermediate location S1 to the second end S2 which is made up of a bi-layered taper. It has been found that this act of moving the start of the lower taper to an intermediate location gives rise to the advantage that the width of the lower taper is less crucial; it is possible to relax the width of the lower taper without suffering severe optical losses. This is not possible in the prior art design of FIG. 1A.
[0048] At the second end S2 of the interposer, the width of the upper taper 21 is the same as or substantially the same as the width of the lower taper 21.
[0049] The depth of the upper taper may be 3 μm. This is typically formed from the silicon layer of an SOI substrate, or may be epitaxially grown. Advantageously, this can couple to a 3 μm SOI waveguide 11 such as a rib waveguide, which may form the first optical component. The depth of the bottom taper at the second end (for coupling to the larger optical component) may be up to 10 μm. In the embodiment shown here, the lower taper is also formed from silicon. The second optical component may take the form of an optical fiber.
[0050] A further embodiment of a buried interposer is now described in relation to FIG. 2. Example measurement parameters are shown in the figure, from which it can be seen that the upper taper layer may be formed from an epitaxially grown 3 μm Si layer (on a 400 nm buried oxide (BOX) layer) and the lower taper from a native 3.1 μm silicon layer (on a 300 nm BOX layer). The table included in FIG. 2 shows the results of simulation calculations for this embodiment to determine insertion loss (IL) at various locations along the lateral direction of the buried interposer. Insertion loss has been calculated for a range of different tip widths ranging from 1 μm to 1.4 μm. Total insertion loss values for these tip widths range from 0.30 to 0.35 dB. This compares favourably with the insertion loss of 0.29 dB measured for the pre-existing design (such as that of FIG. 1A) which requires a tip width of only 0.5 μm.
[0051] FIG. 3 shows corresponding calculations of polarization dependent loss (PDL) calculated for the same embodiment. Again, as can be seen from the table within FIG. 3, the width of the bottom taper can be relaxed whilst still avoiding unacceptable losses.
[0052] Examples of taper widths are described below with reference to FIGS. 4A and 4B. The widths may be selected for a specific wavelength of range of wavelengths. In the embodiment shown in FIGS. 4A and 4B, the width of the upper tapered waveguide at the first end S0 of the interposer is 2.6 μm. At the intermediate location S1, an example width of the upper tapered waveguide wTop is 6 μm, whereas the lower tapered waveguide will have a width which is less than a third of the value of the upper tapered waveguide. In the embodiment shown, example widths wBot of the lower tapered waveguide at the intermediate location S1 where it begins are given as: 1 μm, 1.2 μm and 1.4 μm. The relative widths of any one of these examples is shown schematically in FIG. 4B, from which it can be seen that the upper tapered layer is significantly wider than the lower tapered layer, the upper taper extending laterally over the lower taper by equal amounts on either side of the waveguide. That is to say, in the region from the intermediate location S1 to the second end S2, the upper tapered waveguide and lower tapered waveguide lie directly on top of one another so that the longitudinal axis of the upper tapered waveguide is located directly above and in line with the longitudinal axis of the lower tapered waveguide.
[0053] FIG. 5A and FIG. 5B each depict simulation measurements made at the first end of the interposer (S0) and the second end of the interposer (S1) respectively.
[0054] FIG. 6 shows simulation data for insertion loss (upper four plots) and polarization dependent loss (lower four plots) as a function of width wTop of the upper tapered waveguide at the intermediate location S1.
[0055] FIG. 7A shows a plot of transmission vs width of the upper and lower tapered waveguides (wTop, wBot) at the second end of the interposer (at which point wTop=wBot). The calculations are carried out and plotted separately for TE and TM polarizations. Simulations of the mode profile are shown in FIG. 7B, which relates to the mode at stage S2 of the interposer and in FIG. 7C, which shows a simulation of a standard Gaussian mode.
[0056] FIG. 8 depicts the effect of shape parameter a on the operation of the interposer. In the example shown, the single layer tapered section of the interposer from the first end S0 to the intermediate location S1 is linear. However, the bi-layer tapered section from the intermediate location S1 to the second end S2 is non-linear. Different example values of the shape parameter a include: 1.2 μm and 1.4 μm.
[0057] The effect of the length L01 of the single layer portion of the interposer can be understood with reference to FIG. 9A and FIG. 9B, which show transmission vs length. These calculations were made for a simple adiabatic linear taper in native 3 μm silicon. The upper taper had a width at the first end (w0Top) of 2.6 μm and a width at the intermediate location (w1Top) of 6 μm. It has been discovered that, under these conditions, for a length of 200 μm, it is possible to achieve an insertion loss of less than 0.01 dB. This shows that a simple linear design is sufficient to achieve low losses in a short length for the first section.
[0058] FIG. 10A shows an alternative view of the embodiment of FIG. 9A with the bi-layer section from S1 to S2 highlighted along length L12, examples of different measurement parameters for this bi-layer section are shown in the table below. The effect of these parameters can be seen in the simulation plots of FIG. 10B. The top three plots show transmission vs width for three different taper widths (at the intermediate location S1) of 1 μm, 1.2 μm, and 1.4 μm for a range of shape parameter values. The lower three plots show polarization dependent loss vs length L12 for each of the same taper widths 1 μm, 1.2 μm, and 1.4 μm for a range of shape parameter values.
[0059] Although exemplary embodiments of a photonic buried interposer have been specifically described and illustrated herein, many modifications and variations will be apparent to those skilled in the art. Accordingly, it is to be understood that a photonic buried interposer constructed according to principles of this invention may be embodied other than as specifically described herein. The invention is also defined in the following claims, and equivalents thereof.
