RADIO FREQUENCY POWER AMPLIFIER

Abstract

A balanced amplifier system having input and output quadrature couplers or equivalents thereof and two amplifiers there between. An RF signal is presented to a first input of an input quadrature coupler such that an amplified RF signal is output at a first output of the output quadrature coupler. A RF control signal is presented to a second input of the quadrature coupler such that an amplified control signal is outputted at the other output of the output quadrature coupler. The system is configured to reflect the amplified signal back into the second port of the output quadrature coupler in order to vary an impedance seen by the amplifiers of the balanced amplifier.

Claims

1. A radio frequency power amplifier system for amplifying an RF signal, the system comprising: a balanced amplifier having an input quadrature coupler, an output quadrature coupler, and two amplifiers there-between; the output quadrature coupler having a first output at which the amplified RF signal will be output; means to modify and/or modulate an impedance at outputs of the two amplifiers, said means including: a radio frequency control signal source connected to the two amplifiers and configured to provide an RF control signal that will be amplified by the two amplifiers such that an amplified RF control signal will be output at a second output of the output quadrature coupler; and a signal reflector connected to the second output of the output quadrature coupler and arranged to reflect the amplified RF control signal back to the second output of the output quadrature coupler.

2. A radio frequency power amplifier system according to claim 1, wherein the input quadrature coupler has a first input for receiving a RF input signal to be amplified; wherein the radio frequency control signal source is connected to a second input of the input quadrature coupler to provide the RF control signal to the second input of the input quadrature coupler such that the amplified RF control signal will be output at the second output of the output quadrature coupler.

3. A radio frequency power amplifier system according to claim 2, wherein the radio frequency control signal source is configured to provide the RF control signal with a frequency that is substantially the same as the RF input signal.

4. A radio frequency power amplifier system according to any claim 3, comprising: means to modify a phase and/or amplitude of the RF control signal and/or the amplified RF control signal.

5. A radio frequency power amplifier system according to claim 4, wherein the means to modify the phase and/or amplitude of the RF control signal and/or the amplified RF control signal comprises: a phase shifter to shift a phase of the RF control signal entering the second input of the input quadrature coupler.

6. A radio frequency power amplifier system according to claim 5, wherein the signal reflector comprises: a reactive load.

7. A radio frequency power amplifier system according to claim 6, wherein the reactive load is a tuneable reactive load; and the radio frequency power amplifier system comprises: a controller connected to the tuneable reactive load and configured to tune the reactive load to vary a phase of the reflected amplified RF control signal.

8. A radio frequency power amplifier system according to claim 7, wherein the tuneable reactive load comprises: a switched capacitor network and/or switched inductor network.

9. A radio frequency power amplifier system according to claim 8, comprising: a signal generator having a first generator output and a second generator output, the signal generator including one or more processors configured to run a computer program that will cause the computer to: digitally generate an RF signal for output at the first generator output; and digitally generate the RF control signal for output at the second generator output.

10. A radio frequency power amplifier system according to claim 9, wherein the input quadrature coupler is implemented by the signal generator, the signal generator being configured to: digitally generate a first RF signal for output at the first output of the signal generator that corresponds to a desired signal at a first output of the input quadrature coupler for receipt by a first amplifier of the two amplifiers, and digitally generate a second RE signal for output at the second output of the signal generator that corresponds to a desired signal at a second output of the input quadrature coupler for receipt by a second amplifier of the two amplifiers.

11. A method to modify and/or modulate an impedance at outputs of two amplifiers of a balanced amplifier arranged to amplify a radio frequency (RF) signal, the balanced amplifier having an output quadrature coupler, an amplified RE signal being outputted at a first output of the output quadrature coupler, the method comprising: using a radio frequency control signal source connected to the two amplifiers to provide a radio frequency (RE) control signal that is amplified by the two amplifiers of the balanced amplifier, such that an amplified RF control signal is outputted at a second output of the output quadrature coupler; and reflecting the amplified RF control signal outputted from the second output of the output quadrature coupler back to the second output of the output quadrature coupler.

12. The method of claim 11, comprising: inputting an RE input signal to be amplified into a first input of an input quadrature coupler of the balanced amplifier; and inputting an RF control signal into a second input of the input quadrature coupler to provide a RF control signal to the second input of the input quadrature coupler such that the amplified RF control signal is outputted at a second output of the output quadrature coupler.

13. A method according to claim 12, comprising: modifying a phase and/or amplitude of the RE control signal and/or the amplified RE control signal relative to the RE input signal.

14. A radio frequency power amplifier system according to claim 1, wherein the signal reflector comprises: a reactive load.

15. A radio frequency power amplifier system according to claim 14, wherein the reactive load is a tuneable reactive load; and the radio frequency power amplifier system comprises: a cant oiler connected to the tuneable reactive bad and configured to tune the reactive load to vary a phase of the reflected amplified RF control signal.

16. A radio frequency power amplifier system according to claim 15, wherein the tuneable reactive bad comprises: a switched capacitor network and/or switched inductor network.

17. A radio frequency power amplifier system according to claim 16, comprising: a signal generator having a first generator output and a second generator output, the signal generator including one or more processors configured to run a computer program that will cause the computer to: digitally generate an RF signal for output at the first generator output; and digitally generate the RF control signal for output at the second generator output.

18. A radio frequency power amplifier system according to claim 17, wherein the input quadrature coupler is implemented by the signal generator, the signal generator being configured to: digitally generate a first RF signal for output at the first output of the signal generator that corresponds to a desired signal at a first output of the input quadrature coupler for receipt by a first amplifier of the two amplifiers; and digitally generate a second RF signal for output at the second output of the signal generator that corresponds to a desired signal at a second output of the input quadrature coupler for receipt by a second amplifier of the two amplifiers.

Description

[0033] The invention will now be described by way of example with reference to the following figures:

[0034] FIG. 1 is a schematic of a radio frequency power amplifier system; and

[0035] FIG. 2 is a variant of the power amplifier system of FIG. 1 in which the function of the input quadrature coupler and phase shifter is carried out by a digital signal generator.

[0036] Referring to the FIG. 1 the radio frequency power amplifier system comprises a balanced amplifier 1 having an input quadrature coupler 2, an output quadrature coupler 3, and amplifying circuit there between comprising two amplifiers 4, 5. In this embodiment the two amplifiers 4, 5 are 3W single transistors though more complex arrangements and/or different power levels may be used.

[0037] The amplifying circuit also includes an input matching network 6 and an output matching network 7 associated with each amplifier, together with independent DC voltage sources 8,9 for biasing the transistor amplifiers. The amplifying circuit is in itself of conventional design and so will not be described in further detail.

[0038] The input quadrature coupler 1 has a first input port 2{circle around (4)} for receiving an RF input signal to be amplified from an input signal source 10, a second input port 2{circle around (2)} (which in a conventional balanced amplifier would be terminated in a matched load) for receiving a RF control signal from a control signal source 11, and first and second outputs 2{circle around (3)}, 2{circle around (1)}.

[0039] In the example of FIG. 1, the input signal source 10 and the control signal source 11 comprise separate second signal generators, the signal generators being phase locked. This is typically preferred as it provides independent amplitude and phase control. Alternatively, however, the input and control signal sources 10, 11 may be provided by a single signal generator and a splitter that splits the signal outputted from the single signal generator to provide the input signal and control signal. In the latter system there may be provided additional amplifier circuits and/or attenuator circuits and/or phase control circuits to provide independent control of the amplitude and/or phase of the input and control signals. Irrespective of the mode of generating the input signal and control signal, it is preferred that they have the same frequency.

[0040] The input quadrature coupler 2 splits the input signal received at the first input 2{circle around (4)} to both outputs 2{circle around (3)}, 2{circle around (1)}; the input signal at 2{circle around (1)} having undergone a ninety degree phase shift. Similarly, the input quadrature coupler 2 splits the received control signal at the second input 2{circle around (2)} to both outputs 2{circle around (3)}, 2{circle around (1)}, the control signal at the first output 2{circle around (3)} undergoing a ninety degree phase shift. As such, the signal at the first output 2{circle around (3)} is a superposition of the input signal at phase angle 0 and the control signal shifted by a phase angle of −90 degrees. The signal leaving the second output 2{circle around (1)} is a superposition of the control signal at phase angle 0 and the input signal shifted by a phase angle of −90 degrees.

[0041] The signals at the outputs 2{circle around (3)}, 2{circle around (1)} are fed to the respective amplifiers 4, 5 of the amplifying circuit. The outputs of the amplifiers 4,5 are in turn fed to respective first input port 3{circle around (4)} and second input port 3{circle around (2)} of the output quadrature coupler 3.

[0042] The output coupler 3 applies the same function to the signals received at its inputs 3{circle around (4)},3{circle around (2)} as the input coupler (as is conventional in a balanced amplifier). As such, the input signal, now amplified, is outputted at a second output 3{circle around (1)} for input to a load 12, e.g. an antenna or other circuit fragment, connected to the second output 3{circle around (1)} to receive the output of the power amplifier.

[0043] The output coupler 3 provides at its first output 3{circle around (3)} the control signal, amplified. The first output 3{circle around (3)} of the output coupler 3 is connected to a tuneable reactive load 13 adapted to preferentially reflect the amplified control signal back into the first output 3{circle around (3)} of the output coupler 3. This is in contrast with a conventional design of balanced amplifier in which the first output is terminated with a matched load.

[0044] For the reasons expounded in GB2533824A, presenting a signal to the first output 3{circle around (3)} of the output coupler acts to modulate the impedance at the outputs of the two amplifiers 4,5. Through control of amplitude and phase of the reflected amplified control signal it is possible to vary the impedance at the amplifier outputs 4,5 so that optimum efficiency is maintained as the power and frequency of the input signal from signal source 10 varies.

[0045] Modification of the amplitude and/or phase of the control signal reflected back into the second output port 3{circle around (3)} can be performed in two ways which may be used together or separately.

[0046] The phase of the control signal outputted from the control signal source 11 is modifiable using a phase shifter 14 (under control of controller 15) arranged between the control signal source 11 and input coupler 2 and which outputs a phase shifted control signal to the second input 2{circle around (2)} of the input coupler 2. The phase shifter 14 may be a variable or fixed phase shifter (or a variable or fixed delay line).

[0047] The phase of the control signal reflected back towards the first output 3{circle around (3)} of the output coupler 3 is also adjustable by varying the reactance of the reactive load 13. The reactive load 13 comprises a switched capacitive network and/or a switched inductive network connected to the controller 15 (illustrated twice in FIG. 1 to simplify the drawing layout). The controller 15 switches the various capacitors and/or inductors within the respective networks in order to vary the reactive load's effective reactance.

[0048] The controller 15 used to control the reactive load 11 and phase shifter 14 is implemented using as one or more suitably programmed processors using techniques familiar to those skilled in the art.

[0049] In order to terminate any reflected power from the input coupler 2, both the control signal source 11 and input signal source 10 comprise a load that is impedance matched to the input coupler 2.

[0050] FIG. 2 illustrates a variant design of power adaptor comprising a digital signal generator 20 that calculates and generates both the input signal and control signal and additionally implements the functions of the input quadrature coupler 2 and phase shifter 14.

[0051] The digital signal generator 20 is implemented at least in part using digital signal processing system by one or more suitably programmed processors running one or more computer programs.

[0052] The digital signal generator 20 is arranged to calculate and output at a first output 21 for receipt by the first amplifier 4, a first signal that corresponds the desired output signal at first output 2{circle around (3)} of the input coupler of FIG. 1. The digital signal generator 20 is also arranged to calculate and output at a second output 22 for receipt by the second amplifier 5 a second signal corresponding to the desired output signal at second output 2{circle around (1)} of the input coupler of FIG. 1.

[0053] Although the preceding explanation is based around a conventional balanced amplifier the inclusion of a second, phase variable, input source enables the system to achieve a degree of outphasing much like that of a system using a Chireix outphasing amplifier. With the presented architecture, outphasing is achieved through the reflection of power from the reflected load where the amplitude and phase of the reflected signal is set by the phases of the main input signal and second signal source presented at the input of the amplifier.

[0054] It is also possible that the output matching networks 7 may not be identical so as to provide complementary loading to the two amplifiers 4,5 (for instance one output matching network presenting a positively reactive load to one amplifier whilst the other output matching network presents a negatively reactive load to the other amplifer). This, in combination with tuning of the control signal modify the impedance presented to the amplifiers 4,5 allows for a high efficiency outphasing amplifier that will maintain high efficiency whilst operating at sub maximum amplification but with significant improvements to the impedance modulation capability as compared to existing implementation of Chirex amplifiers, due to the fixed or tuneable reactive load 13 presented at the output coupler 3. Since the amplifier is still in a balanced configuration, power extraction requires a conventional and more practical output load referenced to ground.

[0055] In the aforementioned embodiments the amplifiers 4, 5 have the same DC voltage at their input and output as provide by DC sources 8,9, In a variation each amplifier 4, 5 can be independently controlled by different voltages at their respective inputs and outputs to allow a different mode of operation; such an arrangement would require separate DC voltage sources for each amplifier 4,5.

[0056] In an further alternative embodiment, the system may omit one or both impedance matching networks 6,7 and use the means described above to control amplitude and phase of the reflected amplified signal to tune for transistor parasitic effects such as output capacitance.

[0057] The amplifier described variously above may be implemented as an integrated circuit e.g. RFIC or MIMIC manufactured from, for example GaAs or GaN semiconductor, though it could be implemented partly or exclusively of discrete components.

[0058] The phase offset setting and amplitude of the control signal required to provide the desired output at the second output of the output coupler for any given frequency of operation can be determined through calibration of the design (or each unit) before operation. The controller 15 can then be pre-programmed with the determined control signal gain/phase settings. The system may alternatively include a power and frequency monitor (not shown) at the amplifier system input and/or output port and dynamically control the control signal gain/phase settings through feedback software routines to dynamically optimise the transistor(s) drain impedance so as to improve power and/or efficiency.