ELECTRONIC COMPONENT MOUNTING STRUCTURE AND METHOD FOR MANUFACTURING SAME
20230328895 · 2023-10-12
Inventors
- Takashi KITAHARA (Nagaokakyo-shi, JP)
- Kensuke OTAKE (Nagaokakyo-shi, JP)
- Kyo SHIN (Nagaokakyo-shi, JP)
Cpc classification
B23K35/0205
PERFORMING OPERATIONS; TRANSPORTING
H05K3/3463
ELECTRICITY
B23K35/26
PERFORMING OPERATIONS; TRANSPORTING
H05K3/3436
ELECTRICITY
H05K1/18
ELECTRICITY
International classification
Abstract
The present disclosure is directed to an electronic component mounting structure including: a circuit board provided on a surface thereof with a first electrode containing Cu as a main component; and an electronic component mounted on the circuit board, the electronic component including a second electrode on a surface thereof; wherein the second electrode includes a first plating containing Ni as a main component and a second plating containing Sn as a main component formed on a surface of the first plating, and an intermediate bonding layer is provided between the first plating and the first electrode, and the intermediate bonding layer includes a first region containing an alloy of Cu and Sn as a main component and a second region containing Sn as a main component.
Claims
1. An electronic component mounting structure comprising: a circuit board having a first electrode, the first electrode being provided on a surface of the circuit board and containing Cu as a main component; and an electronic component mounted on the circuit board and having a second electrode, the second electrode being provided on a surface of the electronic component; wherein the second electrode includes a first plating containing Ni as a main component and a second plating containing Sn as a main component, the second plating being formed on a surface of the first plating, and an intermediate bonding layer is provided between the first plating and the first electrode, and the intermediate bonding layer includes a first region containing an alloy of Cu and Sn as a main component and a second region containing Sn as a main component.
2. The electronic component module according to claim 1, wherein an alloy of Ni and Sn is provided between the first plating and the second plating.
3. The electronic component module according to claim 1, wherein, when a cross section of the intermediate bonding layer is observed, a ratio between an area of the first region and an area of the second region is in a range of 40%:60% to 70%:30%.
4. The electronic component module according to claim 1, wherein the intermediate bonding layer extends i) from a bottom surface of the electronic component to about half a height of a side surface of the electronic component, ii) from the bottom surface to an entirety of the side surface, or iii) from the bottom surface through the entirety of the side surface to about a half of a top surface of the electronic component.
5. A method for manufacturing an electronic component mounting structure includes steps of: preparing a circuit board having a first electrode, the first electrode being provided on a surface of the circuit board and containing Cu as a main component; preparing an electronic component having a second electrode, the second electrode being provided on a surface of the electronic component and including a first plating containing Ni as a main component and a second plating containing Sn as a main component, the second plating being formed on a surface of the first plating; applying a flux to a surface of one or both of the first electrode and the second plating; mounting the electronic component on the circuit board and bringing the first electrode and the second plating into contact with each other; and heating the circuit board and the electronic component to form an intermediate bonding layer between the first electrode and the first plating, the intermediate bonding layer including a first region containing an alloy of Cu and Sn as a main component and a second region containing Sn as a main component.
6. The method according to claim 5, wherein the intermediate bonding layer extends i) from a bottom surface of the electronic component to about half a height of a side surface of the electronic component, ii) from the bottom surface to an entirety of the side surface, or iii) from the bottom surface through the entirety of the side surface to about a half of a top surface of the electronic component.
Description
BRIEF DESCRIPTION OF THE SEVERAL VIEWS OF THE DRAWINGS
[0012]
[0013]
[0014]
[0015]
[0016]
DETAILED DESCRIPTION OF THE DISCLOSURE
[0017] One aspect of the present disclosure is an electronic component mounting structure including: a circuit board provided on a surface thereof with a first electrode containing Cu as a main component; and an electronic component mounted on the circuit board, the electronic component including a second electrode on a surface thereof; wherein the second electrode includes a first plating containing Ni as a main component and a second plating containing Sn as a main component formed on a surface of the first plating, and an intermediate bonding layer is provided between the first plating and the first electrode, and the intermediate bonding layer includes a first region containing an alloy of Cu and Sn as a main component and a second region containing Sn as a main component.
[0018] According to this configuration, the melting point of the intermediate bonding layer is made relatively high. As a result, the solder splash at the time of mounting on a motherboard can be reduced.
[0019] In the present disclosure, an alloy of Ni and Sn may be provided between the first plating and the second plating.
[0020] According to this configuration, the bonding strength between the first plating and the second plating is increased by the presence of the alloy of Ni and Sn between the first plating and the second plating.
[0021] In the present disclosure, when a cross section of the intermediate bonding layer is observed, a ratio between an area of the first region and an area of the second region may be in a range of 40%:60% to 70%:30%.
[0022] According to this configuration, the melting point of the intermediate bonding layer is made higher than 217° C., and the bonding strength of the intermediate bonding layer can also be secured to a practical numerical value.
[0023] A method for manufacturing an electronic component mounting structure according to another aspect of the present disclosure includes steps of: preparing a circuit board provided on a surface thereof with a first electrode containing Cu as a main component; preparing an electronic component including a second electrode on a surface thereof, the second electrode including a first plating containing Ni as a main component and a second plating containing Sn as a main component formed on a surface of the first plating; applying a flux to a surface of one or both of the first electrode and the second plating; mounting the electronic component on the circuit board and bringing the first electrode and the second plating into contact with each other; and heating the circuit board and the electronic component to form an intermediate bonding layer between the first electrode and the first plating, the intermediate bonding layer including a first region containing an alloy of Cu and Sn as a main component and a second region containing Sn as a main component.
[0024] According to this configuration, the melting point of the intermediate bonding layer is made relatively high. As a result, the solder splash at the time of mounting on a motherboard can be reduced.
First Embodiment
[0025]
[0026] A description will be given along a procedure for manufacturing the electronic component mounting structure. First, as shown in
[0027] The first electrode 11 is formed of a conductive material containing Cu as a main component, and may be, for example, a Cu single layer, or a multilayer conductive layer of a Cu layer and various metals, for example, a metal layer of Ni, Au, or the like. In the case of such a multilayer conductive layer, the uppermost layer may be a Cu layer, and Sn plating may be provided thereon. The thickness of the first electrode 11 is set in a range of, for example, 5 to 30 μm.
[0028] The electronic component 20 is, for example, a capacitor, an inductor, a resistor, an integrated circuit, or the like, and here, a surface mount device (SMD) type ceramic component is exemplified. The electronic component has a component electrode 20a (see
[0029] Here, the phrase “containing X as a main component” means that the metal or alloy having the largest mass % in the metal composition is X. In addition, the term “plating” is a type of surface treatment, which means a method of coating a metal thin film on a surface of a metal or non-metal material or the metal thin film itself, and for example, electroless plating, electrolytic plating, hot dip plating, or vacuum plating (vacuum deposition, sputtering, ion plating) can be used.
[0030] Next, a flux FL is applied onto the first electrode 11 before the electronic component 20 is placed on the circuit board 10. The flux FL has a function of removing oxides and harmful substances generated during metal welding and a function of holding electronic components, and for example, rosin (pine resin), polyalkylene glycol, glycerin, and the like can be used. The flux FL may be applied to the surface of one or both of the first electrode 11 and the second plating 22.
[0031] Next, the electronic component 20 is mounted on the circuit board 10 using a chip mounter or the like, and the first electrode 11 and the second plating 22 are brought into contact with each other.
[0032] Next, the circuit board 10 on which the electronic component 20 is mounted is put into a heating furnace, and then the circuit board 10 and the electronic component 20 are heated. When the temperature in the furnace reaches a predetermined temperature, as shown in
[0033] The intermediate bonding layer 30 includes a first region containing an alloy of Cu and Sn as a main component and a second region containing Sn as a main component. In addition, the interface between the first plating 21 and the second plating 22 of the electronic component 20 is also partially alloyed, and then the alloy layer 23 of Ni and Sn is formed.
[0034]
[0035]
[0036] As shown in
[0037] The respective component electrodes 20a are provided in an L-shape at the lower left corner and the lower right corner of the electronic component 20. A first plating 21 is formed in an L-shape on an outer surface of the component electrode 20a. The first electrode 11 of the circuit board 10 is positioned below the first plating 21. 10 The intermediate bonding layer 30 is positioned between the first electrode 11 and the first plating 21. It should be noted that although an alloy layer 23 of Ni and Sn is present on the outer surface of the first plating 21, the thickness thereof is considerably small and is not shown in the image.
[0038] As shown in
[0039] In addition, the melting point of Sn is 240° C., and the melting point of the Cu.sub.6Sn.sub.5 alloy is 415° C., which are higher than the melting point (217° C.) of the lead-free solder. As a result, when the module including the circuit board 10 mounted with the electronic component 20 is mounted on the motherboard by reflow soldering, the intermediate bonding layer 30 is less likely to be remelted, and the solder splash can be reduced.
[0040] The compositions of the first region D1 and the second region D2 can be measured using energy dispersive X-ray analysis (EDX). Table 1 below shows an example of measurement results.
TABLE-US-00001 TABLE 1 FIRST REGION D1 SECOND REGION D2 ELEMENT (percent by mass) (percent by mass) C 8.0 5.2 N 1.6 3.3 O 5.2 6.5 Al 0.7 0.6 Si 2.0 1.9 Ni 4.2 1.3 Cu 30.4 3.8 Ag 0 0 Sn 48.1 77.6
[0041] Next, the ratio between the area S1 of the first region D1 and the area S2 of the second region D2 can be calculated from the image in
[0042] The present disclosure is industrially remarkably useful in that the solder splash at the time of mounting on a motherboard can be reduced.
[0043] 10 circuit board
[0044] 11 first electrode
[0045] 20 electronic component
[0046] 20a component electrode
[0047] 21 first plating
[0048] 22 second plating
[0049] 23 alloy layer
[0050] 30 intermediate bonding layer
[0051] D1 first region
[0052] D2 second region
[0053] FL flux