MULTIJUNCTION SOLAR CELLS WITH LIGHT SCATTERING LAYER

20230327045 · 2023-10-12

    Inventors

    Cpc classification

    International classification

    Abstract

    A multijunction solar cell including an upper first solar subcell having a first band gap and positioned for receiving an incoming light beam; a second solar subcell disposed below the upper first solar subcell, and having a second band gap smaller than said first band gap; wherein a light scattering layer is provided below the second solar subcell and adjacent to the second solar subcell for redirecting the incoming light that has passed through the second solar subcell back into the second solar subcell to be scattered along longer path lengths in the second solar subcell.

    Claims

    1. A method of manufacturing a multijunction solar cell comprising: providing a semiconductor growth substrate; depositing a sequence of layers of semiconductor material on the growth substrate in an MOCVD reactor forming a plurality of solar subcells; forming a light scattering layer over the last deposited solar subcell by changing the growth conditions of the light scattering layer in the MOCVD reactor; depositing a metallic layer over the light scattering layer; mounting and bonding a surrogate substrate to the metallic layer; and removing the semiconductor growth substrate.

    2. A method as defined in claim 1, wherein the light scattering layer is formed by depositing the layer in a temperature range of to 450 to 600° C.

    3. A method as defined in claim 1, wherein the light scattering layer comprises discrete periodic or non-periodic arrayed elements having a height of 200-500 nm, a width of 200-500 nm, and a pitch of 200-500 nm.

    4. A method as defined in claim 1, wherein the light scattering layer is formed by electron beam lithography.

    5. A method as defined in claim 1, wherein the light scattering layer is formed by nanoimprint lithography.

    6. A method as defined in claim 1, wherein the light scattering layer is formed by nanoparticle self-assembly.

    7. A method as defined in claim 1, wherein the light scattering layer is formed by PDMS wrinkle self-assembly.

    8. A method as defined in claim 1, wherein the light scattering layer is formed by chemical or physical etching, followed by grinding and polishing.

    9. A method as defined in claim 1, wherein the light scattering layer is formed by varying growth conditions such as time and temperature parameters associated with precursor gases used in a MOCVD reactor that affect the surface conditions of a deposited layer.

    10. A method as defined in claim 1, wherein the light scattering layer comprises semiconductor material.

    11. A method as defined in claim 1, wherein the light scattering layer comprises metal elements.

    12. A method as defined in claim 1, wherein the light scattering layer comprises metal, oxide, polymer, or semiconductor nanoparticles.

    13. A method as defined in claim 1, wherein the light scattering layer comprises a phase separation of polymer blends.

    14. A method as defined in claim 1, further comprising roughening the bottom surface of the last deposited solar subcell in the MOCVD reactor by etching indium away from the exposed surface.

    15. A method as defined in claim 1, further comprising depositing a surface oxide layer over the semiconductor surface of the last deposited solar subcell.

    16. A method as defined in claim 1, wherein the light scattering layer redirects the incoming light to be totally internally reflected into the solar subcell.

    17. A method as defined in claim 1, further comprising: depositing a distributed Bragg reflector (DBR) layer adjacent to and below the last deposited solar subcell and arranged so that light can enter and pass through the las deposited solar subcell and at least a portion of which can be reflected back into the last deposited solar subcell by the DBR layer.

    18. A method as defined in claim 17, wherein the DBR layer is disposed directly above the light scattering layer.

    19. A method of manufacturing a multijunction solar cell comprising: providing a semiconductor growth substrate; depositing a sequence of layers of semiconductor material in an MOCVD reactor forming a plurality of solar subcells; depositing a semiconductor light scattering or reflecting layer over the last deposited solar subcell for scattering or reflective layer the incoming light back into the last deposited subcell; mounting and bonding a surrogate substrate to the light scattering layer; and removing the semiconductor growth substrate.

    20. A method of manufacturing a multijunction solar cell comprising: providing a semiconductor growth substrate; depositing a sequence of layers of semiconductor material in an MOCVD reactor forming a plurality of solar subcells; and depositing a semiconductor layer over the last deposited solar subcell and varying the growth conditions such as precursor gases and time and temperature parameters so as to affect the surface condition of the deposited semiconductor layer, so that light that has passed through the last deposited solar subcell is redirected back into the last deposited solar subcell.

    Description

    BRIEF DESCRIPTION OF THE DRAWINGS

    [0079] The present disclosure will be better and more fully appreciated by reference to the following detailed description when considered in conjunction with the accompanying drawings, wherein:

    [0080] FIG. 1A is a highly simplified cross-sectional view of a portion of a subcell of a multijunction solar cell after several stages of fabrication including the deposition of certain semiconductor layers on the growth substrate and the attachment of a surrogate substrate according to the present disclosure;

    [0081] FIG. 1B is a highly simplified cross-sectional view of the portion of the multijunction solar cell depicted in FIG. 1A with the surrogate substrate depicted at the bottom of the figure;

    [0082] FIG. 2A is a cross-sectional view of one embodiment of a multijunction solar cell after several stages of fabrication including the growth of certain semiconductor layers on the growth substrate up to the contact layer and light scattering layer and the bonding of a surrogate substrate, according to the present disclosure, may be implemented;

    [0083] FIG. 2B is a cross-sectional view of the embodiment of a multijunction solar cell of FIG. 2A after removal of the surrogate substrate, according to the present disclosure, may be implemented; and

    [0084] FIG. 3 is a cross-sectional view of another embodiment of a multijunction solar cell a light scattering layer, according to the present disclosure, may be implemented.

    GLOSSARY OF TERMS

    [0085] “III-V compound semiconductor” refers to a compound semiconductor formed using at least one element from group III of the periodic table and at least one element from group V of the periodic table. III-V compound semiconductors include binary, tertiary and quaternary compounds. Group III includes boron (B), aluminum (Al), gallium (Ga), indium (In) and thallium (T). Group V includes nitrogen (N), phosphorus (P), arsenic (As), antimony (Sb) and bismuth (Bi).

    [0086] “Average band gap” of multijunction solar cell is the numerical average of lowest band material in each subcell of the multijunction solar cell.

    [0087] “Band gap” refers to an energy difference (e.g., in electron volts (eV)) separating the top of the valence band and the bottom of the conduction band of a semiconductor material. More particularly, the expression “band gap” of a solar subcell, which internally has layers of different band gaps shall be defined to mean the band gap of the layer of the solar subcell in which the majority of the charge carriers are generated (such sublayer typically being the p-type base semiconductor layer of the base/emitter photovoltaic junction of such subcell). In the event such layer in turn has sublayers with different band gaps (such as the case of a base layer having a graded composition and more particularly a graded band gap), the sublayer of that solar subcell with the lowest band gap shall be taken as defining the “band gap” of such a subcell. Apart from a solar subcell, and more generally in the case of a specifically designated semiconductor region (such as a metamorphic layer), in which that semiconductor region has sublayers or subregions with different band gaps (such as the case of a semiconductor region having a graded composition and more particularly a graded band gap), the sublayer or subregion of that semiconductor region with the lowest band gap shall be taken as defining the “band gap” of that semiconductor region.

    [0088] “Band gap voltage offset” refers to the parameter W.sub.oc=E.sub.g/q−V.sub.oc typically measured at 28° C.

    [0089] “Beginning of Life (BOL)” refers to the time at which a photovoltaic power system is initially deployed in operation. In practice, the BOL performance of a solar cell is measured experimentally in a laboratory on earth prior to the solar cell being deployed in outer space.

    [0090] “Bottom subcell” refers to the subcell in a multijunction solar cell which is furthest from the primary light source for the solar cell.

    [0091] “CIC” (or Cell-Interconnect-Cover glass) refers to the fabricated combination of an individual solar cell together with electrical interconnects to the solar cell and a cover glass mounted on and bonded to the upper surface of the solar cell.

    [0092] “Compound semiconductor” refers to a semiconductor formed using two or more chemical elements.

    [0093] “Current density” refers to the short circuit current density J.sub.sc through a solar subcell through a given planar area, or volume, of semiconductor material constituting the solar subcell.

    [0094] “Deposited”, with respect to a layer of semiconductor material, refers to a layer of material which is epitaxially grown over another semiconductor layer (such as in an MOCVD reactor) so as to form a monolithic crystalline semiconductor structure.

    [0095] “Dopant” refers to a trace impurity element that is contained within a semiconductor material to affect the electrical or optical characteristics of that material. As used in the context of the present disclosure, typical dopant levels in semiconductor materials are in the 1016 to 1019 atoms per cubic centimeter range. The standard notation or nomenclature, when a particular identified dopant is proscribed, is to use, for example, the expression “GaAs:Se” or “GaAs:C” for selenium or carbon doped gallium arsenide respectively. Whenever a ternary or quaternary compound semiconductor is expressed as “AlGaAs” or “GaInAsP”, it is understood that all three or four of the constituent elements are much higher in mole concentration, say on the 1% level or above, which is in the 10.sup.21 atoms/cm.sup.−3 or larger range. Such constituent elements are not considered “dopants” by those skilled in the art since the atoms of the constituent element form part of the crystal structure (i.e., are situated on the crystal lattice sites) of the compound semiconductor. In addition, a further distinction is that a dopant has a different valence number than the constituent component elements. In a commonly implemented III-V compound semiconductor such as AlGaInAs, none of the individual elements Al, Ga, In, or As are considered to be dopants since they have the same valence as the component atoms that make up the crystal lattice.

    [0096] “End of Life (EOL)” refers to a predetermined time or times after the Beginning of Life, during which the photovoltaic power system has been deployed and has been operational. The EOL time or times may, for example, be specified by the customer as part of the required technical performance specifications of the photovoltaic power system to allow the solar cell designer to define the solar cell subcells and sublayer compositions of the solar cell to meet the technical performance requirement at the specified time or times, in addition to other design objectives. The terminology “EOL” is not meant to suggest that the photovoltaic power system is not operational or does not produce power after the EOL time.

    [0097] “Epitaxial or epitaxially grown” refers to a semiconductor growth process using a reactor (such as a MOCVD reactor) in which the atomic lattice planes of two adjacent semiconductor layers of the same or different composition are continuous across the planar interface between the two layers.

    [0098] “Graded interlayer” (or “grading interlayer”)—see “metamorphic layer”.

    [0099] “Inverted metamorphic multijunction solar cell” or “IMM solar cell” refers to a solar cell in which the subcells are deposited or grown on a substrate in a “reverse” sequence such that the higher band gap subcells, which would normally be the “top” subcells facing the solar radiation in the final deployment configuration, are deposited or grown on a growth substrate prior to depositing or growing the lower band gap subcells.

    [0100] “Lattice mismatched” refers to two adjacently disposed materials or layers (with thicknesses of greater than 100 nm) having in-plane lattice constants of the materials in their fully relaxed state differing from one another by more than 0.01% in lattice constant. (Applicant expressly adopts this definition for the purpose of this disclosure, and notes that this definition is considerably more stringent than that proposed, for example, in U.S. Pat. No. 8,962,993, which suggests more than 0.6% lattice constant difference).

    [0101] “Layer” refers to a relatively planar sheet or thickness of semiconductor or other material.

    [0102] The layer may be deposited or grown, e.g., by epitaxial or other techniques.

    [0103] “Low-Earth Orbit (LEO)” shall mean a satellite orbit around the earth with a distance in the range from 800 to 2000 km from the surface.

    [0104] “Metamorphic layer” or “graded interlayer” refers to a layer that achieves a gradual transition in lattice constant generally throughout its thickness in a semiconductor structure.

    [0105] “Middle subcell” refers to a subcell in a multijunction solar cell which is neither a Top Subcell (as defined herein) nor a Bottom Subcell (as defined herein).

    [0106] “Multijunction solar cell” refers to a solar cell constituting an integral, monolithic crystalline semiconductor structure forming a photovoltaic semiconductor device, comprising a plurality of vertically arranged and adjacent photovoltaic junctions or subcells, in which the subcells are epitaxially grown using a reactor (such as a MOCVD reactor) on a bulk semiconductor substrate in a process sequence such that (a) in a “direct” growth process, the higher band gap subcells, which would normally be the “top” subcells facing the incoming light source radiation in the final deployment configuration, are deposited or grown on a growth substrate subsequent to depositing or growing the lower band gap subcells, or (b) in an “inverted” growth process, in a process sequence such that the higher band gap subcells are deposited or grown on the growth substrate prior to depositing or growing the lower band gap subcells. A mechanically “stacked” arrangement of discrete semiconductor “chips” each of which may constitute a discrete photovoltaic device and aligned and bonded together by an adhesive or similar material shall not be deemed a “multijunction solar cell” as that term is used by Applicant in the context of this disclosure.

    [0107] “Range”, as may be used in the expression “ . . . in the range of A to B”, where A and B are real numbers shall mean that the defined variable (a real number) may have a (i) a single value within the set of values with A being the lowest value and B being the highest value, or optionally (ii) two or more values within that set between A and B of values at different points or regions within the applicable physical structure, such as a layer of semiconductor material, or optionally (iii) a continuous set of values in the band between real numbers C and D where A≤C, D≤B, and C≤D, or optionally (iv) any combination of the examples of (i), (ii) and (iii) noted above.

    [0108] “Short circuit current (I.sub.sc)” refers to the amount of electrical current through a solar cell or solar subcell when the voltage across the solar cell is zero volts, as represented and measured, for example, in units of milliAmps (mA).

    [0109] “Short circuit current density”—see “current density”.

    [0110] “Solar cell” refers to an electronic device operable to convert the energy of light directly into electricity by the photovoltaic effect.

    [0111] “Solar cell assembly” refers to the combination of a solar cell together with one or more discrete optical, electrical, or mechanical (structural) subcomponents.

    [0112] “Solar cell subassembly” refers to a sub sect of a solar cell assembly, such as a solar cell together with only discrete electrical interconnects and/or coverglass attached to the solar cell.

    [0113] “Solar subcell” refers to a sequence of layers composed of semiconductor materials including a p type base layer and an n+ type emitter layer forming a p-n photoactive junction. A solar subcell is designed to convert photons over a specific spectral or wavelength band to electrical current depending upon the band gap of the constituent semiconductor material. A solar subcell may compactly be referred to simply as a “junction” abbreviated “J”. In that notation, the first solar subcell or the top light-facing solar subcell or junction may be referred to as the “J1” solar subcell, the second as the “J2”, etc. Although the term “solar subcell” technically may refer to just the adjacent n type and p type semiconductor layers which form a photoelectric junction, in some instances the terminology “solar subcell” may also include as well the upper and lower adjacent semiconductor layers, i.e., the window and back surface field (BSF) layers, which are present in some (but not all) subcell layered arrangements so that the aggregate four layers constitute the “solar subcell”.

    [0114] “Space qualified” refers to an electronic component (e.g., as used in this disclosure, to a solar cell) provides satisfactory operation under the high temperature and thermal cycling test protocols that establish typical “qualification” requirements for use by customers who utilize such components in the outer space environment. The exemplary conditions for such qualifications include (i) vacuum bake-out testing that includes exposure to a temperature of +100° C. to +135° C. (e.g., about +100° C., +110° C., +120° C., +125° C., +135° C.) for 2 hours to 24 hours, 48 hours, 72 hours, or 96 hours; and (ii) TVAC and/or APTC test that includes cycling between temperature extremes of −180° C. (e.g., about −180° C., −175° C., −170° C., −165° C., −150° C., −140° C., −128° C., −110° C., −100° C., −75° C., or −70° C.) to +145° C. (e.g., about +70° C., +80° C., +90° C., +100° C., +110° C., +120° C., +130° C., +135° C., or +145° C.) for 600 to 32,000 cycles (e.g., about 600, 700, 1500, 2000, 4000, 5000, 7500, 22000, 25000, or 32000 cycles), and in some space missions up to +180° C. See, for example, Fatemi et al., “Qualification and Production of Emcore ZTJ Solar Panels for Space Missions,” Photovoltaic Specialists Conference (PVSC), 2013 IEEE 39th (DOI: 10.1109/PVSC 2013 6745052).

    [0115] “Subcell”—see “Solar subcell”.

    [0116] “Substantially circular” referring to a commercially available semiconductor wafer, refers to a circular wafer having at least one straight line edge or “flat” on the edge of the wafer which is provided to enable uses of the wafer to orient the wafer in production equipment and during sequential production processes.

    [0117] “Substantially current matched” refers to the short circuit current through adjacent solar subcells being substantially identical (i.e. within plus or minus 1%).

    [0118] “Top subcell” or “upper subcell” refers to the subcell in a multijunction solar cell which is closest to the primary light source for the solar cell.

    [0119] “UMM” or “upright metamorphic multijunction solar cell” refers to a solar cell in which the subcells are deposited or grown on a substrate in a sequence such that the lower band gap subcells are deposited or grown on a growth substrate prior to depositing or growing the higher band gap subcells also including one or more metamorphic layers.

    [0120] “Upright multijunction solar cell” refers to a solar cell in which the subcells are deposited or grown on a substrate in a sequence such that the lower band gap subcells are deposited or grown on a growth substrate prior to depositing or growing the higher band gap subcells.

    [0121] “ZTJ” refers to the product designation of a commercially available SolAero Technologies Corp. triple junction solar cell.

    DESCRIPTION OF THE PREFERRED EMBODIMENT

    [0122] Details of the present invention will now be described including exemplary aspects and embodiments thereof. Referring to the drawings and the following description, like reference numbers are used to identify like or functionally similar elements, and are intended to illustrate major features of exemplary embodiments in a highly simplified diagrammatic manner. Moreover, the drawings are not intended to depict every feature of the actual embodiment nor the relative dimensions of the depicted elements, and are not drawn to scale.

    [0123] A variety of different features of multijunction solar cells (as well as inverted metamorphic multijunction solar cells) are disclosed in the related applications noted above. Some, many or all of such features may be included in the structures and processes associated with the multijunction solar cells of the present disclosure.

    [0124] Prior to discussing the specific embodiments of the present disclosure, a brief discussion of some of the issues associated with the design of multijunction solar cells, and the context of the composition or deposition of various specific layers in embodiments of the product as specified and defined by Applicant is in order.

    [0125] There are a multitude of properties that should be considered in specifying and selecting the composition of, inter alia, a specific semiconductor layer, the back metal layer, the adhesive or bonding material, or the composition of the supporting material for mounting a solar cell thereon. For example, some of the properties that should be considered when selecting a particular layer or material are electrical properties (e.g. conductivity), optical properties (e.g., band gap, absorbance and reflectance), structural properties (e.g., thickness, strength, flexibility, Young's modulus, etc.), chemical properties (e.g., growth rates, the “sticking coefficient” or ability of one layer to adhere to another, stability of dopants and constituent materials with respect to adjacent layers and subsequent processes, etc.), thermal properties (e.g., thermal stability under temperature changes, coefficient of thermal expansion), and manufacturability (e.g., availability of materials, process complexity, process variability and tolerances, reproducibility of results over high volume, reliability and quality control issues).

    [0126] In view of the trade-offs among these properties, it is not always evident that the selection of a material based on one of its characteristic properties is always or typically “the best” or “optimum” from a commercial standpoint or for Applicant's purposes. For example, theoretical studies may suggest the use of a quaternary material with a certain band gap for a particular subcell would be the optimum choice for that subcell layer based on fundamental semiconductor physics. As an example, the teachings of academic papers and related proposals for the design of very high efficiency (over 40%) solar cells may therefore suggest that a solar cell designer specify the use of a quaternary material (e.g., InGaAsP) for the active layer of a subcell. A few such devices may actually be fabricated by other researchers, efficiency measurements made, and the results published as an example of the ability of such researchers to advance the progress of science by increasing the demonstrated efficiency of a compound semiconductor multijunction solar cell. Although such experiments and publications are of “academic” interest, from the practical perspective of the Applicants in designing a compound semiconductor multijunction solar cell to be produced in high volume at reasonable cost and subject to manufacturing tolerances and variability inherent in the production processes, such an “optimum” design from an academic perspective is not necessarily the most desirable design in practice, and the teachings of such studies more likely than not point in the wrong direction and lead away from the proper design direction. Stated another way, such references may actually “teach away” from Applicant's research efforts and direction and the ultimate solar cell design proposed by the Applicants.

    [0127] In view of the foregoing, it is further evident that the identification of one particular constituent element (e.g. indium, or aluminum) in a particular subcell, or the thickness, band gap, doping, or other characteristic of the incorporation of that material in a particular subcell, is not a single “result effective variable” that one skilled in the art can simply specify and incrementally adjust to a particular level and thereby increase the power output and efficiency of a solar cell.

    [0128] Even when it is known that particular variables have an impact on electrical, optical, chemical, thermal or other characteristics, the nature of the impact often cannot be predicted with much accuracy, particularly when the variables interact in complex ways, leading to unexpected results and unintended consequences. Thus, significant trial and error, which may include the fabrication and evaluative testing of many prototype devices, often over a period of time of months if not years, is required to determine whether a proposed structure with layers of particular compositions, actually will operate as intended, let alone whether it can be fabricated in a reproducible high volume manner within the manufacturing tolerances and variability inherent in the production process, and necessary for the design of a commercially viable device.

    [0129] Furthermore, as in the case here, where multiple variables interact in unpredictable ways, the proper choice of the combination of variables can produce new and unexpected results, and constitute an “inventive step”.

    [0130] The efficiency of a solar cell is not a simple linear algebraic equation as a function of the amount of gallium or aluminum or other element in a particular layer. The growth of each of the epitaxial layers of a solar cell in a reactor is a non-equilibrium thermodynamic process with dynamically changing spatial and temporal boundary conditions that is not readily or predictably modeled. The formulation and solution of the relevant simultaneous partial differential equations covering such processes are not within the ambit of those of ordinary skill in the art in the field of solar cell design.

    [0131] More specifically, the present disclosure intends to provide a relatively simple and reproducible technique that is suitable for use in a high volume production environment in which various semiconductor layers are grown on a growth substrate in an MOCVD reactor, and subsequent processing steps are defined and selected to minimize any physical damage to the quality of the deposited layers, thereby ensuring a relatively high yield of operable solar cells meeting specifications at the conclusion of the fabrication processes.

    [0132] The lattice constants and electrical properties of the layers in the semiconductor structure are preferably controlled by specification of appropriate reactor growth temperatures and times, and by use of appropriate chemical composition and dopants. The use of a deposition method, such as Molecular Beam Epitaxy (MBE), Organo Metallic Vapor Phase Epitaxy (OMVPE), Metal Organic Chemical Vapor Deposition (MOCVD), or other vapor deposition methods for the growth may enable the layers in the monolithic semiconductor structure forming the cell to be grown with the required thickness, elemental composition, dopant concentration and grading and conductivity type, and are within the scope of the present disclosure.

    [0133] The present disclosure is in one embodiment directed to a growth process using a metal organic chemical vapor deposition (MOCVD) process in a standard, commercially available reactor suitable for high volume production. Other embodiments may use other growth technique, such as MBE. More particularly, regardless of the growth technique, the present disclosure is directed to the materials and fabrication steps that are particularly suitable for producing commercially viable multijunction solar cells or inverted metamorphic multijunction solar cells using commercially available equipment and established high-volume fabrication processes, as contrasted with merely academic expositions of laboratory or experimental results.

    [0134] Some comments about MOCVD processes used in one embodiment are in order here.

    [0135] It should be noted that the layers of a certain target composition in a semiconductor structure grown in an MOCVD process are inherently physically different than the layers of an identical target composition grown by another process, e.g. Molecular Beam Epitaxy (MBE). The material quality (i.e., morphology, stoichiometry, number and location of lattice traps, impurities, and other lattice defects) of an epitaxial layer in a semiconductor structure is different depending upon the process used to grow the layer, as well as the process parameters associated with the growth. MOCVD is inherently a chemical reaction process, while MBE is a physical deposition process. The chemicals used in the MOCVD process are present in the MOCVD reactor and interact with the wafers in the reactor, and affect the composition, doping, and other physical, optical and electrical characteristics of the material. For example, the precursor gases used in an MOCVD reactor (e.g. hydrogen) are incorporated into the resulting processed wafer material, and have certain identifiable electro-optical consequences which are more advantageous in certain specific applications of the semiconductor structure, such as in photoelectric conversion in structures designed as solar cells. Such high order effects of processing technology do result in relatively minute but actually observable differences in the material quality grown or deposited according to one process technique compared to another. Thus, devices fabricated at least in part using an MOCVD reactor or using a MOCVD process have inherent different physical material characteristics, which may have an advantageous effect over the identical target material deposited using alternative processes.

    [0136] Reference throughout this specification to “one embodiment” or “an embodiment” means that a particular feature, structure, or characteristic described in connection with the embodiment is included in at least one embodiment of the present invention. Thus, the appearances of the phrases “in one embodiment” or “in an embodiment” in various places throughout this specification are not necessarily all referring to the same embodiment. Furthermore, the particular features, structures, or characteristics may be combined in any suitable manner in one or more embodiments.

    [0137] To illustrate an embodiment of an inverted metamorphic multijunction solar cell device of the present disclosure, FIG. 1A is a cross-sectional view of an embodiment of an inverted metamorphic multijunction solar cell 200 after several stages of fabrication including the growth of certain semiconductor layers on the growth substrate 201 up to the bonding layer 208 and surrogate substrate according to the present disclosure.

    [0138] More particularly, there is shown a growth substrate 201, which is preferably gallium arsenide (GaAs), but may also be germanium (Ge) or other suitable material. For GaAs, the substrate is preferably a 15° off-cut substrate, that is to say, its surface oriented 15° of the (100) plane towards the (111) A plane. An etch stop layer 202 is deposited on the growth substrate 201.

    [0139] Subcell A will ultimately become the “top” subcell of the inverted metamorphic structure of the present embodiment after completion of the process steps according to the present disclosure to be described hereinafter.

    [0140] A tunnel diode 204 is then epitaxially deposited over the top solar subcell 203. Additional solar subcells (not shown) or other specialized layers may then be deposited over the tunnel diode 204, up to the last or second solar subcell 205.

    [0141] In some embodiments, the next process step is etching according to the present disclosure by an etchant gas, such as carbon tetrachloride, to produce a rough light scattering layer 206. In other embodiments, the supplemental layer may be deposited over solar subcell 205 and roughened by adjustment of growth process parameters in the MOCVD reactor, such as the use of different gases, or modification of the time and/or temperature or other parameters associated with the growth of the layer 106 or subsequent layers.

    [0142] In some embodiments, a rear surface mirror layer 207 may be deposited over the light scattering layer 206, and a surrogate substrate 209 bonded to the mirror layer 207 by a bonding layer 208.

    [0143] In some embodiments, an adhesive layer (e.g. Wafer Bond, manufactured by Brewer Science, Inc. of Rolla, MO) can be deposited over the mirror layer 207, and a surrogate substrate 209 can be attached. In some embodiments, the surrogate substrate may be glass. In other embodiments, the surrogate substrate may be GaAs, Ge, or Si, or other suitable material. The surrogate substrate can be about 40 mils in thickness. As an alternative to using an adhesive layer, a suitable substrate (e.g., GaAs) may be eutectically or permanently bonded to the mirror layer 207.

    [0144] The growth substrate 207 can be removed by a sequence of lapping and/or etching steps in which the substrate 201, and the etch stop layer 202 are removed. The choice of a particular etchant is growth substrate dependent.

    [0145] FIG. 1B is a cross-sectional view of the solar cell of FIG. 1A now depicted with the top solar subcell 203 at the top of the Figure, after removal of the growth substrate 201 and completion of fabrication.

    [0146] In some embodiments, the light scattering layer 206 is a semiconductor layer disposed on the second solar subcell 205. In some embodiments, the top surface of the semiconductor layer over the second solar subcell is roughened by a chemical etchant. In some embodiments, the light scattering layer redirects the incoming light along a longer path length in the second solar subcell.

    [0147] In some embodiments, there further comprises a crystallizing layer (not shown) grown over the light scattering layer.

    [0148] In some embodiments, the crystallizing layer is composed of gallium arsenide.

    [0149] In some embodiments, the light scattering layer includes discrete periodic or non-periodic arrayed elements having a height of 200-500 nm, a width of 200-500 nm, and a pitch of 200-500 nm.

    [0150] In some embodiments, the bottom surface of the bottom solar subcell is roughened, and the second light scattering layer includes a surface oxide layer disposed over the roughened bottom semiconductor surface of the second solar subcell.

    [0151] In some embodiments, light scattering layer redirects the incoming light to be totally internally reflected into the second solar subcell.

    [0152] In some embodiments, the light scattering layer is selected from the group consisting of: [0153] (i) semiconductor material; [0154] (ii) metal elements; [0155] (iii) metal, oxide, polymer, or semiconductor nanoparticles; or [0156] (iv) a phase separation of polymer blends; [0157] (v) chemical or physical etching, followed by grinding and polishing; or [0158] (vi) semiconductor growth conditions that produce a rough semiconductor surface.

    [0159] In some embodiments, the light scattering layer is formed by: [0160] (i) electron beam lithography; or [0161] (ii) nanoimprint lithography; or [0162] (iii) nanoparticle self-assembly; or [0163] (iv) PDMS wrinkle self-assembly; or [0164] (v) phase separation of polymer blends; or [0165] (vi) chemical or physical etching, followed by grinding and polishing; or [0166] (vii) semiconductor growth conditions that produce a rough semiconductor surface.

    [0167] FIG. 2A depicts the “inverted metamorphic” multijunction solar cell 600 according to an embodiment of the present disclosure after the sequential formation of the five subcells A, B, C, D and E on a GaAs growth substrate. More particularly, there is shown a growth substrate 101, which is preferably gallium arsenide (GaAs), but may also be germanium (Ge) or other suitable material. For GaAs, the substrate is preferably a 15° off-cut substrate, that is to say, its surface is orientated 15° off the (100) plane towards the (111) A plane, as more fully described in U.S. Patent Application Pub. No. 2009/0229662 A1 (Stan et al.).

    [0168] In some embodiments, there further comprises a distributed Bragg reflector (DBR) layer disposed adjacent to and between two of the subcells of the multijunction solar cell solar subcells and arranged so that light can enter and pass through the upper solar subcell and at least a portion of which can be reflected back into the upper solar subcell by the DBR layer.

    [0169] In the case of a Ge substrate, a nucleation layer (not shown) is deposited directly on the substrate 101. On the substrate, or over the nucleation layer (in the case of a Ge substrate), a buffer layer 102 and an etch stop layer 103 are further deposited. In the case of GaAs substrate, the buffer layer 102 is preferably GaAs. In the case of Ge substrate, the buffer layer 102 is preferably InGaAs. A contact layer 104 of GaAs is then deposited on layer 103, and a window layer 105 of AlInP is deposited on the contact layer. The subcell A, consisting of an n+ emitter layer 106 and a p-type base layer 107, is then epitaxially deposited on the window layer 105. The subcell A is generally latticed matched to the growth substrate 101.

    [0170] It should be noted that the multijunction solar cell structure could be formed by any suitable combination of group III to V elements listed in the periodic table subject to lattice constant and bandgap requirements, wherein the group III includes boron (B), aluminum (Al), gallium (Ga), indium (In), and thallium (T). The group IV includes carbon (C), silicon (Si), germanium (Ge), and tin (Sn). The group V includes nitrogen (N), phosphorous (P), arsenic (As), antimony (Sb), and bismuth (Bi).

    [0171] In one embodiment, the emitter layer 106 is composed of InGa(Al)P.sub.2 and the base layer 107 is composed of InGa(Al)P.sub.2. The aluminum or Al term in parenthesis in the preceding formula means that Al is an optional constituent, and in this instance may be used in an amount ranging from 0% to 40%.

    [0172] Subcell A will ultimately become the “top” subcell of the inverted metamorphic structure after completion of the process steps according to the present disclosure to be described hereinafter.

    [0173] On top of the base layer 107 a back surface field (“BSF”) layer 108 preferably p+ AlGaInP is deposited and used to reduce recombination loss.

    [0174] The BSF layer 108 drives minority carriers from the region near the base/BSF interface surface to minimize the effect of recombination loss. In other words, a BSF layer 108 reduces recombination loss at the backside of the solar subcell A and thereby reduces the recombination in the base.

    [0175] On top of the BSF layer 108 is deposited a sequence of heavily doped p-type and n-type layers 109a and 109b that forms a tunnel diode, i.e., an ohmic circuit element that connects subcell A to subcell B. Layer 109a is preferably composed of p++ AlGaAs, and layer 109b is preferably composed of n++ InGaP.

    [0176] A window layer 110 is deposited on top of the tunnel diode layers 109a/109b, and is preferably n+ InGaP. The advantage of utilizing InGaP as the material constituent of the window layer 110 is that it has an index of refraction that closely matches the adjacent emitter layer 111, as more fully described in U.S. Patent Application Pub. No. 2009/0272430 A1 (Cornfeld et al.). The window layer 110 used in the subcell B also operates to reduce the interface recombination loss. It should be apparent to one skilled in the art, that additional layer(s) may be added or deleted in the cell structure without departing from the scope of the present disclosure.

    [0177] On top of the window layer 110 the layers of subcell B are deposited: the n-type emitter layer 111 and the p-type base layer 112. These layers are preferably composed of InGaP and AlInGaAs respectively (for a Ge substrate or growth template), or InGaP and AlGaAs respectively (for a GaAs substrate), although any other suitable materials consistent with lattice constant and bandgap requirements may be used as well. Thus, subcell B may be composed of a GaAs, InGaP, AlGaInAs, AlGaAsSb, GaInAsP, or AlGaInAsP, emitter region and a GaAs, InGaP, AlGaInAs, AlGaAsSb, GaInAsP, or AlGaInAsP base region.

    [0178] In previously disclosed implementations of an inverted metamorphic solar cell, the second subcell or subcell B or was a homostructure. In the present disclosure, similarly to the structure disclosed in U.S. Patent Application Pub. No. 2009/0078310 A1 (Stan et al.), the second subcell or subcell B becomes a heterostructure with an InGaP emitter and its window is converted from InAlP to AlInGaP. This modification reduces the refractive index discontinuity at the window/emitter interface of the second subcell, as more fully described in U.S. Patent Application Pub. No. 2009/0272430 A1 (Cornfeld et al.). Moreover, the window layer 110 is preferably is doped three times that of the emitter 111 to move the Fermi level up closer to the conduction band and therefore create band bending at the window/emitter interface which results in constraining the minority carriers to the emitter layer.

    [0179] On top of the cell B is deposited a BSF layer 113 which performs the same function as the BSF layer 109. The p++/n++ tunnel diode layers 114a and 114b respectively are deposited over the BSF layer 113, similar to the layers 109a and 109b, forming an ohmic circuit element to connect subcell B to subcell C. The layer 114a is preferably composed of p++ AlGaAs, and layer 114b is preferably composed of n++ InGaP.

    [0180] A window layer 118 preferably composed of n+ type GaInP is then deposited over the tunnel diode layer 114. This window layer operates to reduce the recombination loss in subcell “C”. It should be apparent to one skilled in the art that additional layers may be added or deleted in the cell structure without departing from the scope of the present disclosure.

    [0181] On top of the window layer 118, the layers of cell C are deposited: the n+ emitter layer 119, and the p-type base layer 120. These layers are preferably composed of n+ type GaAs and n+ type GaAs respectively, or n+ type InGaP and p type GaAs for a heterojunction subcell, although another suitable materials consistent with lattice constant and bandgap requirements may be used as well.

    [0182] In some embodiments, subcell C may be (In)GaAs with a band gap between 1.40 eV and 1.42 eV. Grown in this manner, the cell has the same lattice constant as GaAs but has a low percentage of Indium 0%<In<1% to slightly lower the band gap of the subcell without causing it to relax and create dislocations. In this case, the subcell remains lattice matched, albeit strained, and has a lower band gap than GaAs. This helps improve the subcell short circuit current slightly and improve the efficiency of the overall solar cell.

    [0183] In some embodiments, the third subcell or subcell C may have quantum wells or quantum dots that effectively lower the band gap of the subcell to approximately 1.3 eV. All other band gap ranges of the other subcells described above remain the same. In such embodiment, the third subcell is still lattice matched to the GaAs substrate. Quantum wells are typically “strain balanced” by incorporating lower band gap or larger lattice constant InGaAs (e.g. a band gap of ˜1.3 eV) and higher band gap or smaller lattice constant GaAsP. The larger/smaller atomic lattices/layers of epitaxy balance the strain and keep the material lattice matched.

    [0184] A BSF layer 121, preferably composed of InGaAlAs, is then deposited on top of the cell C, the BSF layer performing the same function as the BSF layers 108 and 113.

    [0185] The p++/n++ tunnel diode layers 122a and 122b respectively are deposited over the BSF layer 121, similar to the layers 114a and 114b, forming an ohmic circuit element to connect subcell C to subcell D. The layer 122a is preferably composed of p++ GaAs, and layer 122b is preferably composed of n++ GaAs.

    [0186] An alpha layer 123, preferably composed of n-type GaInP, is deposited over the tunnel diode 122a/122b, to a thickness of about 1.0 micron. Such an alpha layer is intended to prevent threading dislocations from propagating, either opposite to the direction of growth into the top and middle subcells A, B and C, or in the direction of growth into the subcell D, and is more particularly described in U.S. Patent Application Pub. No. 2009/0078309 A1 (Cornfeld et al.).

    [0187] A metamorphic layer (or graded interlayer) 124 is deposited over the alpha layer 123 using a surfactant. Layer 124 is preferably a compositionally step-graded series of InGaAlAs layers, preferably with monotonically changing lattice constant, so as to achieve a gradual transition in lattice constant in the semiconductor structure from subcell C to subcell D while minimizing threading dislocations from occurring. The band gap of layer 124 is constant throughout its thickness, preferably approximately equal to 1.5 to 1.6 eV, or otherwise consistent with a value slightly greater than the band gap of the middle subcell C. One embodiment of the graded interlayer may also be expressed as being composed of (In.sub.xGa.sub.1-x).sub.yAl.sub.1-yAs, with x and y selected such that the band gap of the interlayer remains constant at approximately 1.5 to 1.6 eV or other appropriate band gap.

    [0188] In the surfactant assisted growth of the metamorphic layer 124, a suitable chemical element is introduced into the reactor during the growth of layer 124 to improve the surface characteristics of the layer. In the preferred embodiment, such element may be a dopant or donor atom such as selenium (Se) or tellurium (Te). Small amounts of Se or Te are therefore incorporated in the metamorphic layer 124, and remain in the finished solar cell. Although Se or Te are the preferred n-type dopant atoms, other non-isoelectronic surfactants may be used as well.

    [0189] Surfactant assisted growth results in a much smoother or planarized surface. Since the surface topography affects the bulk properties of the semiconductor material as it grows and the layer becomes thicker, the use of the surfactants minimizes threading dislocations in the active regions, and therefore improves overall solar cell efficiency.

    [0190] As an alternative to the use of non-isoelectronic one may use an isoelectronic surfactant. The term “isoelectronic” refers to surfactants such as antimony (Sb) or bismuth (Bi), since such elements have the same number of valence electrons as the P atom of InGaP, or the As atom in InGaAlAs, in the metamorphic buffer layer. Such Sb or Bi surfactants will not typically be incorporated into the metamorphic layer 124.

    [0191] In the inverted metamorphic structure described in the Wanlass et al. paper cited above, the metamorphic layer consists of nine compositionally graded InGaP steps, with each step layer having a thickness of 0.25 micron. As a result, each layer of Wanlass et al. has a different bandgap. In one of the embodiments of the present disclosure, the layer 124 is composed of a plurality of layers of InGaAlAs, with monotonically changing lattice constant, each layer having the same band gap, approximately in the range of 1.5 to 1.6 eV.

    [0192] The advantage of utilizing a constant bandgap material such as InGaAlAs is that arsenide-based semiconductor material is much easier to process in standard commercial MOCVD reactors, while the small amount of aluminum assures radiation transparency of the metamorphic layers.

    [0193] Although the preferred embodiment of the present disclosure utilizes a plurality of layers of InGaAlAs for the metamorphic layer 124 for reasons of manufacturability and radiation transparency, other embodiments of the present disclosure may utilize different material systems to achieve a change in lattice constant from subcell C to subcell D. Thus, the system of Wanlass using compositionally graded InGaP is a second embodiment of the present disclosure. Other embodiments of the present disclosure may utilize continuously graded, as opposed to step graded, materials. More generally, the graded interlayer may be composed of any of the As, P, N, Sb based III-V compound semiconductors subject to the constraints of having the in-plane lattice parameter greater than or equal to that of the second solar cell and less than or equal to that of the third solar cell, and having a bandgap energy greater than that of the second solar cell.

    [0194] An alpha layer 125, preferably composed of n+ type AlGaInAsP, is deposited over metamorphic buffer layer 124, to a thickness of about 1.0 micron. Such an alpha layer is intended to prevent threading dislocations from propagating, either opposite to the direction of growth into the top and middle subcells A, B and C, or in the direction of growth into the subcell D, and is more particularly described in U.S. Patent Application Pub. No. 2009/0078309 A1 (Cornfeld et al.).

    [0195] A window layer 126 preferably composed of n+ type InGaAlAs is then deposited over alpha layer 125. This window layer operates to reduce the recombination loss in the fourth subcell “D”. It should be apparent to one skilled in the art that additional layers may be added or deleted in the cell structure without departing from the scope of the present disclosure.

    [0196] On top of the window layer 126, the layers of cell D are deposited: the n+ emitter layer 127, and the p-type base layer 128. These layers are preferably composed of n+ type InGaAs and p type InGaAs respectively, or n+ type InGaP and p-type InGaAs for a heterojunction subcell, although another suitable materials consistent with lattice constant and bandgap requirements may be used as well.

    [0197] A BSF layer 129, preferably composed of p+ type InGaAlAs, is then deposited on top of the cell D, the BSF layer performing the same function as the BSF layers 108, 113 and 121.

    [0198] The p++/n++ tunnel diode layers 130a and 130b respectively are deposited over the BSF layer 129, similar to the layers 122a/122b and 109a/109b, forming an ohmic circuit element to connect subcell D to subcell E. The layer 130a is preferably composed of p++ AlGaInAs, and layer 130b is preferably composed of n++ GaInP.

    [0199] In some embodiments an alpha layer 131, preferably composed of n-type GaInP, is deposited over the tunnel diode 130a/130b, to a thickness of about 0.5 micron. Such alpha layer is intended to prevent threading dislocations from propagating, either opposite to the direction of growth into the middle subcells C and D, or in the direction of growth into the subcell E, and is more particularly described in copending U.S. patent application Ser. No. 11/860,183, filed Sep. 24, 2007.

    [0200] A second metamorphic layer (or graded interlayer) 132 is deposited over the barrier layer 131. Layer 132 is preferably a compositionally step-graded series of AlGaInAs layers, preferably with monotonically changing lattice constant, so as to achieve a gradual transition in lattice constant in the semiconductor structure from subcell D to subcell E while minimizing threading dislocations from occurring. In some embodiments the band gap of layer 132 is constant throughout its thickness, preferably approximately equal to 1.1 eV, or otherwise consistent with a value slightly greater than the band gap of the middle subcell D. One embodiment of the graded interlayer may also be expressed as being composed of (In.sub.xGa.sub.1-x).sub.y Al.sub.1-yAs, with 0<x<1, 0<y<1, and x and y selected such that the band gap of the interlayer remains constant at approximately 1.1 eV or other appropriate band gap.

    [0201] In one embodiment of the present disclosure, an optional second barrier layer 133 may be deposited over the AlGaInAs metamorphic layer 132. The second barrier layer 133 performs essentially the same function as the first barrier layer 131 of preventing threading dislocations from propagating. In one embodiment, barrier layer 133 has not the same composition than that of barrier layer 131, i.e. n+ type GaInP.

    [0202] A window layer 134 preferably composed of n+ type GaInP is then deposited over the barrier layer 133. This window layer operates to reduce the recombination loss in the fifth subcell “E”. It should be apparent to one skilled in the art that additional layers may be added or deleted in the cell structure without departing from the scope of the present invention.

    [0203] On top of the window layer 134, the layers of cell E are deposited: the n+ emitter layer 135, and the p-type base layer 136. These layers are preferably composed of n+ type GalnAs and p-type GalnAs respectively, although other suitable materials consistent with lattice constant and band gap requirements may be used as well.

    [0204] A BSF layer 137, preferably composed of p+ type AlGaInAs, is then deposited on top of the cell E, the BSF layer performing the same function as the BSF layers 108, 113, 121, and 129.

    [0205] Finally, a light scattering layer 206, preferably composed of AlGaInAs, is deposited on the BSF layer 137.

    [0206] The composition of this light scattering and contact layer 206 located at the bottom (non-illuminated) side of the lowest band gap photovoltaic cell (i.e., subcell “E” in the depicted embodiment) in a multijunction photovoltaic cell, can be formulated to reduce absorption of the light that passes through the cell, so that (i) the backside ohmic metal contact layer below it (on the non-illuminated side) will also act as a mirror layer, and (ii) the contact layer doesn't have to be selectively etched off, to prevent absorption.

    [0207] In some embodiments, the bottom surface of the layer 206 over last deposited solar subcell is roughened to form the light scattering elements. In some embodiments, an oxide layer is deposited over the roughened surface of the last deposited solar subcell to form a rear surface mirror.

    [0208] In some embodiments, the layer 206 of light scattering elements may be formed by: (i) electron beam lithography; or (ii) nanoimprint lithography; or (iii) nanoparticle self-assembly; or (iv) PDMS wrinkle self-assembly; or (v) phase separation of polymer blends; or (vi) chemical or physical etching, followed by grinding and polishing; or (vii) semiconductor growth conditions that produce a rough semiconductor surface.

    [0209] Reference may be made to the description of layers 206, 207, 208, and in connection with FIGS. 1A and 1B which not be repeated here for brevity.

    [0210] It should be apparent to one skilled in the art, that additional layer(s) may be added or deleted in the cell structure without departing from the scope of the present invention.

    [0211] It will be understood that each of the elements described above, or two or more together, also may find a useful application in other types of structures or constructions differing from the types of structures or constructions described above.

    [0212] Although described embodiments of the present disclosure utilizes a vertical stack of three subcells, various aspects and features of the present disclosure can apply to stacks with fewer or greater number of subcells, i.e. two junction cells, three junction cells, five, six, seven junction cells, etc.

    [0213] In addition, although the disclosed embodiments are configured with top and bottom electrical contacts, the subcells may alternatively be contacted by means of metal contacts to laterally conductive semiconductor layers between the subcells. Such arrangements may be used to form 3-terminal, 4-terminal, and in general, n-terminal devices. The subcells can be interconnected in circuits using these additional terminals such that most of the available photogenerated current density in each subcell can be used effectively, leading to high efficiency for the multijunction cell, notwithstanding that the photogenerated current densities are typically different in the various subcells.

    [0214] As noted above, the solar cell described in the present disclosure may utilize an arrangement of one or more, or all, homojunction cells or subcells, i.e., a cell or subcell in which the p-n junction is formed between a p-type semiconductor and an n-type semiconductor both of which have the same chemical composition and the same band gap, differing only in the dopant species and types, and one or more heterojunction cells or subcells. Subcell 309, with p-type and n-type InGaP is one example of a homojunction subcell.

    [0215] In some cells, a thin so-called “intrinsic layer” may be placed between the emitter layer and base layer, with the same or different composition from either the emitter or the base layer. The intrinsic layer may function to suppress minority-carrier recombination in the space-charge region. Similarly, either the base layer or the emitter layer may also be intrinsic or not-intentionally-doped (“ND”) over part or all of its thickness.

    [0216] The composition of the window or BSF layers may utilize other semiconductor compounds, subject to lattice constant and band gap requirements, and may include AlInP, AlAs, AlP, AlGaInP, AlGaAsP, AlGaInAs, AlGaInPAs, GaInP, GalnAs, GaInPAs, AlGaAs, AlinAs, AlInPAs, GaAsSb, AlAsSb, GaAlAsSb, AlInSb, GalnSb, AlGaInSb, AlN, GaN, InN, GaInN, AlGaInN, GaInNAs, AlGaInNAs, ZnSSe, CdSSe, and similar materials, and still fall within the spirit of the present invention.

    [0217] While the solar cell described in the present disclosure has been illustrated and described as embodied in a conventional multijunction solar cell, it is not intended to be limited to the details shown, since it is also applicable to inverted metamorphic solar cells, and various modifications and structural changes may be made without departing in any way from the spirit of the present invention.

    [0218] Thus, while the description of the semiconductor device described in the present disclosure has focused primarily on solar cells or photovoltaic devices, persons skilled in the art know that other optoelectronic devices, such as thermophotovoltaic (TPV) cells, photodetectors and light-emitting diodes (LEDS), are very similar in structure, physics, and materials to photovoltaic devices with some minor variations in doping and the minority carrier lifetime. For example, photodetectors can be the same materials and structures as the photovoltaic devices described above, but perhaps more lightly-doped for sensitivity rather than power production. On the other hand LEDs can also be made with similar structures and materials, but perhaps more heavily-doped to shorten recombination time, thus radiative lifetime to produce light instead of power. Therefore, this invention also applies to photodetectors and LEDs with structures, compositions of matter, articles of manufacture, and improvements as described above for photovoltaic cells.

    [0219] Without further analysis, from the foregoing others can, by applying current knowledge, readily adapt the present invention for various applications. Such adaptations should and are intended to be comprehended within the meaning and range of equivalence of the following claims.