HIGH IMPEDANCE AND COMPACT NEURAL SENSOR FRONT-END

Abstract

A a front-end device is arranged to amplify an electric signal from an associated sensor, e.g. for amplifying an electric signal from a neural activity sensor. The front-end device has an amplifier circuit connected between its input and output terminals (Vin, Vout), wherein the amplifier circuit comprises a capacitive-coupled chopper circuit comprising a first gain element and first, second and third chopper switches arranged for operating at a chopper frequency. Further, the amplifier circuit has A) an impedance boosting auxiliary path connected to the input terminal in parallel with a first chopper switch of the CCC, wherein the impedance boosting auxiliary path comprises a pre-charging buffer, and B) a second gain element connected in a feedback path of the CCC. Such front-end device has high input impedance, and the input impedance is uncorrelated with the gain. It is highly suited for implantable micro devices, e.g. brain dusts.

Claims

1.-19. (canceled)

20. A front-end device arranged to amplify an electric signal from an associated sensor, the front-end device comprising an input terminal arranged for electric connection to the sensor so as to receive an electric signal from the sensor; an output terminal arranged to output an amplified electric signal; and an amplifier circuit connected between the input and output terminals, wherein the amplifier circuit comprises a capacitive-coupled chopper circuit comprising a first gain element and first, second and third chopper switches arranged for operating at a chopper frequency (f.sub.ch), wherein the amplifier circuit further comprises; an impedance boosting auxiliary path connected to the input terminal (Vin) in parallel with a first chopper switch of the CCC, wherein the impedance boosting auxiliary path comprises a pre-charging buffer, and a second gain element connected in a feedback path of the CCC.

21. The front-end device according to claim 20, wherein said impedance boosting auxiliary path comprises a series connection of the pre-charging buffer and a chopper switch.

22. The front-end device according to claim 21, wherein an input of the pre-charging buffer is directly connected to the input terminal, and an output of the pre-charging buffer is connected to an input capacitor of the CCC.

23. The front-end device according to claim 21, wherein said chopper switch of the impedance boosting auxiliary path is operated at the same chopper frequency as the first, second and third chopper switches of the CCC.

24. The front-end device according to claim 20, wherein: the first chopper switch of the CCC is connected between the input terminal and a first terminal of the input capacitor; a second terminal of the input capacitor is connected to a series connection of the first gain element and a first terminal of the second chopper switch; and a second terminal of the second chopper switch is connected to the output terminal.

25. The front-end device according to claim 24, wherein the second terminal of the input capacitor is connected to a feedback path comprising a series connection of a feedback capacitor, the third chopper switch and the second gain element.

26. The front-end device according to claim 25, wherein an input terminal of the second gain element (b) is connected to the output terminal.

27. The front-end device according to claim 25, wherein an output terminal of the second gain element is connected to the third chopper switch.

28. The front-end device according to claim 20, wherein a gain of the second gain element and a capacitance value of input capacitor are selected to provide a target voltage gain of the front-end device.

29. The front-end device according to claim 20, wherein the second gain element has a gain of less than unity, such as a gain of less than 0.99, such as a gain of less than 0.9, such as a gain of 0.1-0.9, such as a gain of 0.2-0.8.

30. The front-end device according to claim 20, comprising auxiliary path pre-charge and gain revision circuits.

31. The front-end device according to claim 20, implemented in CMOS technology occupying an area of less than 0.5 mm.sup.2, such as less than 0.2 mm.sup.2, such as less than 0.1 mm.sup.2.

32. The front-end device according to claim 20, having a DC input impedance of at least 1 GΩ, such as at least 2 GΩ, such as at least 5 GΩ.

33. A neural sensor system comprising: a front-end device according to claim 20, and a neural sensor arranged for implantation into biological tissue, wherein the neural sensor comprises a first part arranged to sense neural electric signals and a second part arranged for connection to the input terminal (Vin) of the front-end device.

34. The neural sensor system according to claim 33, comprising a neural recording unit connected to the output terminal of the front-end device, wherein the neural recording unit is arranged to record a time sequence of an electric signal generated at the output terminal (Vout) of the front-end device.

35. A micro device arranged for implantation into biological tissue, comprising a neural sensor system according to claim 33; and a wireless transmitter arranged to transmit a wireless signal with neural activity data generated in response to an electric signal at the output terminal (Vout) of the front-end device.

36. The micro device according to claim 35, comprising a processor arranged to execute a data processing algorithm in response to the electric signal at the output terminal (Vout) of the front-end device, and to generate the neural activity data accordingly.

37. The micro device according to claim 35, having a total volume of less than 1 mm.sup.3, such as less than 0.5 mm.sup.3, such as less than 0.2 mm.sup.3.

38. A method for sensing neural activity in biological tissue, the method comprising: receiving an electric signal from a neural sensor implanted in biological tissue; applying said electric signal to an amplifier circuit comprising a capacitive-coupled chopper circuit comprising a first gain element and first, second and third chopper switches arranged for operating at a chopper frequency, wherein the amplifier circuit further comprises an impedance boosting auxiliary path connected to receive the said electric signal in parallel with a first chopper switch of the CCC, wherein the impedance boosting auxiliary path comprises a pre-charging buffer, and wherein the amplifier circuit further comprises a second gain element connected in a feedback path of the CCC; receiving an output electric signal from said amplifier circuit; applying a signal processing algorithm on said output electric signal; and generating an output in response to said signal processing algorithm.

Description

BRIEF DESCRIPTION OF THE FIGURES

[0046] The invention will now be described in more detail with regard to the accompanying figures. The figures show one way of implementing the present invention and is not to be construed as being limiting to other possible embodiments falling within the scope of the attached claim set.

[0047] FIG. 1 illustrates a block diagram of a front-end embodiment;

[0048] FIG. 2a and FIG. 2b illustrate prior art circuits;

[0049] FIG. 3 illustrates a preferred circuit embodiment;

[0050] FIG. 4 illustrates a block diagram of a micro device embodiment for implantation into biological tissue, such as a brain dust;

[0051] FIG. 5 illustrates steps of a method embodiment;

[0052] FIG. 6 illustrates a specific front-end embodiment which has been implemented and tested;

[0053] FIG. 7A, 7B illustrate specific details of the embodiment of FIG. 6; and

[0054] FIG. 8 illustrates a graph with measured input impedance of the embodiment shown in FIG. 6 compared with a conventional auxiliary path impedance boosting technique.

DETAILED DESCRIPTION OF AN EMBODIMENT

[0055] FIG. 1 illustrates a block diagram of basic part of a front-end device embodiment. The front-end device has an amplifier circuit AMP with an input terminal arranged for electric connection to an LFP sensor LFP_S so as to receive an electric signal S from the sensor LFP_S, and an output terminal for outputting an amplified electric signal A_S. The LFP sensor LFP_S has one or more electrodes arranged to sense an LFP signal in a biological tissue, e.g. brain tissue, e.g. cause by neural activity.

[0056] The amplifier circuit AMP connected between the input and output terminals has a capacitive-coupled chopper circuit CC_CH with a gain element and chopper switches arranged for operating at a chopper frequency. The amplifier AMP has an impedance boosting auxiliary path IB_AP with a pre-charging buffer connected to the input terminal (Vin) in parallel with a first chopper switch of the chopper circuit CC_CH. Further, the amplifier AMP has a second gain element GE2 which is connected in a feedback path of the chopper circuit CC_CH.

[0057] This provides a front-end device with a high electric input impedance, and wherein the input impedance and gain are uncorrelated. At the same time, the amplifier circuit AMP can be implemented with small components, thus occupying only a limited volume. Therefore, the front-end device is suitable for integration into micro devices, such as brain dusts or the like, requiring a high input impedance for electrodes located in biological tissue.

[0058] FIG. 2a illustrates a prior art Capacitive-coupled Chopper-stabilizer Instrumentation Amplifier (CCIA). CCIAs are the most commonly used circuits in neural recording amplifiers due to their accurate gain definition (by the ratio of capacitors), and their high input impedance at low frequencies. The CCIA utilizes the chopping technique to decrease the flicker noise at low-frequency range, and remove DC offset. In spite of the low input-referred noise feature of the CCIA, it suffers from low input impedance at DC. The input impedance of a basic CCIA is given by:

[00001]$R_{\mathrm{in}}=\frac{1}{f_{\mathrm{ch}}{C}_1}$

[0059] Where f.sub.ch and C.sub.1 describe the chopper frequency and capacitor, respectively. To remove the flicker noise, a high chopper frequency range is preferred and so causes the intrinsic input impedance of switch-cap combination to be very low (in range of tens of kΩ). The gain of a basic CCIA is the ratio of the feedforward input capacitor to the feedback capacitor. By decreasing the input capacitor, the input impedance can be increased. However, the minimum capacitor defined by technology confines the feedback capacitor and so the input capacitor (which is defined by the gain) and so the input impedance. Another important issue is the Common Mode Rejection Ratio (CMRR), which depends on the matching of the input branches. The mismatch between electrodes may saturate the front-end when the gain is high. To minimize the issue of mismatch, the input impedance of the front-end must be an order of magnitude larger than the electrode impedance.

[0060] FIG. 2b shows an alternative prior art CCIA circuit, where an impedance boosting approach is using an auxiliary path, which utilizes a pre-charging buffer that charges the input capacitor voltage from its supply voltage without draining current from the input electrodes. The gain and the input impedance of the amplifier is defined as:

[00002]$\mathrm{Gain}=\frac{C_1}{C_2},R_{\mathrm{in}}\approx \frac{e^{T/\tau }}{2f_{\mathrm{ch}}{C}_1}$

[0061] Where C.sub.1, C.sub.2, T, τ, and f.sub.ch describe the input capacitor, the feedback capacitor, auxiliary-path chopper on-time duration, buffer time constant, and chopper frequency respectively.

[0062] The input impedance is upper bounded by the minimum input capacitor, where this capacitor is also bounded by the required gain. Due to the gain requirement of neural recording front-end, the input capacitor is relatively large, and so the auxiliary-path buffer has a large time constant. Thus, the buffer cannot fully charge the input capacitor, and so the impedance boosting is limited by the auxiliary path time constant, the input capacitor size, and the gain. Considering these limitations and minimum capacitor defined by the technology, only 25× improvement is anticipated for input impedance in comparison with the basic CCIA.

[0063] FIG. 3 illustrates an circuit embodiment of the front-end device according to the invention. The proposed structure is the same as the CCIA with the auxiliary path for impedance boosting as in FIG. 2a, however, utilizing a feedback path the gain adjustment and the input impedance become uncorrelated to each other if the ratio of C1 to b is constant. Some can easily show that the gain and the input impedance of the proposed structure is:

[00003]$\mathrm{Gain}=\frac{C_1}{{\mathrm{bC}}_2},R_{\mathrm{in}}\approx \frac{e^{T/\tau }}{2f_{\mathrm{ch}}{C}_1}$

[0064] Where C.sub.1, C.sub.2, b, T, τ, and f.sub.ch describe the input capacitor, feedback capacitor, additional block gain, auxiliary path on-time duration, buffer time constant, and chopper frequency, respectively. By decreasing the input capacitor, the input impedance will be increased, and the added feedback path can keep the gain constant without decreasing the feedback capacitor (which its minimum value is limited by the technology). Furthermore, the proposed structure mitigates the buffer time constant constraint since by decreasing the input capacitor, the buffer charges a smaller input capacitor. Moreover, the lower area is a valuable feature of the proposed structure since the input capacitor takes a large portion of the total chip area in a conventional CCIA.

[0065] FIG. 4 illustrates a block diagram of an implantable micro device MD, e.g. a brain dust, with including a neural sensing system in the form of an LFP sensor LFP_S and the amplifier circuit AMP described in the forgoing, which is arranged to receive an electric output S from the sensor LFP_S and generate an amplified signal A_S accordingly. The micro device MD further has a wireless communication unit W_CM which receives the amplified signal A_S and is capable of transmitting data indicative of a sensed neural activity by means of the sensor LPF_S in a wireless signal W_S to be received by an external receiver. E.g. the wireless signal is in the form of an ultrasonic signal and/or an electromagnetic Radio Frequency signal. Specifically, the micro device may comprise a piezoelectric crystal for harvesting power from an external ultrasonic transmitter, and wherein the piezoelectric crystal is utilized for transmitting the wireless signal W_S as an ultrasonic backscattering signal to be received by an external ultrasonic receiver.

[0066] FIG. 5 illustrates steps of an embodiment of a method for sensing neural activity in biological tissue. First, receiving R_E an electric signal from a neural sensor implanted in biological tissue, next applying A_AMP said electric signal to an amplifier circuit comprising a capacitive-coupled chopper circuit (CCC) comprising a first gain element and first, second and third chopper switches arranged for operating at a chopper frequency, wherein the amplifier circuit further comprises an impedance boosting auxiliary path connected to receive the said electric signal in parallel with a first chopper switch of the CCC, wherein the impedance boosting auxiliary path comprises a pre-charging buffer, and wherein the amplifier circuit further comprises a second gain element connected in a feedback path of the CCC. Next, receiving R_O an output electric signal from said amplifier circuit, next, applying A_SP a signal processing algorithm on said output electric signal, and generating G_O an output in response to said signal processing algorithm.

[0067] FIG. 6 illustrates a specific front-end embodiment with auxiliary path precharge and gain revision techniques. The front-end embodiment has been implemented in 180 nm CMOS technology occupying an area of 0.051 mm.sup.2 and having a power consumption of 2.1 μW drawn from a 1 V supply. A DC input impedance of 6.7 GΩ is obtained, thereby meeting the requirements of an implantable multichannel recording system. A Common Mode Rejection Ratio is −75 dB is obtained, and the input-referred noise is 2.1 μV.sub.rms. The front-end embodiment has been tested with neural signals recorded in vitro from a mouse brain slice.

[0068] FIG. 7A illustrates a specific implementation of the auxiliary path A_P of the embodiment of FIG. 6 with a chopper frequency of 4 kHz, and a delay of T_aux between the chopper signals f ch_Aux and f Aux of 2.5 μs.

[0069] FIG. 7B illustrates a specific implementation of the gain revision G_R part of the embodiment of FIG. 6.

[0070] FIG. 8 illustrates a graph of the measured input impedance of the proposed embodiment of FIG. 6, 7A, 7B with gain revision technique, compared to a conventional auxiliary path boosting technique without gain revision. As seen, there is a factor of 18 in difference at DC, and at DC the embodiment of FIG. 6, 7A, 7B obtains an input impedance of 6.7 GΩ.

[0071] To sum up, the invention provides a front-end device arranged to amplify an electric signal from an associated sensor, e.g. for amplifying an electric signal from a neural activity sensor. The front-end device has an amplifier circuit connected between its input and output terminals (Vin, Vout), wherein the amplifier circuit comprises a capacitive-coupled chopper circuit (CCC) comprising a first gain element (−Gm) and first, second and third chopper switches (CH1, CH2, CH3) arranged for operating at a chopper frequency (f.sub.ch). Further, the amplifier circuit has A) an impedance boosting auxiliary path connected to the input terminal (Vin) in parallel with a first chopper switch (CH1) of the CCC, wherein the impedance boosting auxiliary path comprises a pre-charging buffer (1), and B) a second gain element (b) connected in a feedback path of the CCC. Such front-end device has high input impedance, and the input impedance is uncorrelated with the gain. It is highly suited for implantable micro devices, e.g. brain dusts.

[0072] Although the present invention has been described in connection with the specified embodiments, it should not be construed as being in any way limited to the presented examples. The scope of the present invention is to be interpreted in the light of the accompanying claim set. In the context of the claims, the terms “comprising” or “comprises” do not exclude other possible elements or steps. Also, the mentioning of references such as “a” or “an” etc. should not be construed as excluding a plurality. The use of reference signs in the claims with respect to elements indicated in the figures shall also not be construed as limiting the scope of the invention. Furthermore, individual features mentioned in different claims, may possibly be advantageously combined, and the mentioning of these features in different claims does not exclude that a combination of features is not possible and advantageous.