MEMS DEVICE WITH INTEGRATED CMOS CIRCUIT

20230312337 · 2023-10-05

    Inventors

    Cpc classification

    International classification

    Abstract

    A method of manufacturing a MEMS device, the MEMS device comprising a movable Micro-Electro-Mechanical piezoelectric component and a CMOS circuit configured to be in conductive communication with the Micro-Electro-Mechanical component. A plurality of CMOS circuit layers are formed on a substrate to form the CMOS circuit, the plurality of CMOS circuit layers comprising a plurality of CMOS passivation and metallisation layers. A portion of at least one of the plurality of CMOS passivation and metallisation layers is removed in a component region of the device. One or more component region layers are formed in place of the removed portion in the component region to form the movable Micro-Electro-Mechanical piezoelectric component. The one or more component region layers are different from the portion of the at least one of the plurality of CMOS passivation and metallisation layers.

    Claims

    1-23. (canceled)

    24. A method of manufacturing a Micro-Electro-Mechanical Systems, MEMS device, the MEMS device comprising a movable Micro-Electro-Mechanical piezoelectric component and a CMOS circuit configured to be in conductive communication with the Micro-Electro-Mechanical component, the method comprising: forming a plurality of CMOS circuit layers on a substrate to form the CMOS circuit, the plurality of CMOS circuit layers comprising a plurality of CMOS passivation and metallisation layers; removing a portion of at least one of the plurality of CMOS passivation and metallisation layers in a component region of the device; and forming one or more component region layers in place of the removed portion in the component region to form the movable Micro-Electro-Mechanical piezoelectric component, the one or more component region layers different from the portion of the at least one of the plurality of CMOS passivation and metallisation layers, wherein a one of the one or more component region layers is a MEMS passive layer, and wherein forming the one or more component region layers comprises depositing the Micro-Electro-Mechanical component on the MEMS passive layer.

    25. The method of claim 24, wherein removing the portion of the at least one of the plurality of CMOS passivation and metallisation layers comprises removing the portion of each of the plurality of CMOS passivation and metallisation layers in the component region of the device.

    26. The method of claim 24, wherein removing the portion of the at least one of the plurality of CMOS passivation and metallisation layers comprises etching the layers to be removed.

    27. The method of claim 24, wherein at least one of the one or more component region layers is formed from a material different from an adjacent layer among the plurality of CMOS circuit layers, the adjacent layer level with the at least one of the one or more component region layers.

    28. The method of claim 24, wherein forming the one or more component region layers comprises depositing a MEMS passive layer in place of the removed portion.

    29. A method of manufacturing a Micro-Electro-Mechanical Systems, MEMS device, the MEMS device comprising a movable Micro-Electro-Mechanical piezoelectric component and a CMOS circuit configured to be in conductive communication with the Micro-Electro-Mechanical component, the method comprising: forming a plurality of CMOS circuit layers on a substrate to form the CMOS circuit, the plurality of CMOS circuit layers comprising a plurality of CMOS passivation and metallisation layers; removing a portion of at least one of the plurality of CMOS passivation and metallisation layers in a component region of the device; and forming one or more component region layers in place of the removed portion in the component region to form the movable Micro-Electro-Mechanical piezoelectric component, the one or more component region layers different from the portion of the at least one of the plurality of CMOS circuit layers, wherein forming the one or more component region layers comprises depositing a MEMS passive layer in place of the removed portion, and wherein the MEMS passive layer overlays the plurality of CMOS passivation and metallisation layers in the CMOS circuit region.

    30. A Micro-Electro-Mechanical Systems, MEMS, device comprising: a substrate having a CMOS circuit integrally provided therewith, the CMOS circuit being formed by a plurality of CMOS circuit layers including a plurality of CMOS passivation and metallisation layers, and arranged in a CMOS circuit region of the MEMS device; and a movable Micro-Electro-Mechanical piezoelectric component configured to be controlled by the CMOS circuit and arranged in a component region of the MEMS device, the component region distinct from the CMOS circuit region, wherein the component region comprises one or more component region layers including the Micro-Electro-Mechanical piezoelectric component, wherein the or each of the one or more component region layers in the component region is different from each of the plurality of CMOS passivation and metallisation layers, of the CMOS circuit region, wherein a one of the one or more component region layers is a MEMS passive layer, wherein the MEMS passive layer overlays the plurality of CMOS passivation and metallisation layers in the CMOS circuit region, wherein the Micro-Electro-Mechanical component is deposited on the MEMS passive layer, wherein a one of the plurality of CMOS passivation and metallisation layers is formed on a first surface of the substrate, and wherein in the component region, the one or more component region layers extend to be planar with the first surface.

    31. The method or MEMS device of claim 24, wherein the Micro-Electro-Mechanical component is a plurality of Micro-Electro-Mechanical components, each defining a respective nozzle opening in the component region.

    32. The method or MEMS device of claim 31, wherein each of the Micro-Electro-Mechanical components is electrically connected to and to be controlled by the CMOS circuit.

    33. The method of claim 24, wherein a one of the plurality of CMOS passivation and metallisation layers is formed on a first surface of the substrate, and wherein in the component region, the one or more component region layers extend to be planar with the first surface.

    34. The method or MEMS device of claim 24, wherein the substrate defines an opening in the component region and the Micro-Electro-Mechanical component comprises a cantilever or a diaphragm extending over the opening.

    35. The method or MEMS device of claim 34, wherein the Micro-Electro-Mechanical component is an actuator.

    36. The method or MEMS device of claim 35, wherein the actuator is a piezoelectric actuator.

    37. The method or MEMS device of claim 35, wherein the MEMS device is a droplet ejector for a printhead.

    38. The method or MEMS device of claim 24, wherein the one or more component region layers are a plurality of different component region layers.

    39. A printhead comprising the droplet ejector of claim 37.

    40. A printer comprising one or more of the printheads of claim 39, wherein the printer is configured to control operation of the actuator of at least one droplet ejector to cause ejection of printing liquid from the droplet ejector.

    41. The printer of claim 40, further comprising the source of printing liquid.

    42. The method or MEMS device of claim 24, wherein the Micro-Electro-Mechanical component is a sensor component.

    43. A Micro-Electro-Mechanical Systems, MEMS, device comprising: a substrate having a CMOS circuit integrally provided therewith, the CMOS circuit being formed by a plurality of CMOS circuit layers including a plurality of CMOS passivation and metallisation layers, together extending between a first plane defined between a one of the plurality of CMOS passivation and metallisation layers bordering the substrate and the substrate, and a second plane defined parallel to the first plane and by a furthest one of the plurality of CMOS passivation and metallisation layers, and arranged in a CMOS circuit region of the MEMS device; and a movable Micro-Electro-Mechanical piezoelectric component configured to be controlled by the CMOS circuit and arranged in a component region of the MEMS device, the component region distinct from the CMOS circuit region, wherein the component region comprises one or more component region layers including the Micro-Electro-Mechanical piezoelectric component, at least one of the one or more component region layers extending to the first plane in a direction from the second plane to the first plane, and wherein the at least one of the one or more component region layers extending to the first plane is formed from a material different from the one of the plurality of CMOS passivation and metallisation layers bordering the substrate, wherein a one of the one or more component region layers is a MEMS passive layer, and wherein the Micro-Electro-Mechanical component is deposited on the MEMS passive layer.

    44. A method of printing, the method comprising: providing print apparatus including a printer as claimed in claim 40; and controlling at least one of the one or more droplet ejectors such that the actuator is caused to flex at least one of the one or more component region layers, whereby to eject printing liquid from the droplet ejector to print using the printing liquid.

    Description

    DESCRIPTION OF THE DRAWINGS

    [0111] An example embodiment of the present invention will now be illustrated with reference to the following Figures in which:

    [0112] FIG. 1 shows an example of a Micro-Electro-Mechanical Systems device in the form of a printhead;

    [0113] FIG. 2 shows a further example of a Micro-Electro-Mechanical Systems device;

    [0114] FIGS. 3a to 3f show stages of manufacture of a Micro-Electro-Mechanical Systems device in accordance with an aspect of the present disclosure;

    [0115] FIGS. 4 to 8 show further examples of Micro-Electro-Mechanical Systems devices in accordance with aspects of the present disclosure; and

    [0116] FIG. 9 is a flowchart illustrating a method of forming a Micro-Electro-Mechanical Systems device in accordance with aspects of the present disclosure.

    DETAILED DESCRIPTION OF AN EXAMPLE EMBODIMENT

    [0117] FIG. 1 shows a schematic indicative illustration of a Micro-Electro-Mechanical Systems printhead. The Micro-Electro-Mechanical Systems (MEMS) printhead 100 is formed with an integrated circuit passivation region 102, in the form of a complementary metal-oxide semiconductor (CMOS) passivation region 102 surrounding one or more, in this case a plurality of, non-CMOS passivation regions 104 on a substrate (not shown), in the form of MEMS passivation regions 104 on the substrate. It will be understood that in the view shown in FIG. 1, the substrate is hidden by the covering regions, including the CMOS passivation region 102 and the non-CMOS passivation region 104. The non-CMOS passivation regions 104 are suitable for being provided with one or more MEMS components thereat.

    [0118] In this example, the MEMS printhead 100 further comprises integrated circuit isolation structures 106 (such as high voltage isolation caps or high voltage deep trench isolation features), specifically in the form of CMOS isolation structures 106, surrounding an integrated circuit transistor region 108 in the form of a CMOS transistor region 108. The CMOS isolation structures 106 and the CMOS transistor region 108 are spaced from the non-CMOS passivation regions 104 by the CMOS passivation region 102. The MEMS printhead 100 further comprises bond pads 110 connected to the CMOS via the CMOS passivation region 102. MEMS metallisation lines 112 electrically connect the CMOS transistor region 108 to a MEMS component (not shown) in a one of the non-CMOS passivation regions 104. In this way, MEMS components in the non-CMOS passivation regions 104 can be controlled by the CMOS transistor region 108, functioning as a controller.

    [0119] In this example, the CMOS passivation region 102 is formed from a material different to that of the non-CMOS passivation region 104, such as the MEMS passivation region 104. In this way, it will be understood that the material used for the non-CMOS passivation region 104 need not be a material suitable for use in the CMOS passivation region 102, but instead is a material chosen specifically for its functionality in a MEMS component in the non-CMOS passivation region 104. In other examples, the CMOS passivation region 102 is formed from the same material as the non-CMOS passivation region 104, but is otherwise different, such as having a different thickness.

    [0120] As will be described further hereinafter, the CMOS passivation region 102 is typically formed by deposition of a plurality of layers of the deposition material.

    [0121] In this example, the MEMS components are typically piezoelectric actuators, controllable to expel droplets of ink and function as a droplet ejector of the inkjet printhead, as will be understood by a person skilled in the art.

    [0122] FIG. 2 shows a further example of a Micro-Electro-Mechanical Systems device, such as a sensor or actuator. Analogously to FIG. 1, the MEMS device 200 comprises an integrated circuit passivation region 202 in the form of a CMOS passivation region 202, a non-CMOS passivation region 204 surrounded by the CMOS passivation region 202, and a plurality of bond pads 210 provided in the CMOS passivation region 202. The non-CMOS passivation region 204 includes one or more MEMS components electrically connected to a CMOS chip via metallisation connections (not shown) through the CMOS passivation layer region 202. In this example, the MEMS component is a sensor component, such as a Piezoelectric Micromachined Ultrasonic Transducer (PMUT), a microphone or other pressure sensor. In this way, a compact MEMS sensor device can be provided. In other examples, the MEMS component is an actuator component, such as for use in a PMUT, a speaker or a fluidic pump. As with the printhead described with reference to FIG. 1, the non-CMOS passivation layer region 204 is formed from a material different from the material used to form the CMOS passivation layer region 202, such as a material not suitable for use as the CMOS passivation layer region 202.

    [0123] The examples shown in FIGS. 1 and 2 can also provide a higher yield process, as described elsewhere herein.

    [0124] FIGS. 3a to 3f show stages of manufacture of a Micro-Electro-Mechanical Systems device in accordance with an aspect of the present disclosure.

    [0125] FIG. 3a shows the provision of a substrate 320 in the form of a silicon wafer substrate 320, having a first surface 322 and a second surface 324, provided opposite the first surface 322. An integrated circuit substrate region 330 in the form of a CMOS substrate region 330 is provided at the substrate 320, in this example extending into the substrate 320 from the first surface 322 at a CMOS region 320a of the substrate 320. The CMOS substrate region 330 is typically formed on the substrate by way of standard CMOS fabrication methods. For example, integrated CMOS substrate regions may be deposited by way of one or more of the following methods: physical vapour deposition, chemical vapour deposition, electrochemical deposition, molecular beam epitaxy, atomic layer deposition, ion implantation, photopatterning, reactive ion etching, plasma exposure. The CMOS region 320a is distinct from a component region 320b of the substrate, as will be described further with reference to FIGS. 3c to 3f hereinafter.

    [0126] Subsequently, as shown in FIG. 3b, a plurality of CMOS passivation and metallisation layers 340 are formed onto the first surface 322 of the substrate 320, overlaying the CMOS substrate region 330, to provide electrical stability and chemical isolation from the environment to the CMOS substrate region 330, and also to provide electrical connections to and/or from the CMOS substrate region 330 via metallisation interconnects 342. The metallisation interconnects 342 are formed from aluminium. In other examples, the metallisation interconnects 342 can be formed from other electrical conductors, such as copper, aluminium copper alloys, or other alloying elements. In this example, the metallisation interconnects 342 provide a CMOS metallisation structure in the plurality of CMOS passivation and metallisation layers 340. The CMOS substrate region 330 and the plurality of CMOS passivation and metallisation layers 340 together form the CMOS circuit.

    [0127] The plurality of CMOS passivation and metallisation layers 340 are formed using any suitable process known to the skilled person, such as by deposition and/or micro machining.

    [0128] In this way, the plurality of CMOS passivation and metallisation layers 340 together form one or more CMOS metallisation features within the plurality of CMOS circuit layers, surrounded by a CMOS passivation region.

    [0129] Next, a portion of the plurality of CMOS passivation and metallisation layers 340 are removed, away from the CMOS region 320a of the substrate 320, in the component region 320b of the substrate 320. In this way, the materials or structures used for the plurality of CMOS passivation and metallisation layers 340 can be not used in association with the component region 320b.

    [0130] The plurality of CMOS passivation and metallisation layers 340 are removed in the component region 320b by etching, specifically deep reactive-ion etching (DRIE) or conventional CMOS passivation removal methods in the present example, without removal of the plurality of CMOS passivation and metallisation layers 340 in the CMOS region 320a. In this step, none or substantially none of the substrate 320 is removed. A wall surface of the plurality of CMOS passivation and metallisation layers 340 makes an angle of less than 90 degrees to the first surface 322 of the substrate 320, such that the angle between the wall surface and the outermost surface of the plurality of CMOS passivation and metallisation layers 340 is obtuse, but it will be understood that the angle can be up to 90 degrees in other examples. In this example, all of the plurality of CMOS passivation and metallisation layers 340 are removed in the component region 320b, but it will be understood that only some of the plurality of CMOS passivation and metallisation layers 340 may be removed in the component region 320b in other examples.

    [0131] Following removal of the plurality of CMOS passivation and metallisation layers 340 in the component region 320b, a further passivation layer 350 is deposited over the assembly, specifically over the remaining portion of the plurality of CMOS passivation and metallisation layers 340 outside the component region 320b and over the first surface 322 of the substrate 320 in the component region 320b. In this way, the first surface 322 of the substrate 320 has deposited thereon the plurality of CMOS passivation and metallisation layers 340 in the CMOS region 320a and has deposited thereon the further passivation layer 350 in the component region 320b. The further passivation layer 350 is sometimes referred to as a MEMS passivation layer 350. In this example, the further passivation layer 350 is deposited to have a uniform thickness in a direction normal to the first surface 322 of the substrate 320. In other words, a thickness of the further passivation layer 350 in the CMOS region 320a is substantially the same as a thickness of the further passivation layer in the component region 320b. The further passivation layer 350 is formed from a material different to any of the plurality of CMOS passivation and metallisation layers 340. Specifically, the further passivation layer 350 is formed from a material chosen based on structural and functional requirements of the MEMS component to be provided in the component region 320b of the MEMS device to be formed. The further passivation layer 350 provides protection, such as electrical and chemical stability to the components of the CMOS substrate region 330, and the plurality of CMOS passivation and metallisation layers 340.

    [0132] The further passivation layer 350 typically has a thickness of between 1.0 micrometres to 10 micrometres. In this example, the thickness of the further passivation layer 350 is approximately 2 micrometres. Additionally, the further passivation layer 350 typically has a very low Young’s modulus and therefore doesn’t substantially affect the operation of the actuator (to be described subsequently).

    [0133] Next, the Micro-Electro-Mechanical Systems (MEMS) component 360 in the form of a piezoelectric actuator 360 is deposited on an outer surface 352 of the further passivation layer 350. In this example, the piezoelectric actuator 360 is formed from a plurality of layers, each deposited separately. The piezoelectric actuator 360 comprises a first electrode 362 and a second electrode 364 and a piezoelectric body 366 provided between the first electrode 362 and the second electrode 364. The piezoelectric body 366 is configured to exhibit piezoelectric behavior when the MEMS device is fully assembled, though it will be understood that this may be applied to the piezoelectric body 366 after initial deposition of the piezoelectric actuator 360 onto the further passivation layer 350.

    [0134] It will be understood that the piezoelectric actuator 360 and the further passivation layer 350 must each be formed from materials which can be deposited and for which processing to form the MEMS device is possible at environmental conditions, such as temperatures, at which damage to the CMOS substrate region 330 can be reduced or even completely avoided. A suitable such temperature is less than 450 degrees Celsius. A suitable material for the piezoelectric body 366 is aluminium nitride (AIN).

    [0135] The piezoelectric actuator 360 is provided with an opening 370 defined therein, the purpose of which will be described further hereinafter with reference to FIG. 3f.

    [0136] As shown in FIG. 3e, a portion of the further passivation layer 350 is removed, in this example by etching, adjacent to the metallisation interconnects 342 in the plurality of CMOS passivation and metallisation layers 340 in the CMOS region 320a, in particular to expose contact with the metallisation interconnects 342 otherwise adjacent to the further passivation layer 350. The etching is typically a DRIE process or a CMOS passivation etch process. In this way, a depression 375 is defined through the further passivation layer 350. Subsequently, a MEMS metallisation interconnect 380 is deposited on the further passivation layer 350 between the metallisation interconnects 342 exposed at an inner end of the depression 375 and at least one of the electrodes 362, 364 of the piezoelectric actuator 360, in this example the first electrode 362. In this way, it will be understood that control signals from the CMOS substrate region 330 can be provided to the piezoelectric actuator 360 via the metallisation interconnects 342, the MEMS metallisation interconnect 380 and the first electrode 362.

    [0137] The MEMS metallisation interconnect 380 is typically formed from aluminium. In other examples, the MEMS metallisation interconnects 380 are formed from a different electrical conductor material, such as copper, an aluminium copper alloy, or another alloy.

    [0138] Next, as illustrated in FIG. 3f, further steps are completed to provide a MEMS device 300 in the form of a droplet ejector 300. The further steps include a further deposition of an encapsulation layer 385 covering the MEMS device 360 in the form of the piezoelectric actuator 360, the MEMS metallisation interconnect 380 and the further passivation layer 350. The further steps also include further removal steps.

    [0139] The further removal steps in this example are performed to define structural features of the droplet ejector. Specifically, a nozzle structure 395 is defined by removal of material of the further passivation layer 350 in the component region 320b. The nozzle structure 395 is arranged to be defined within the opening 370 defined in the piezoelectric actuator 360 and to have a width smaller than a width of a fluid chamber 390 (as described hereinafter).

    [0140] Furthermore, the substrate 320 is removed in the component region 320b to define at least a region of a fluid chamber 390. The fluid chamber 390 is formed by etching the substrate from the second surface 324 to the first surface 322, with the etch stopping at the interface between the substrate and the further passivation layer 350 (or the nozzle structure 395). The etching is typically a DRIE process. Thus, a MEMS device 300 is formed.

    [0141] One or more droplets of fluid provided in the fluid chamber 390 can be controlled to be expelled via the nozzle 395 by activation of the piezoelectric actuator 360, controlled by the CMOS substrate region 330, as will be understood by the skilled person. Of course, control signals from further control circuitry can be provided to the CMOS substrate region 330 via further electrical connections (not shown).In this example, the fluid chamber 390 is completely filled with fluid in order to operate correctly.

    [0142] It will be understood that the materials for forming the further passivation layer 350 are chosen to be fluid repellent to ensure fluid is contained within the chamber 390, and also to ensure consistent droplet directionality. The material of the further passivation layer 350 is typically planarizing to provide an optimum surface for printhead maintenance.

    [0143] FIGS. 4 to 8 show further examples of Micro-Electro-Mechanical Systems devices in accordance with aspects of the present disclosure. Unless otherwise described, it will be understood that the features of the embodiments of the MEMS devices shown in FIGS. 4 to 8 should be understood to be substantially the same as in relation to FIGS. 3a to 3e, apart from the hereinafter noted distinctions.

    [0144] FIG. 4 shows a droplet ejector 400 wherein the further passivation layer 450 is formed to have a thickness less than that shown in FIGS. 3a to 3e.

    [0145] FIG. 5 shows a droplet ejector 500 wherein the further passivation layer 550 is formed such that a first surface 552 of the further passivation layer 550, opposite the substrate 520 is at a same perpendicular distance from the substrate 520 in both the CMOS region 520a and the component region 520b. In other words, a thickness of the further passivation layer 550 in the CMOS region 520a is less than a thickness of the further passivation layer 550 in the component region. In this way, a connection length through the MEMS passivation layer 550 in the CMOS region 520a can be shorter than were the thickness of the MEMS passivation layer 550 in the CMOS region 520a to be the same as in the component region 520b. Thus, electrical connectivity is improved. Furthermore, by ensuring a planar first surface 552 of the further passivation layer 550, maintenance system requirements of printhead wiping and capping are also improved.

    [0146] FIG. 6 shows a droplet ejector 600 wherein the further passivation layer 650 is a plurality of layers 650a, 650b, 650c. Each of the plurality of layers is typically chosen to provide a desired structural function for the MEMS component in the form of the piezoelectric actuator 660.

    [0147] FIG. 7 shows a droplet ejector 700 wherein the droplet ejector comprises a plurality of MEMS components 760a, 760b, 760c, in the form of a plurality of piezoelectric actuators 760a, 760b, 760c. The first piezoelectric actuator 760a is electrically connected to the CMOS substrate region 730. Each piezoelectric actuator 760a, 760b, 760c is provided with a nozzle. Although not shown, it will be understood that typically each piezoelectric actuator 760a, 760b, 760c is electrically connected to the CMOS substrate region 730 such that the CMOS substrate region 730 can be used to control each of the piezoelectric actuators 760a, 760b, 760c.

    [0148] FIG. 8 shows a droplet ejector 800 similar to the droplet ejector shown in FIG. 7, though including a plurality of CMOS substrate regions 830a, 830b. In this example, the first CMOS substrate region 830a is a low voltage CMOS substrate region 830a and the second CMOS substrate region 830b is a high voltage CMOS substrate region 830b. The low voltage CMOS substrate region 830a is separated (i.e., electrically isolated, such as electrically stabilised) from the high voltage CMOS substrate region 830b by a deep trench isolation (DTI) feature 835a. A further DTI feature 835b is provided between the high voltage CMOS substrate region 830b and the fluid chamber 890 defined in the component region 820b of the substrate 820.

    [0149] It will be understood that the representation of the MEMS device shown in the present Figures is shown for schematic illustration only and is not intended to be considered to be to scale or proportion.

    [0150] FIG. 9 is a flowchart illustrating a method of forming a Micro-Electro-Mechanical Systems device in accordance with aspects of the present disclosure. The method 900 is substantially similar to that described with reference to FIGS. 3a to 3f described hereinbefore. Briefly, the method 900 is a method of forming a MEMS device by replacing one or more CMOS passivation layers and/or CMOS metallisation layers in a component region of the MEMS device with a MEMS layer. In this way, the MEMS component can be formed from materials different to those chosen for their utility as CMOS passivation layers and/or CMOS metallisation layers.

    [0151] Specifically, the method 900 is a method of manufacturing a MEMS device comprising a movable Micro-Electro-Mechanical component and a CMOS circuit configured to be in conductive communication with the Micro-Electro-Mechanical component. The method 900 comprises forming 910 a CMOS circuit, including a plurality of CMOS passivation layers and a plurality of CMOS metallisation layers. Typically, the CMOS circuit is formed to comprise a plurality of transistors configured such that the CMOS circuit forms as a controller. Electrical signals can be exchanged with the CMOS circuit via the plurality of CMOS metallisation layers.

    [0152] Subsequent to formation 910 of the CMOS circuit, the method 900 comprises removing 920 a portion of at least one of the plurality of CMOS passivation layers and/or the plurality of CMOS metallisation layers in a component region of the device. As described hereinbefore, the portion is typically removed by an etching process, such as a DRIE process.

    [0153] After removal 920 of the portion, the method 900 comprises forming 930 one or more component region layers in place of the removed portion. The one or more component region layers are formed in the component region and form the movable Micro-Electro-Mechanical component. Significantly, by forming at least one of the one or more component region layers from a material different from the removed portion, the resulting MEMS device can have structural features in the MEMS component which are chosen specifically to support the functionality of the MEMS component.

    [0154] The method 900 optionally further comprises etching (940) the substrate in the component region to define a substrate opening therein. Typically, the substrate opening is configured to extend within the substrate to a boundary between the substrate and the one or more component region layers in the component region. In some examples, the etching step is configured to proceed through the substrate and to stop at the boundary between the substrate and the one or more component region layers in the component region. In this way, the one or more component region layers in the component region can be released from the substrate, improving their ability to flex.

    [0155] In summary, there is provided a method (900) of manufacturing a Micro-Electro-Mechanical Systems, MEMS, device. The MEMS device comprises a movable Micro-Electro-Mechanical component (360) and a CMOS circuit (330, 340, 342) configured to be in conductive communication with the Micro-Electro-Mechanical component. The method comprises; forming (910) a plurality of CMOS circuit layers (330, 340, 342), the one or more CMOS circuit layers comprises a plurality of CMOS passivation layers and a plurality of CMOS metallisation layers (340); removing (920) a portion of at least one of the plurality of CMOS passivation layers and/or the plurality of CMOS metallisation layers (340) in a component region (320b) of the device; and forming (930) one or more component region layers (350, 352, 364, 366) in the component region to form the movable Micro-Electro-Mechanical component (360). The one or more component region layers are formed from a material different from the portion of the at least one of the one or more CMOS circuit layers.

    [0156] Throughout the description and claims of this specification, the words “comprise” and “contain” and variations of them mean “including but not limited to”, and they are not intended to and do not exclude other components, integers or steps. Throughout the description and claims of this specification, the singular encompasses the plural unless the context otherwise requires. In particular, where the indefinite article is used, the specification is to be understood as contemplating plurality as well as singularity, unless the context requires otherwise.

    [0157] Features, integers, characteristics or groups described in conjunction with a particular aspect, embodiment or example of the invention are to be understood to be applicable to any other aspect, embodiment or example described herein unless incompatible therewith. All of the features disclosed in this specification including any accompanying claims, abstract and drawings), and/or all of the steps of any method or process so disclosed, may be combined in any combination, except combinations where at least some of such features and/or steps are mutually exclusive. The invention is not restricted to the details of any foregoing embodiments. The invention extends to any novel one, or any novel combination, of the features disclosed in this specification including any accompanying claims, abstract and drawings), or to any novel one, or any novel combination, of the steps of any method or process so disclosed.