ON-STATE VOLTAGE MEASUREMENT OF HIGH-SIDE AND LOW-SIDE POWER TRANSISTORS IN A HALF-BRIDGE FOR IN-SITU PROGNOSTICS
20230314487 · 2023-10-05
Inventors
- Chondon Roy (Charlotte, NC, US)
- James Gafford (Charlotte, NC, US)
- Namwon Kim (KNOXVILLE, TN, US)
- Babak Parkhideh (Charlotte, NC, US)
Cpc classification
International classification
Abstract
Various examples are provided for on-state voltage sensing for in-situ monitoring and prognostics. In one example, an on-state monitoring circuit includes clamping circuitry including high-side and low-side voltage clamping circuits associated with high-side and low-side switching devices of a half-bridge (HB) leg of an converter, on-state voltage circuitry including high-side and low-side voltage measurement circuits, the high-side and low-side circuits referenced to the positive and negative buses of the converter respectively, and output circuitry including high-side and low-side isolation circuits that provide isolated outputs referenced to a control ground of the converter. In another example, an on-state voltage measurement circuit includes clamping circuitry including high-side and low-side voltage clamping circuits referenced to a common point between high-side and low-side switching devices of a HB leg, on-state voltage circuitry including high-side and low-side voltage measurement circuits and a voltage merger circuit, and output circuitry including an isolation circuit providing a single output containing both high-side on-state voltage and low-side on-state voltage.
Claims
1. An on-state voltage measurement circuit, comprising: clamping circuitry comprising: a high-side voltage clamping circuit coupled across a high-side switching device of a half-bridge (HB) leg of a converter, the high-side voltage clamping circuit comprising a series of diodes connected to a source of the high-side switching device, the series of diodes comprising a clamped point between a first diode connected to the source of the high-side switching device and a second diode, where the clamped point is coupled to the positive DC bus via a Zener diode; and a low-side voltage clamping circuit coupled across a low-side switching device of the HB leg, the low-side voltage clamping circuit comprising a series of diodes connected to a drain of the low-side switching device, the series of diodes comprising a clamped point between a first diode connected to the drain of the low-side switching device and a second diode, where the clamped point is coupled to the negative DC bus via a Zener diode; on-state voltage circuitry comprising: a high-side voltage measurement circuit configured to provide a non-isolated high-side on-state voltage based upon a clamped point voltage and a forward voltage measured across the second diode of the high-side voltage clamping circuit, referenced to the positive DC bus of the converter; and a low-side voltage measurement circuit configured to provide a non-isolated low-side on-state voltage based upon a clamped point voltage and a forward voltage measured across the second diode of the low-side voltage clamping circuit, referenced to the negative DC bus of the converter; and output circuitry comprising: a high-side isolation circuit configured to provide an isolated high-side on-state voltage with reference to a control ground of the converter from the non-isolated high-side on-state voltage; and a low-side isolation circuit configured to provide an isolated low-side on-state voltage with reference to the control ground from the non-isolated low-side on-state voltage.
2. The on-state voltage measurement circuit of claim 1, wherein the high-side voltage clamping circuit is referenced to the positive DC bus via a first isolated power supply and the low-side voltage clamping circuit is referenced to the negative DC bus via a second isolated power supply.
3. The on-state voltage measurement circuit of claim 2, wherein the first and second isolated power supplies are each connected in parallel with a capacitor and in series with a resistor.
4. The on-state voltage measurement circuit of claim 1, comprising a phase current sensor associated with the HB leg, wherein on-state resistances of the high-side and low side switching devices are determined based upon the isolated high-side and low-side on-state voltages and corresponding phase currents measured by the phase current sensor.
5. The on-state voltage measurement circuit of claim 1, wherein the high-side voltage measurement circuit comprises a first differential amplifier configured to measure the forward voltage across the second diode of the high-side voltage clamping circuit and a second differential amplifier configured to provide the non-isolated high-side on-state voltage by subtracting the forward voltage from a voltage at the clamped point of the high-side voltage clamping circuit.
6. The on-state voltage measurement circuit of claim 1, wherein the low-side voltage measurement circuit comprises a first differential amplifier configured to measure the forward voltage across the second diode of the low-side voltage clamping circuit and a second differential amplifier configured to provide the non-isolated low-side on-state voltage by subtracting the forward voltage from a voltage at the clamped point of the low-side voltage clamping circuit.
7. The on-state voltage measurement circuit of claim 1, wherein the high-side isolation circuit comprises an isolator configured to provide the isolated high-side on-state voltage based upon the non-isolated high-side on-state voltage referenced to the positive DC bus.
8. The on-state voltage measurement circuit of claim 1, wherein the low-side isolation circuit comprises an isolator configured to provide the isolated low-side on-state voltage based upon the non-isolated low-side on-state voltage referenced to the negative DC bus.
9. The on-state voltage measurement circuit of claim 1, further comprising: second clamping circuitry comprising: a second high-side voltage clamping circuit coupled across a high-side switching device of a second HB leg of the converter, the second high-side voltage clamping circuit comprising a series of diodes connected to a source of the high-side switching device, the series of diodes comprising a clamped point between a first diode connected to the source of the second high-side switching device and a second diode, where the clamped point is coupled to the positive DC bus via a Zener diode; and a second low-side voltage clamping circuit coupled across a low-side switching device of the second HB leg, the second low-side voltage clamping circuit comprising a series of diodes connected to a drain of the low-side switching device, the series of diodes comprising a clamped point between a first diode connected to the drain of the low-side switching device and a second diode, where the clamped point is coupled to the negative DC bus via a Zener diode; and second on-state voltage circuitry comprising: a second high-side voltage measurement circuit configured to provide a second non-isolated high-side on-state voltage based upon a clamped point voltage and a forward voltage measured across the second diode of the second high-side voltage clamping circuit, referenced to the positive DC bus of the converter; and a second low-side voltage measurement circuit configured to provide a second non-isolated low-side on-state voltage based upon a clamped point voltage and a forward voltage measured across the second diode of the second low-side voltage clamping circuit, referenced to the negative DC bus of the converter.
10. The on-state voltage measurement circuit of claim 9, wherein the high-side isolation circuit is configured to further provide a second isolated high-side on-state voltage with reference to the control ground from the second non-isolated high-side on-state voltage; and the low-side isolation circuit is configured to further provide a second isolated low-side on-state voltage with reference to the control ground from the second non-isolated low-side on-state voltage.
11. The on-state voltage measurement circuit of claim 9, further comprising: third clamping circuitry comprising: a third high-side voltage clamping circuit coupled across a high-side switching device of a third HB leg of the converter, the third high-side voltage clamping circuit comprising a series of diodes connected to a source of the high-side switching device, the series of diodes comprising a clamped point between a first diode connected to the source of the second high-side switching device and a second diode, where the clamped point is coupled to the positive DC bus via a Zener diode; and a third low-side voltage clamping circuit coupled across a low-side switching device of the third HB leg, the third low-side measurement circuit comprising a series of diodes connected to a drain of the low-side switching device, the series of diodes comprising a clamped point between a first diode connected to the drain of the low-side switching device and a second diode, where the clamped point is coupled to the negative DC bus via a Zener diode; and third on-state voltage circuitry comprising: a third high-side voltage measurement circuit configured to provide a third non-isolated high-side on-state voltage based upon a clamped point voltage and a forward voltage measured across a second diode of the third high-side voltage clamping circuit, referenced to the positive DC bus of the converter; and a third low-side voltage measurement circuit configured to provide a third non-isolated low-side on-state voltage based upon a clamped point voltage and a forward voltage measured across the second diode of the third low-side voltage clamping circuit, referenced to the negative DC bus of the converter.
12. The on-state voltage measurement circuit of claim 11, wherein the high-side isolation circuit is configured to further provide a third isolated high-side on-state voltage with reference to the control ground from the third non-isolated high-side on-state voltage; and the low-side isolation circuit is configured to further provide a third isolated low-side on-state voltage with reference to the control ground from the third non-isolated low-side on-state voltage.
13. The on-state voltage measurement circuit of claim 11, further comprising: fourth clamping circuitry comprising: a fourth high-side voltage clamping circuit coupled across a high-side switching device of a fourth HB leg of the converter, the fourth high-side voltage clamping circuit comprising a series of diodes connected to a source of the high-side switching device, the series of diodes comprising a clamped point between a first diode connected to the source of the second high-side switching device and a second diode, where the clamped point is coupled to the positive DC bus via a Zener diode; and a fourth low-side voltage clamping circuit coupled across a low-side switching device of the fourth HB leg, the fourth low-side measurement circuit comprising a series of diodes connected to a drain of the low-side switching device, the series of diodes comprising a clamped point between a first diode connected to the drain of the low-side switching device and a second diode, where the clamped point is coupled to the negative DC bus via a Zener diode; and fourth on-state voltage circuitry comprising: a fourth high-side voltage measurement circuit configured to provide a fourth non-isolated high-side on-state voltage based upon a clamped point voltage and a forward voltage measured across a second diode of the fourth high-side voltage clamping circuit, referenced to the positive DC bus of the converter; and a low-side voltage measurement circuit configured to provide a fourth non-isolated low-side on-state voltage based upon a clamped point voltage and a forward voltage measured across the second diode of the fourth low-side voltage clamping circuit, referenced to the negative DC bus of the converter.
14. The on-state voltage measurement circuit of claim 12, wherein the high-side isolation circuit is configured to further provide a fourth isolated high-side on-state voltage with reference to the control ground from the fourth non-isolated high-side on-state voltage; and the low-side isolation circuit is configured to further provide a fourth isolated low-side on-state voltage with reference to the control ground from the fourth non-isolated low-side on-state voltage.
15. An on-state voltage measurement circuit, comprising: clamping circuitry comprising: a high-side voltage clamping circuit coupled across a high-side switching device of a half-bridge (HB) leg of a converter, the high-side voltage clamping circuit comprising a series of diodes connected to a drain of the high-side switching device, the series of diodes comprising a clamped point between a first diode connected to the drain of the high-side switching device and a second diode, where the clamped point is coupled to the common point of the HB leg via a Zener diode; and a low-side voltage clamping circuit coupled across the low-side switching device of the HB leg, the low-side voltage clamping circuit comprising a series of diodes connected to a source of the low-side switching device and referenced to the common point of the HB leg, the series of diodes comprising a clamped point between a first diode connected to the source of the low-side switching device and a second diode, where the clamped point is coupled to the common point of the HB leg via a Zener diode; on-state voltage circuitry comprising: a high-side voltage measurement circuit configured to provide a high-side on-state voltage based upon a clamped point voltage and a forward voltage measured across the second diode of the high-side voltage clamping circuit, referenced to a common point of the HB leg between the high-side switching device and a low-side switching device; a low-side voltage measurement circuit configured to provide a low-side on-state voltage based upon a clamped point voltage and a forward voltage measured across the second diode of the low-side voltage clamping circuit, referenced to a common point of the HB leg between the high-side switching device and a low-side switching device; and a voltage merger circuit configured to provide a single non-isolated combined on-state voltage based upon the high-side on-state voltage, the low-side on-state voltage and a offset voltage; and output circuitry comprising an isolation circuit configured to provide an isolated on-state voltage with reference to a control ground of the converter from the single non-isolated combined on-state voltage.
16. The on-state voltage measurement circuit of claim 15, wherein the second diode of the high-side voltage clamping circuit is referenced to the common point of the HB leg via a first power source of an isolated power supply and the second diode of the low-side voltage clamping circuit is referenced to the common point via a second power source of the isolated power supply.
17. The on-state voltage measurement circuit of claim 15, wherein the high-side voltage measurement circuit comprises a first differential amplifier configured to measure the forward voltage across the second diode of the high-side voltage clamping circuit and a second differential amplifier configured to provide the non-isolated high-side on-state voltage by subtracting the forward voltage from a voltage at the clamped point of the high-side voltage clamping circuit.
18. The on-state voltage measurement circuit of claim 17, wherein the low-side voltage measurement circuit comprises a first differential amplifier configured to measure the forward voltage across the second diode of the low-side voltage clamping circuit and a second differential amplifier configured to provide the non-isolated low-side on-state voltage by subtracting the forward voltage from a voltage at the clamped point of the low-side voltage clamping circuit.
19. The on-state voltage measurement circuit of claim 18, wherein the on-state circuit comprises a first differential amplifier configured to provide a combined on-state voltage by combining the non-isolated high-side on-state voltage and the non-isolated low-side on-state voltage, and a second differential amplifier configured to provide the non-isolated on-state voltage by adjusting the combined on-state voltage with the offset voltage.
20. The on-state voltage measurement circuit of claim 15, wherein the isolation circuit comprises an isolator configured to provide the isolated on-state voltage based upon the non-isolated on-state voltage.
Description
BRIEF DESCRIPTION OF THE DRAWINGS
[0008] Many aspects of the present disclosure can be better understood with reference to the following drawings. The components in the drawings are not necessarily to scale, emphasis instead being placed upon clearly illustrating the principles of the present disclosure. Moreover, in the drawings, like reference numerals designate corresponding parts throughout the several views.
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DETAILED DESCRIPTION
[0027] Disclosed herein are various examples of apparatus, systems and methods related to on-state voltage sensing for in-situ monitoring and prognostics. Reference will now be made in detail to the description of the embodiments as illustrated in the drawings, wherein like reference numbers indicate like parts throughout the several views.
[0028] Wide bandgap (WBG) semiconductor devices could be deployed in a wide range of practical applications if the device's health status could be monitored in real-time to prevent a sudden failure. The device ages through different degradation mechanisms caused by various electro-mechanical stresses in long-term operations. Many degradation mechanisms such as gate-oxide degradation and bond wire degradation lead to increased R.sub.DSON. Therefore, R.sub.DSON is a good indicator of device health status, which can be used for in-situ prognostics.
[0029] Implementation of in-situ monitoring of R.sub.DSON of power transistors has been attempted on a low-side device either in a double pulse test (DPT) setup or in a converter where the low-side device acts as an active switch such as a DC-DC boost converter or a PFC converter. A complete system-level condition monitoring of a three-phase inverter having three half-bridge (HB) legs has been considered. Although the proposed condition monitoring method uses much fewer components and is easy to be implemented in an inverter system, it is an indirect method that extracts the health monitoring indicators of the IGBT modules from the inverter output voltage measurement circuit. The extracted measurement output contains combined health information of two devices, where independent health monitoring of individual transistors is not achievable. Independent and simultaneous on-state voltage (V.sub.DSON) measurement of individual transistors is more effective as a failure of a single transistor may lead to the failure of the entire system.
[0030] This disclosure considers a solution to implement R.sub.DSON monitoring of all power transistors used in a power electronics converter having single or multiple HB legs, such as a three-phase four-leg DC-AC inverter. In this process, measuring the high-side R.sub.DSON was found to be the most challenging part. A new V.sub.DSON measurement circuit is proposed to address this challenge. A complete in-situ R.sub.DSON monitoring architecture was implemented in an inverter using the proposed circuit along with signal isolation and complementary circuitry. The feasibility and the effectiveness of the proposed V.sub.DSON measurement circuit were verified through experimental results of SiC MOSFETs modules' double pulse tests.
[0031] Challenges of In-Situ Prognostics
[0032] A power electronics converter can be controlled by a control system comprising processing circuitry such as a digital microcontroller or an FPGA. A control system not only sends pulse-width modulation signals to the gate drive circuits but also receives many different measurement signals for various functions such as closed-loop control algorithms, status monitoring, system protection, etc. These measurements can be referenced to a control reference (e.g., a control ground) to be applied to and processed in the control system. In the in-situ prognostics applications, the V.sub.DSON and drain-current (I.sub.D) of a power transistor referenced to the control ground can be sent to the control system to calculate the R.sub.DSON. In a three-phase DC-AC inverter having multiple HB legs (e.g., 3 or 4), however, all V.sub.DSON measurements of individual power transistors do not have a common V.sub.DSON measurement reference. Therefore, measured V.sub.DSON of different MOSFETs cannot be tied to the control reference directly. This issue leads to challenges of implementing the in-situ prognostics to practical power electronics converters.
[0033] V.sub.DSON of individual transistors can be measured using conventional approaches. The challenge is to translate these measurements to the control system with respect to the control ground. In a half-bridge circuit for example, the V.sub.DSON measurement of the high side and low-side devices cannot share a common reference signal. In a multi-phase inverter, the lack of a common reference signal for the transistors increases the complexity of V.sub.DSON measurement. On-state voltage measurement using existing sensors utilizes three different measurement references for the high-side devices, which needs three isolated power supplies for three high side sensors and one for the low side sensors. Because of the complexity associated with the measurement and the reference, many works that have reported direct R.sub.DSON measurement have been mainly done on the V.sub.DSON measurement of the low-side devices. In a multi-phase half-bridge inverter, the low-side devices share a common reference. In many designs, this reference can be tied to the control reference.
[0034] An in-situ monitoring approach obtaining V.sub.DSON information of both high-side and low-side devices in a three-phase three-leg inverter has been considered, where the sensing circuit is connected between two AC output phases and measures the sum of the V.sub.DSON of one transistor and the forward voltage drop of one diode. This approach can potentially monitor multiple transistors in a three-phase system with a single reference of measurement. Nevertheless, the reference of the measurement can be one phase from the three. This method may be limited in application and accuracy, as the power circuit terminals and the control ground can be separated or isolated. Therefore, an advanced V.sub.DSON measurement system can be used, where any number of transistors can be monitored independently and simultaneously without the need to be connected to a certain reference point and instead directly connected to the control reference.
[0035] Proposed In-Situ Prognostics
[0036] Proposed V.sub.DSON Measurement Method. A circuit capable of enabling V.sub.DSON measurement of the high-side devices has been developed. The proposed circuit measures the V.sub.DSON of the high-side transistors in reference to the drain (DC Bus +), as opposed to referenced to the source terminal that is used in conventional V.sub.DSON measurement circuits. The high-side sensors use the same reference (DC+) for all the three high side devices, which needs only one isolated power supply for the high-side sensors and another for the the low side sensors. An example of the proposed circuit for high-side and low side V.sub.DSON measurement is illustrated in
[0037] The V.sub.DSON measurement circuit comprises three stages. The first stage is a clamping stage, which clamps the high voltage when the transistor is off and passes only the low V.sub.DSON when the transistor is on. A high voltage Schottky diode (D1) is connected to the source of the high-side transistor, which only allows current flow from the source to the V.sub.DSON measurement circuit. The V.sub.DSON measurement circuit references the drain of the high-side transistor. The clamped point indicated as node 1, where the cathode of the blocking diode (D1) is connected, has a voltage potential within a setpoint set by the Zener diode (DZ1) (e.g., 3V in the circuits used in this disclosure) below the drain potential. When the transistor is turned off, the transistor has much higher potential in its drain terminal compared to the source. Therefore, the blocking diode (D1) becomes reverse biased and disconnects the source terminal from the measurement circuit. When the transistor is turned on, the transistor has a very small potential difference between the drain and the source terminals. This potential difference makes the blocking diode (D1) forward biased, completing the circuit through the transistor. Node 1 now measures the inverted sum of V.sub.DSON and the forward voltage drop (V.sub.F) of the Schottky diode (D1). The voltage at node 1 is presented in Table I below.
[0038] Actual V.sub.DSON can be calculated by subtracting the diode forward voltage drop (V.sub.F) from the absolute value of the voltage at node 1. However, the forward voltage drop of the Schottky diode is dependent on the current through it and the junction temperature. It is possible to estimate the forward voltage drop across the Schottky diode if the temperature is known, however, accurate and reliable junction temperature estimation is problematic. To overcome this issue, another Schottky diode (D2), same with the blocking diode (D1), is placed in series very close to the blocking diode (D1) so that they operate at a similar temperature level. When the transistor is on, the same current flows through these two diodes (D1 & D2), ensuring the same forward voltage drop across each of these two diodes. The voltage drop across the second diode (D2) is measured using a differential amplifier circuit which is a part of the second stage of the V.sub.DSON measurement circuit. The output of this circuit is measured at node 2. The voltage at node 1 is then subtracted from the voltage at node 2 to get the V.sub.DSON of the DUT, which is indicated at node 3. Node 4 is the output of the last stage that translates the measured V.sub.DSON from the measurement circuit reference (DC Bus +) to the control circuit reference.
[0039] The low-side V.sub.DSON measurement circuit works in a similar way, except it references the negative DC bus (DC Bus −). The voltages at different measurement nodes are described in Table I.
TABLE-US-00001 TABLE I Measurements at Different Nodes Node High-side Low-side MOSFET Status 1 −(V.sub.DSON + V.sub.F) V.sub.DSON + V.sub.F ON −3 V 3 V OFF 2 −V.sub.F V.sub.F X 3 V.sub.DSON = V.sub.NODE2 − V.sub.NODE1 V.sub.DSON = V.sub.NODE1 − V.sub.NODE2 ON 3 − V.sub.F = V.sub.NODE2 − V.sub.NODE1 3 − V.sub.F = V.sub.NODE2 − V.sub.NODE1 OFF
[0040] Proposed R.sub.DSON Monitoring for In-situ Prognostics. The proposed approach of in-situ R.sub.DSON monitoring is presented in
[0041] Hardware Setup and Experiment Results
[0042] The proposed in-situ R.sub.DSON monitoring was implemented in a three-phase four-leg inverter. The specification of the inverter is presented in Table II. Different components of the inverter are arranged vertically for a compact design.
TABLE-US-00002 TABLE II Specification of the Three-Phase Four-Leg DC-AC Inverter Parameter Value Unit Power 75 kW Input Voltage 1000 VDC Output Voltage 480 VAC Topology 3-∅, 4-leg Switching Frequency 30 kHz No of Half-bridge modules 4 SiC Module CAS300M17BM2
[0043] The accuracy of the proposed circuits was verified by monitoring signals at different nodes and comparing the measurements with theoretical calculations. As presented in
[0044] For R.sub.DSON monitoring, the device drain current I.sub.D is needed along with the V.sub.DSON measurement. Commercial hall effect current sensors have been used for the phase current measurement, as presented in
[0045] Recorded current and voltage waveforms for the high-side MOSFET of module-1 (S1) are presented in
TABLE-US-00003 TABLE III Measured RDSON R.sub.DSON Typical R.sub.DSON Deviation from Measured listed on the typical R.sub.DSON MOSFET (mΩ) Datasheet mΩ % S1 6.88 7.3 mΩ 0.42 5.8 S2 7.69 (100 A, 25° C.) −0.39 −5.3 S3 7.09 0.21 2.9 S4 7.27 0.03 0.4 S5 6.81 0.49 6.7 S6 7.14 0.16 2.2
[0046] The datasheet indicates that the SiC MOSFET has a typical resistance of 8 mΩ and a maximum 10 mΩ R.sub.DSON under 300 A, 25° C. operating condition. The typical and maximum values suggest that the R.sub.DSON may vary as much as 25% from the typical value. The typical R.sub.DSON is estimated to be 7.3 mΩ under 100 A and 25° C., from the graphs in the datasheet. Therefore, based on the deviation range provided for 300 A current, the maximum R.sub.DSON can be 9.125 mΩ under 100 A current and 25° C. temperature. The deviation of the measured R.sub.DSON from typical datasheet value is less than 0.5 mΩ (6.7%). While the exact accuracy of the measurement cannot be calculate based on the typical value, the accuracy is within the range specified for the released part.
[0047] The challenges of in-situ prognostics have been investigated, and a new on-state voltage measurement circuit, which can measure the V.sub.DSON of the high-side power transistors by referencing the positive DC bus and provide an absolute measurement of the V.sub.DSON, has been presented. Measured V.sub.DSON can then be translated into the controller side reference using an analog isolator. The proposed high-side V.sub.DSON measurement circuit enables a single reference point for all high-side transistors, which reduces component count and simplifies the implementation. This new V.sub.DSON measurement circuit along with low-side V.sub.DSON measurement circuit can be used in, e.g., a three-phase four-leg inverter for real-time in-situ R.sub.DSON monitoring for prognostics and lifetime prediction. The proposed circuit was validated using experimental results. The proposed method can facilitate simultaneous measurement of all the MOSFETs in the inverter. R.sub.DSON was recorded for all the MOSFETs in three phases in multiple double pulse tests and the deviation of the measured R.sub.DSON from the typical value specified in the datasheet was found to be less than 6.7% (0.5 mΩ). Therefore, the accuracy is within the datasheet specified range: 25% from the typical value, which can make the methodology more than accurate enough for use in real world applications.
[0048] Half-Bridge On-State Voltage Sensing
[0049] Device degradation mechanisms can lead to increase of on-state voltage (V.sub.ON) at a certain current. Real-time monitoring of the device degradation can predict possible device failure enabling users to act to prevent system interruption, thus increasing system reliability. At present, state-of-the-art V.sub.ON sensors measure the V.sub.ON of a single transistor, and each sensing circuit has a measurement output signal per transistor as illustrated in
[0050] The current disclosure presents a V.sub.ON sensor capable of measuring the V.sub.ON of both the high-side and low-side devices in a single measurement signal.
[0051] Proposed Half-Bridge V.sub.ON Sensor
[0052] In most applications, the high-side and low-side devices in a HB are turned ON and OFF in a complimentary manner. When the high-side device is turned ON, the low-side device is turned OFF and vice versa to prevent shoot-through. The proposed HB V.sub.ON sensor (HBV.sub.ON) sensor measures the V.sub.ON of both the high-side and low-side devices independently and then combines them to a single sensor output.
[0053] The first stage is the clamping circuit that clamps the high voltages from the transistor nodes when the transistors are in off-state. The components (except the blocking diodes) used in the sensor have a lower voltage rating (under 25V) while the HB operates in hundreds of volts. The blocking diodes block the high-voltage and clamp the sensing circuit voltages within a set voltage to prevent damage to the circuit. The operating principle of the combined voltage clamping circuits of the HB V.sub.ON sensor is highlighted in
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[0056] Referring again to
[0057] In the fifth stage, an offset voltage generator generates a voltage equal to V.sub.C, the voltage offset present at the output of the fourth stage. This voltage offset is then subtracted from V.sub.4 to get the final V.sub.ON, V.sub.5. The final V.sub.ON contains V.sub.ON of the device which is in the on-state. The sixth stage is an isolation stage, which translates the final output to the control circuit reference so that the final V.sub.ON sensing output can be connected to a DSP or and ADC input pin for further in-situ health monitoring. The operation and the output of each of the signal stages are presented in Table IV. The node voltages are named in reference to the nodes illustrated in
TABLE-US-00004 TABLE IV Analog Circuit Operation at Different Nodes Analog circuit Output S1: ON, S1: OFF, operation node S2: OFF S2: ON Voltage clamp 11 V.sub.ON-S1 + V.sub.F V.sub.C + V.sub.F circuit 21 −(V.sub.C + V.sub.F) −(V.sub.ON-S2 + V.sub.F) Diode forward 12 V.sub.F V.sub.F voltage 22 V.sub.F V.sub.F measurement V.sub.11-V.sub.12 13 V.sub.ON-S1 V.sub.C V.sub.21-V.sub.22 23 −V.sub.C −V.sub.ON-S2 V.sub.13-V.sub.23 4 V.sub.ON-S1 + V.sub.C V.sub.ON-S2 + V.sub.C V.sub.4-V.sub.C 5 V.sub.ON-S1 V.sub.ON-S2 Isolation 6 V.sub.ON-S1 V.sub.ON-S2
[0058] Experiment Results
[0059] The HBV.sub.ON sensor has been designed and integrated with the gate driver board for a 1200V SiC HB module. The PCB board hardware prototype is shown in the image of
[0060] Sensor Performance Validation Under DC conditions. First, the on-state voltage accuracy of the sensor was quantified under DC conditions. To calculate the accuracy of sensor reading at the entire range of input, the configuration presented in
[0061] Although in both cases, both the high-side and low-side devices are in the off-state, this configuration provides a small, temperature independent DC voltage across one SiC FET of the half bridge module, and a large DC voltage across the other side as series operation of benchtop supplies is discouraged at hundreds of volts. At every input voltage, the voltages at different sensor nodes were recorded and presented in Table V and Table VI. Table V presents the measurements and accuracy of the high-side V.sub.ON sensor and Table VI presents the measurements and accuracy of the low-side V.sub.ON sensor. From the DC measurements, it can be seen that the non-isolated final output has a very small error (<4%) for input voltages of 0.58 V or higher. At lower input voltages the error is relatively large which may be attributed to low signal-to noise ratio. The isolated output of the sensor also has very small error (<4%) for inputs from 0.58V or higher. These errors, however, could be adjusted with appropriate calibration with the data presented in the tables.
TABLE-US-00005 TABLE V DC Characteristics of the Sensor, High-Side Device as DUT and Low-Side Device Turned Off Error in Isolated Input Final Output Error Isolated output (V) (V5) (V) V % Output V % 0.106 0.128 0.022 20.75% 0.092 0.014 13% 0.308 0.332 0.024 7.79% 0.292 0.016 5% 0.577 0.600 0.023 3.99% 0.557 0.020 3% 0.915 0.937 0.022 2.40% 0.890 0.025 3% 1.359 1.377 0.018 1.32% 1.326 0.033 2% 1.645 1.657 0.012 0.73% 1.603 0.042 3% 1.799 1.807 0.008 0.44% 1.752 0.047 3% 2.014 2.017 0.003 0.15% 1.958 0.056 3%
TABLE-US-00006 TABLE VI DC Characteristics of the Sensor, Low-Side Device as DUT and High-Side Device Turned Off Isolated Error in Isolated Input Final Output Error Output output (V) (V5) (V) V % (V) V % 0.106 0.128 0.022 20.7% 0.086 0.020 19% 0.310 0.332 0.022 7.10% 0.292 0.018 6% 0.582 0.602 0.020 3.44% 0.559 0.023 4% 0.924 0.941 0.017 1.84% 0.896 0.028 3% 1.370 1.382 0.012 0.88% 1.332 0.038 3% 1.652 1.660 0.008 0.48% 1.605 0.047 3% 1.803 1.807 0.004 0.22% 1.752 0.051 3% 2.016 2.014 0.002 0.10% 1.955 0.061 3%
[0062] Sensor Performance Validation in Double Pulse Test. In addition, to quantifying the accuracy under DC condition, the sensor performance was evaluated under switching conditions as well. To evaluate dynamic performance, a double pulse test (DPT) is conducted. In the DPT, one device is used as the device under test (DUT) while keeping the other in the off-state. The circuit configurations for the DPT tests are presented in
[0063] After addition and offset compensation, the final isolated output of the HBV.sub.ON sensor provides the V.sub.ON of the high-side device. During the off-state of the DUT, the high-side sensing part of the sensor measures a constant voltage, but the low-side sensing part of the device measures negative voltage as current flows through the body diode of the low-side device during this period. This negative voltage is clamped at the final sensor output. Thus, the final sensor output provides the V.sub.ON of the high-side device when it is ON and a zero voltage when it is OFF. The sensor currently measures only positive voltage drop from drain to source of a MOSFET, but can be redesigned to measure voltage in the opposite direction as well. Similarly, when the low-side device is used as the DUT, the sensor final output provides V.sub.ON of the low-side device when it is ON and a zero voltage when it is OFF.
[0064] Using the measured V.sub.ON and the current information from the captured data, the on-state resistance (R.sub.ON) of the DUTs are calculated and presented in
[0065] Application of the HB V.sub.ON Sensor in an Inverter. The final experiment was conducted with the HBV.sub.ON sensor when the HB was used in a practical operation where the high-side and low-side devices were turned-on and off in a complimentary manner. In this test, for a half-cycle, the high-side device was turned ON and, for the remaining half-cycle, the low-side device was turned ON.
[0066]
[0067] An application oriented on-state voltage sensor for HB architecture that provides V.sub.ON of both the high-side and low-side devices in a single sensor output has been presented. The proposed sensor reduces the number of signal processing channels which makes system level implementations easier compared to solutions available at present. The architecture also allows the sensor to be integrated with the gate driving circuit for a compact system design. A HBV.sub.ON sensor prototype was designed with the proposed circuit and integrated with the gate driver for SiC HB modules. Experiment results have been presented under DC and dynamic conditions The output has less than 4% error for voltages 0.5V and higher. Rory calculations have been presented using the HBV.sub.ON output for a SiC HB. Calculated R.sub.ON falls within the datasheet provided information thus validating the sensor performance.
[0068] It should be emphasized that the above-described embodiments of the present disclosure are merely possible examples of implementations set forth for a clear understanding of the principles of the disclosure. Many variations and modifications may be made to the above-described embodiment(s) without departing substantially from the spirit and principles of the disclosure. All such modifications and variations are intended to be included herein within the scope of this disclosure and protected by the following claims.
[0069] The term “substantially” is meant to permit deviations from the descriptive term that don't negatively impact the intended purpose. Descriptive terms are implicitly understood to be modified by the word substantially, even if the term is not explicitly modified by the word substantially.
[0070] It should be noted that ratios, concentrations, amounts, and other numerical data may be expressed herein in a range format. It is to be understood that such a range format is used for convenience and brevity, and thus, should be interpreted in a flexible manner to include not only the numerical values explicitly recited as the limits of the range, but also to include all the individual numerical values or sub-ranges encompassed within that range as if each numerical value and sub-range is explicitly recited. To illustrate, a concentration range of “about 0.1% to about 5%” should be interpreted to include not only the explicitly recited concentration of about 0.1 wt % to about 5 wt %, but also include individual concentrations (e.g., 1%, 2%, 3%, and 4%) and the sub-ranges (e.g., 0.5%, 1.1%, 2.2%, 3.3%, and 4.4%) within the indicated range. The term “about” can include traditional rounding according to significant figures of numerical values. In addition, the phrase “about ‘x’ to ‘y’” includes “about ‘x’ to about ‘y’”.