METHOD AND APPARATUS FOR ASCERTAINING AN AVERAGE CHOKE CURRENT OR AN INPUT OR OUTPUT VOLTAGE IN A STEP-UP OR STEP-DOWN CONVERTER

20230296653 · 2023-09-21

    Inventors

    Cpc classification

    International classification

    Abstract

    Method (100) for ascertaining a parameter (I_avg, I_N, I_P, V_c), wherein the parameter (I_avg, I_N, I_P, V_c) characterizes a current or a voltage in a circuit arrangement (200). The circuit arrangement (200) comprises an inductor (L) through which an alternating choke current (I_L) flows. The method comprises the steps of: ascertaining (120) at least one duration (TN1) between two zero crossings (N_−, N_+) of the choke current (I_L), or a duration (TNE1) between a zero crossing (N_−, N_+) and a vertex (E_−, E_+) of the choke current (I_L); ascertaining (130) the parameter (I_avg, I_N, I_P, V_c) as a function of the ascertained duration (TN1, TNE1).

    Claims

    1. A method (100) for determining a parameter (I_avg, I_N, I_P, V_c), wherein the parameter (I_avg, I_N, I_P, V_c) characterizes a current or a voltage in a circuit arrangement (200), wherein the circuit arrangement (200) comprises an inductor (L), wherein an alternating choke current (I_L) flows through the inductor (L), said method comprising the steps of: determining (120) at least one duration (TN1) between two zero crossings (N_−, N_+) of the choke current (I_L) or a duration (TNE1) between a zero crossing (N_−, N_+) and a vertex (E_−, E_+) of the choke current (I_L) (define zero crossing, vertex, switching time in description); and determining (130) the parameter (I_avg, I_N, I_P, V_c) as a function of the ascertained duration (TN1, TNE1).

    2. The method (100) according to claim 1 for determining a parameter (V_c), wherein the parameter (V_c) characterizes a voltage between a first potential (P1) and a second potential (P2) in the circuit arrangement (200), wherein the circuit arrangement (200) comprises at least one half bridge having a first switching element (S1) and a second switching element (S2), wherein the first switching element (S1) is connected on one side to the first potential (P1) and is connected on the other side to a center tap (M) of the half bridge, wherein the second switching element (S2) is connected on one side to the second potential (P2) and is connected on the other side to the center tap (M) of the half bridge, wherein the inductor (L) is connected by a first terminal to the center tap (M) and is connected by a second terminal to a third potential (P3), wherein an input voltage (V_in) is applied between the first potential (P1) and the third potential (P3), said method comprising the steps of: alternately actuating (110) the first and the second switching element (S1, S2) at a specifiable duty factor (a1), such that the alternating choke current (I_L) through the inductor (L) results; determining (120) a first duration (TNE1) between a first zero crossing (N_+) of the current and the actuation of at least one of the switching elements (S1, S2), and determining a second duration (TNE2) between the actuation of the at least one switching element (S1, S2) and a second zero crossing (N_−) of the current; determining (130) the parameter (V_c) as a function of the input voltage (V_in), the first duration (TNE1), and the second duration (TNE2).

    3. The method (100) according to claim 2, wherein a first capacitor (C1) is connected to the first and the second potential, and the parameter (V_c) is a voltage average value of the voltage that is applied at the first capacitor (C1).

    4. The method according to claim 1, wherein determining the first duration (TNE1) and the second duration (TNE2) comprises determining a first time point of a first zero crossing (N_−) of the choke current (I_L) and determining a second time point of an actuation operation of at least one of the switching elements (S1, S2) and determining a third time point of a second zero crossing (N_+) of the choke current (I_L).

    5. The method according to claim 4, wherein the first duration (TNE1) between the first and the second time point and/or the second duration (TNE2) between the second and the third time point is ascertained by means of a counter.

    6. (canceled)

    7. A non-transitory, computer-readable storage medium comprising commands which, when executed by a computer, cause the computer to determine a parameter (I_avg, I_N, I_P, V_c), wherein the parameter (I_avg, I_N, I_P, V_c) characterizes a current or a voltage in a circuit arrangement (200), wherein the circuit arrangement (200) comprises an inductor (L), wherein an alternating choke current (I_L) flows through the inductor (L), determine (120) at least one duration (TN1) between two zero crossings (N_−, N_+) of the choke current (I_L) or a duration (TNE1) between a zero crossing (N_−, N_+) and a vertex (E_−, E_+) of the choke current (I_L) (define zero crossing, vertex, switching time in description); and determine (130) the parameter (I_avg, I_N, I_P, V_c) as a function of the ascertained duration (TN1, TNE1).

    8. A voltage estimator (280) for determining and outputting an estimated voltage (U_est) between a first potential (P1) and a second potential (P2), wherein the voltage estimator comprises a logic unit (290) and an estimator (295), wherein the logic unit (290) is configured to determine a parameter (I_avg, I_N, I_P, V_c), wherein the parameter (I_avg, I_N, I_P, V_c) characterizes a current or a voltage in a circuit arrangement (200), wherein the circuit arrangement (200) comprises an inductor (L), wherein an alternating choke current (I_L) flows through the inductor (L), determine (120) at least one duration (TN1) between two zero crossings (N_−, N_+) of the choke current (I_L) or a duration (TNE1) between a zero crossing (N_−, N_+) and a vertex (E_−, E_+) of the choke current (I_L) (define zero crossing, vertex, switching time in description); and determine (130) the parameter (I_avg, I_N, I_P, V_c) as a function of the ascertained duration (TN1, TNE1) wherein the estimator (295) is configured to predict a model-based voltage between the first potential (P1) and the second potential (P2) as a function of input variables (U), and to determine and output the estimated voltage (U_est) as a function of the model-based voltage and the ascertained parameter (V_c).

    9. An apparatus having an inductor (L), wherein the inductor (L) is arranged in a circuit arrangement (200), wherein the apparatus (300) is configured to determine a parameter (I_avg, I_N, I_P, V_c), wherein the parameter (I_avg, I_N, I_P, V_c) characterizes a current or a voltage in a circuit arrangement (200), wherein the circuit arrangement (200) comprises an inductor (L), wherein an alternating choke current (I_L) flows through the inductor (L), determine (120) at least one duration (TN1) between two zero crossings (N_−, N_+) of the choke current (I_L) or a duration (TNE1) between a zero crossing (N_−, N_+) and a vertex (E_−, E_+) of the choke current (I_L) (define zero crossing, vertex, switching time in description); and determine (130) the parameter (I_avg, I_N, I_P, V_c) as a function of the ascertained duration (TN1, TNE1), wherein the ascertained parameter (I_avg, I_N, I_P, V_c) is further used as a measured variable within the apparatus (300) or is transmitted to outside the apparatus (300) via an interface.

    10. A drivetrain (400) having an apparatus (300) according to claim 9.

    11. A vehicle (500) having a drivetrain (400) according to claim 10.

    Description

    BRIEF DESCRIPTION OF THE DRAWINGS

    [0033] The invention will be explained in more detail below with reference to some drawings, in which:

    [0034] FIG. 1 is a schematic view of a circuit arrangement,

    [0035] FIG. 2 is a schematic view of an expanded circuit arrangement,

    [0036] FIG. 3 is a schematic current/time diagram with an alternating choke current,

    [0037] FIG. 4 is a schematic view of a voltage controller or state observer,

    [0038] FIG. 5 is a schematic view of an apparatus having an inductor, wherein the inductor is located in a circuit arrangement,

    [0039] FIG. 6 is a schematic view of a vehicle having a drivetrain,

    [0040] FIG. 7 is a schematic flowchart for a method for ascertaining a parameter, wherein the parameter characterizes a current or a voltage in a circuit arrangement.

    DETAILED DESCRIPTION

    [0041] FIG. 1 shows a circuit arrangement 200, wherein the circuit arrangement 200 comprises an inductor L through which an alternating choke current I_L flows. The inductor is preferably a choke or a primary or secondary winding of a transformer, which is preferably used in a DC/DC converter or in a charging device—preferably for the galvanic separation of the input and output. The high-frequency alternating choke current I_L—preferably at a frequency of several hundred kHz—causes a current in the supply lines of the inductor L. Parameters by which this current is characterized are preferably a current average value I_avg, negative minima I_N and/or positive maxima I_P of the choke current I_L, or peak values of the choke current I_L. The choke current I_L through the inductor L also causes electrical voltages in the circuit arrangement. A parameter by which an electrical voltage is characterized—preferably when a load or impedance is connected to the inductor L—is preferably a voltage V_c which is applied between the first and the second potentials P1, P2. These parameters I_avg, I_N, I_P, V_c can be ascertained as a function of the duration TN1 between two zero crossings N_−, N_+ of the choke current I_L, or a duration TNE1 between a zero crossing N_−, N_+ and a vertex E_−, E_+ of the choke current I_L.

    [0042] Furthermore, the circuit arrangement 200 preferably comprises a half bridge having a first switching element S1 and a second switching element S2. The first switching element S1 is connected on one side to a first potential P1, and on the other side to a center tap M of the half bridge. The second switching element S2 is connected on one side to a second potential P2 and is connected on the other side to the center tap M of the half bridge. The inductor L is connected by a first terminal to the center tap M and by a second terminal to a third potential P3. An input voltage V_in is preferably applied between the first potential P1 and the third potential P3. This input voltage V_in can alternatively also be applied between the third and the second potential, or also between the first potential P1 and the second potential P2. When an input voltage V_in is applied, the alternating choke current I_L through the inductor L can be generated via suitable actuation—preferably high-frequency actuation—of the switching elements S1 and S2. The input voltage V_in is preferably a DC voltage or an AC voltage, wherein the frequency of the input voltage is very much lower than the frequency of the choke current I_L, said frequency of the input voltage preferably being approximately 50 Hz, or at least below 1 kHz. An AC voltage is preferably rectified, by means of a diode rectifier, to a DC voltage as the input voltage.

    [0043] FIG. 2 shows an expanded circuit arrangement 200 of the circuit arrangement 200 shown in FIG. 1. The circuit arrangement 200 according to FIG. 2 further comprises a first capacitor C1 which is arranged between the first potential P1 and the second potential P2, and is connected to each of these. The first capacitor C1 is preferably designed as an intermediate circuit capacitor, and preferably as an electrolytic capacitor. Preferably, a parameter which characterizes the voltage V_c at this first capacitor C1 can be ascertained as a function of a duration TNE1 and/or TNE2 between a zero crossing N_−, N_+ and a vertex E_−, E_+ of the choke current I_L (cf. also FIG. 3).

    [0044] For example, the following applies: [0045] During TNE1:

    [00001] Δ I_L Δ t = V_in L ( 1 ) Δ I_L = V i n L .Math. ? = V i n L .Math. TNE 1 ? indicates text missing or illegible when filed [0046] During TNE2:

    [00002] Δ I_L Δ t = V_c - V_in L ( 2 ) V_c = V_in + ΔI_L .Math. L Δ t = V_in + ΔI_L .Math. L TNE 2 [0047] (1) in (2) gives:

    [00003] V_c = V_in + V_in .Math. TNE 1 TNE 2

    [0048] Furthermore, the circuit arrangement preferably comprises a second and/or a third capacitor C2, C3. The second capacitor C2 is connected on one side to the first potential P1 and is connected on the other side to the third potential P3. The third capacitor C3 is connected on one side to the third potential P3 and is connected on the other side to the second potential P2. These capacitors C2, C3 serve to smooth the current profile of the currents and the voltage profile of the voltages in the circuit arrangement 200—preferably when the switching elements S1 and S2 are closed and opened alternately.

    [0049] FIG. 3 is a schematic current/time diagram. In the diagram, the alternating choke current I_L through the choke or inductor L is plotted. The illustrated profile of the choke current I_L is produced when the switching elements S1 and S2 are closed and opened alternately. For example, a duration S2on is shown, during which the second switching element S2 is activated. Consequently, during this duration S2on, the first switching element S1 is open. Furthermore, a duration Sion is shown, during which the first switching element S1 is closed, and, consequently, the second switching element S2 is open. This sequence of the durations S2on and S1on repeats. The switching over of the switching elements takes place between the durations S2on and S1on, or S2on and S1on. The period T is the sum of the durations S2on and S1on. The ratio of the duration S1on to T is referred to as the duty factor a1. The vertices E_−, E_+ and negative and positive peak values, i.e., the negative minimum I_N and the positive maximum I_P, of the choke current I_L through the inductor L result at the switchover time points of the switching elements. As an average, a current average value I_avg results for the high-frequency choke current I_L, which average value is determined by means of graphical analysis of the regular high-frequency choke current I_L in the diagram as a function of a duration TN1 between two zero crossings N_−, N_+ of the choke current I_L, and preferably as a function of the input voltage V_in, the magnitude of the inductor L, a duty factor a1, and the duration TN1 between the zero crossings of the choke current I_L, and the period T. If the detection of V_c is simpler than the detection of V_in, the formulas described below can also preferably be set up as a function of V_c.

    [0050] Using the intercept theorem from elementary geometry, the geometric profile of the choke current shows that:

    [00004] TN 1 - I_N - T 2 I_avg - I_N [0051] And for the rising current, where di/dt=Vin/L during the duration S1on, the following applies:

    [00005] I_P - I_N = V_in L S 1 on 15 [0052] Consequently:

    [00006] I_avg = V_in ? ? ( T - 2 .Math. TN 1 ) ? indicates text missing or illegible when filed [0053] Furthermore, the negative or positive peak value I_N, I_P of the choke current I_L through the inductor L can also be ascertained: [0054] From the overall current ripple

    [00007] I_P - I_N = V_ ? ? ? .Math. T And I_P - I ? + I_P - I_N 2 And I_N = I ? - I_P - I_N 2 ? indicates text missing or illegible when filed [0055] Can be determined by inserting I_N and I_P:

    [00008] I_N = - V_in L ? .Math. TN 1 I_P = - V_in L ? ( T - TN 1 ) ? indicates text missing or illegible when filed

    [0056] The formulas apply only to this circuit in the stationary, steady state, but similar formulas can also be derived for other topologies. The great advantage of the method is once again clear here: The calculation of the currents and the control intervention in the circuit based thereon can preferably take place after the duration TN1, and can preferably also extend over the following periods. In the classical ZCD method, it was necessary, in this cases, to react directly to the signal of the zero crossing N_−. This preferably reduces the hardware requirements, and offers sufficient time for a plausibility check of the measurement.

    [0057] Thus, a highly dynamic “sensor” for the average value of the switched current is preferably realized by the method. The desired choke current can be set using a classical control structure. The ascertained current average value I_avg of the choke current I_L is already available after only one switching period, which makes it possible to make the controller acting thereon very high-performance. This makes it possible to stabilize the rapidly switched current dynamics. Similarly, for other topologies, conclusions can be drawn about other states on the basis of the measured durations between the zero crossings or between the zero crossing and vertex, which leads to a reduction in the required sensors, and results in a direct cost savings.

    [0058] FIG. 4 is a schematic view of a voltage estimator 280 for ascertaining and outputting an estimated voltage U_est between a first potential P1 and a second potential P2. In a logic unit 290, the parameter is ascertained as a function of the ascertained durations, TNE1 and TNE2, and an input voltage V_in. The parameter ascertained according to the described method as a function of the durations TNE1 and TNE2, which parameter is preferably a voltage average value V_c, is taken into account as a correction variable of the estimation by the estimator 295 of the voltage estimator 280. For this purpose, input variables U—preferably system inputs and/or the detectable system states—are supplied to the estimator 295, by means of which variables the model stored in the estimator 295 predicts a model-based voltage. Subsequently, the model-based voltage is corrected using the voltage average value V_c calculated from the logic unit 290, whereupon the estimated voltage U_est is available. This estimated voltage can then be supplied to a voltage control which manipulates a controlled variable on the basis of the difference between the voltage target value and U_est, which control variable has access to the current in the potentials, whose difference defines the voltage to be controlled.

    [0059] FIG. 5 is a schematic view of an apparatus 300 having an inductor L, wherein the inductor is located in a circuit arrangement 200. The apparatus 300 is designed in particular as a DC/DC converter and/or as a charging device. The apparatus 300 is designed to ascertain a parameter, according to the described method, as a function of a duration TN1 between two zero crossings N_−, N_+ of the choke current I_L or a first duration TNE1 and a second duration TNE2—preferably a parameter as a current average value I_avg, a negative peak value I_N, or a positive peak value I_P. The ascertained parameter I_avg, I_N, I_P, V_c is further used as a measured variable within the apparatus 300, or transmitted to outside the apparatus 300 via an interface.

    [0060] FIG. 6 is a schematic view of a vehicle 500—preferably a motor vehicle, ship, or aircraft, having a drivetrain 400. In addition to the apparatus 300, the drivetrain preferably comprises a battery 410, an inverter 420, an electrical machine 430, and/or a charging socket 310. The battery 410 preferably supplies the inverter 420 with electrical energy. The inverter 420 preferably converts the electrical energy of the battery 410 into a polyphase AC voltage for supplying power to the electrical machine 430. The apparatus 300 is preferably designed as a DC/DC converter or charging device. Preferably, the DC/DC converter converts the electrical energy of the battery 410 into a low voltage—preferably for supplying power to an on-board power supply of a vehicle 500, and/or vice versa. The charging device preferably converts electrical energy, supplied via the charging socket 310, into high-voltage energy—preferably for charging the electrical battery 410, or vice versa.

    [0061] FIG. 7 is a schematic flowchart for a method 100 for ascertaining a parameter I_avg, I_N, I_P, V_c, wherein the parameter I_avg, I_N, I_P, V_c characterizes a current or a voltage in a circuit arrangement 200. The method begins with step 105. In step 110, the first and the second switching elements S1, S2 are preferably actuated alternately, resulting in an alternating choke current I_L through the inductor L. In step 120, at least one duration TN1 between two zero crossings N_−, N_+ of the choke current I_L is ascertained, or a duration TNE1 between a zero crossing N_−, N_+ and a vertex E_−, E_+ of the choke current I_L is ascertained. In step 130, a parameter I_avg, I_N, I_P, V_c is ascertained as a function of the ascertained duration TN1, TNE1. The method ends with step 135.