CIRCUIT AND METHOD FOR FLUORESCENCE LIFETIME IMAGING
20230280272 · 2023-09-07
Inventors
Cpc classification
G01N21/6408
PHYSICS
International classification
Abstract
A detection system for detecting fluorescence lifetime includes an excitation light source configured for repeatedly generating pulsed excitation light, and a detector. The detector has a single-photon detection circuit; a pulse-inhibit circuit for rejecting detected photons that occur outside each one of a series of measurement time windows, each subsequent measurement time window starting after a subsequent excitation light pulse has stopped, and stopping before a next excitation light pulse is generated, each measurement time window having a measurement window period; and a switched-capacitor circuit having an input terminal for receiving a voltage ramp signal that is restarted with each new measurement window period. The switched-capacitor circuit is configured for repetitively computing an average voltage. The switched-capacitor circuit has a node for outputting the computed average voltage as a measure of the fluorescence lifetime.
Claims
1.-20. (canceled)
21. A detection system for detecting fluorescence lifetime, the detection system comprising: an excitation light source configured for repeatedly generating pulsed excitation light, and a detector comprising: a single-photon detection circuit for generating digital pulses upon detection of photons, a pulse-inhibit circuit for rejecting detected photons that occur outside each one of a series of measurement time windows, each subsequent measurement time window starting after a subsequent excitation light pulse has stopped and stopping before a next excitation light pulse is generated, each measurement time window having a measurement window period, a first switched-capacitor circuit having an input terminal for receiving a voltage ramp signal that is restarted with each new measurement window period, the first switched-capacitor circuit being configured for repetitively computing an average voltage, based on an exponential moving average function applied to sample voltages recorded over past measurement time windows and determined by the voltage ramp signal in response to detected and not rejected photons, following the principles of the center-of-mass method, the first switched-capacitor circuit having a first node for outputting the computed average voltage as a measure of the fluorescence lifetime.
22. The detection system in accordance with claim 21, wherein the first switched-capacitor circuit comprises a first sampling capacitor, a first switch and a second switch for coupling the first sampling capacitor alternately to a ramp terminal for receiving a ramp signal, and to the first node.
23. The detection system in accordance with claim 22, wherein the first switched-capacitor circuit furthermore comprises a second capacitor configured for being in a charge sharing redistribution configuration when the second switch is driven for coupling the first sampling capacitor to the first node.
24. The detection system in accordance with claim 23, wherein the first sampling capacitor is at least an order of magnitude, preferably at least two orders of magnitude, smaller than the second capacitor.
25. The detection system in accordance with claim 22, further comprising means for temporarily adding one or more capacitors in parallel to the first sampling capacitor.
26. The detection system in accordance with claim 21, further comprising a second switched-capacitor circuit connected in series to the first node of the first switched-capacitor circuit and configured for operating at an oscillation rate that is not in direct response to incident photons.
27. The detection system in accordance with claim 26, wherein the second switched-capacitor circuit comprises a second sampling capacitor, a first switch and a second switch for coupling the second sampling capacitor alternately to the first node for receiving computed average voltage as a measure of the fluorescence lifetime, and to an output node.
28. The detection system in accordance with claim 27, wherein the second switched-capacitor circuit furthermore comprises a fourth capacitor configured for being in a charge sharing redistribution configuration when the second switch is driven for coupling the second sampling capacitor to the output node.
29. The detection system in accordance with claim 28, wherein the second sampling capacitor is at least an order of magnitude, preferably at least two orders of magnitude, smaller than the fourth capacitor.
30. The detection system in accordance with claim 21, furthermore comprising a non-overlapping switch-enable circuit for providing non-overlapping signals for actuating the first switched-capacitor circuit.
31. The detection system in accordance with claim 21, wherein the single-photon detection circuit comprises a single photon avalanche detector.
32. The detection system in accordance with claim 31, wherein the pulse-inhibit circuit comprises a variable voltage source adapted for lowering a voltage over the single photon avalanche detector.
33. The detection system in accordance with claim 21, wherein the pulse-inhibit circuit is adapted for intercepting one of the signals for driving the switched-capacitor circuit, for thus preventing a pulse to be taken into account.
34. The detection system in accordance with claim 33, further comprising at least one further pulse-inhibit circuit and at least one further switched-capacitor circuit, configured for operating in parallel with the pulse-inhibit circuit and the first switched-capacitor circuit.
35. The detection system in accordance with claim 21, further comprising a photon counter circuit for counting a number of detected photons.
36. The detection system in accordance with claim 35, furthermore comprising a non-overlapping switch-enable circuit for providing non-overlapping signals for actuating the first switched-capacitor circuit, wherein the photon counter circuit comprises a switched capacitor circuit adapted to be actuated by the non-overlapping signals for actuating the first switched-capacitor circuit.
37. The detection system in accordance with claim 35, further comprising means for temporarily adding one or more capacitors in parallel to the first sampling capacitor, wherein the means for temporarily adding one or more capacitors in parallel to the sampling capacitor comprise one or more switches, in series with the one or more capacitors, respectively, the one or more switches being opened upon the photon counter circuit having counted a predetermined number of detected photons.
38. A fluorescence imaging sensor comprising: an excitation light source configured for repeatedly generating pulsed excitation light, and an array of detectors, each detector comprising: a single-photon detection circuit for generating digital pulses upon detection of photons, a pulse-inhibit circuit for rejecting detected photons that occur outside each one of a series of measurement time windows, each subsequent measurement time window starting after a subsequent excitation light pulse has stopped and stopping before a next excitation light pulse is generated, each measurement time window having a measurement window period, a first switched-capacitor circuit having an input terminal for receiving a voltage ramp signal that is restarted with each new measurement window period, the first switched-capacitor circuit being configured for repetitively computing an average voltage, based on an exponential moving average function applied to sample voltages recorded over past measurement time windows and determined by the voltage ramp signal in response to detected and not rejected photons, following the principles of the center-of-mass method, the first switched-capacitor circuit having a first node for outputting the computed average voltage as a measure of the fluorescence lifetime.
39. A method for determining fluorescence lifetime, comprising generating digital pulses upon detection of photons; rejecting detected photons that occur outside a measurement time window; computing an average voltage, based on an exponential moving average function applied to sample voltages determined by a voltage ramp signal in response to the detected and not rejected photons, recorded over past measurement time windows following the principles of the center-of-mass method; and outputting the computed average voltage as a measure of the fluorescence lifetime.
40. The method according to claim 39, further comprising averaging the computed average voltage.
Description
BRIEF DESCRIPTION OF THE DRAWINGS
[0025] The invention will now be described further, by way of example, with reference to the accompanying drawings, in which:
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[0042] The drawings are only schematic and are non-limiting. In the drawings, the size of some of the elements may be exaggerated and not drawn on scale for illustrative purposes. The dimensions and the relative dimensions do not necessarily correspond to actual reductions to practice of the invention. In the different figures, the same reference numbers refer to the same or analogous elements.
DETAILED DESCRIPTION OF THE INVENTION
[0043] The present invention will be described with respect to particular embodiments and with reference to certain drawings, but the invention is not limited thereto but only by the claims. Any reference signs in the claims shall not be construed as limiting the scope.
[0044] The terms first, second and the like in the specification, are used for distinguishing between similar elements and not necessarily for describing a sequence, either temporally, spatially, in ranking or in any other manner. It is to be understood that the terms so used are interchangeable under appropriate circumstances and that the embodiments of the invention described herein are capable of operation in other sequences than described or illustrated herein.
[0045] It is to be noticed that the term “comprising”, used in the claims, should not be interpreted as being restricted to the means listed thereafter. Thus, the scope of the expression “a device comprising means A and B” should not be limited to devices consisting only of components A and B. It means that with respect to the present invention, the most relevant components of the device are A and B.
[0046] Similarly, it is to be noticed that the term “coupled” should not be interpreted as being restricted to direct connections only. Thus, the scope of the expression “a device A coupled to a device B” should not be limited to devices or systems wherein an output of device A is directly connected to an input of device B. It means that there exists a path between an output of A and an input of B which may be a path including other devices or means.
[0047] Reference throughout this specification to “one embodiment” or “an embodiment” means that a particular feature, structure or characteristic described in connection with the embodiment is included in at least one embodiment of the present invention. Thus, appearances of the phrases “in one embodiment” or “in an embodiment” in various places throughout this specification are not necessarily all referring to the same embodiment, but may. Furthermore, the particular features, structures or characteristics may be combined in any suitable manner, as would be apparent to one of ordinary skill in the art from this disclosure, in one or more embodiments.
[0048] Similarly, it should be appreciated that in the description of exemplary embodiments of the invention, various features of the invention are sometimes grouped together in a single embodiment, figure, or description thereof for the purpose of streamlining the disclosure and aiding in the understanding of one or more of the various inventive aspects. This method of disclosure, however, is not to be interpreted as reflecting an intention that the claimed invention requires more features than are expressly recited in each claim. Rather, as the following claims reflect, inventive aspects lie in less than all features of a single foregoing disclosed embodiment. Thus, the claims following the detailed description are hereby expressly incorporated into this detailed description, with each claim standing on its own as a separate embodiment of this invention.
[0049] It should be noted that the use of particular terminology when describing certain features or aspects of the invention should not be taken to imply that the terminology is being re-defined herein to be restricted to include any specific characteristics of the features or aspects of the invention with which that terminology is associated.
[0050] In the description provided herein, numerous specific details are set forth. However, it is understood that embodiments of the invention may be practiced without these specific details. In other instances, well-known methods, structures and techniques have not been shown in detail in order not to obscure an understanding of this description.
Definitions
[0051] Fluorescence is the emission of light by a fluorophore that has absorbed electromagnetic excitation radiation, for example light, upon excitation therewith. In most cases, the emitted light has a longer wavelength, and therefore lower photon energy, than the absorbed excitation radiation.
[0052] Fluorescence lifetime is a measure of the time a fluorophore spends in the excited state before returning to the ground state by emitting a photon. The lifetime of a fluorophore can range from picoseconds to hundreds of nanoseconds.
[0053] Fluorescence-lifetime imaging microscopy (FLIM) is a technique for producing an image based on differences in exponential decay rate of fluorescence from a fluorescent sample. The lifetime of a fluorophore signal, rather than its intensity, is used to create the image in FLIM. Many other applications (that are not necessarily called FLIM) are in need of fluorescence-lifetime imaging, for example in image guided surgery and biomedical applications, where lifetime gives additional information about the chemical/biological environment of the fluorophore.
[0054] When a fluorophore gets hit, e.g. illuminated, by a pulse of electromagnetic radiation, e.g. a light-pulse, that excites its internal state, electrons will move to a higher energy state for some time. They will go back to their original state by emitting photons or heat, in an exponential decay process characterized by the fluorophore's fluorescence lifetime. The average time the fluorophore stays in its excited state and emits photons, is called the fluorescence lifetime. In
with I.sub.0 the intensity of emitted fluorescent light at the first moment t.sub.0.
[0055] One can then define the center of mass t.sub.cm as a time period between the first moment to and a center moment t.sub.c according to the following, using first order momentum:
[0056] It is generally believed that the measurement window period t.sub.w must be much longer than the fluorophore's lifetime (so t.sub.w>>τ); however, with some math one can find the deviation for the inaccuracy of shorter window periods t.sub.w and compensate for it when necessary.
[0057] In an image sensor, wherein the pixels are small, and the number of photons originating from the fluorescent scene is small, one can't rely on a single shot measurement, like the one proposed in
[0058] In
[0059] Now, in
[0060] Averaging-length n is a number that tells how deep the memory into the past is. E.g. with n=99, at every new sample, the previous result is reused for 99%, and the new sample counts only for a fresh 1%. Samples further in the past become gradually less important, recent samples are more important. The difference with a “simple moving average”, is that for achieving the latter, one must keep a list of the last 100 occurrences, and at each new event, one has to drop the value of the oldest event, include the new event, and recalculate the average of the adapted set of 100 events. This takes a lot of computation and memory, and is hard to achieve on a per pixel base in an image sensor.
[0061] By taking the exponential moving average of time-to-voltage converted samples, a time-domain center-of-mass method is achieved.
[0062] The EMA curve 123 has a voltage level that is in this particular example three times below the ramp voltage on voltage ramp signal curve 122 at the three events 180, 181 & 182, with as a result, small step increases at each of these moments (in this simulation n=7). In this example one detection event is passed every window; however, it is equally possible that, for instance at high light level conditions, there are many more events in a same window, and even so, with low light levels, it can happen that there are one, more, or many windows without any event. There is no operational problem when having multiple events in a same window. In case there are really many, and this would be happening also in many windows, there is a pile-up of information, which could reduce the accuracy. Whether that would be a problem depends on a lot of factors, including the dead-time, how many events take place in a same window, how often this is occurring, the application and the desired accuracy. In such situations it could be a solution to reduce the amplitude of the excitation light source.
[0063] The voltage ramp signal curve 122 may be, but does not need to be, a perfectly straight line; it should in its window be at least monotonically rising or falling. It can start at zero volt, but it can also start at any other suitable voltage level, as long as the voltages during the ramp are in the operation range of the switches of the attached switched-capacitor circuit 160 (see below). Once the EMA curve 123 gets to convergence, the sampled voltages will statistically kick the EMA voltage up and down, and not always in the same direction as in the three events 180, 181 & 181.
[0064]
[0065] The single photon detection circuit 150, in the embodiment illustrated, implements a Single Photon Avalanche Diode (SPAD) detector. The SPAD detector is a semiconductor pn-diode junction that is reversely biased beyond its breakdown voltage, in a metastable state. The SPAD detector is coupled in series with a resistor R1, and this series connection is coupled between a first node 152 and a second node 153. The first node 152 is biased at a first bias voltage Vbias1 and the second node is biased at a second bias voltage Vbias2, Vbias2 being higher than Vbias1 so as to obtain the reverse biasing of the SPAD detector. A single photon can start a breakdown and give a large voltage signal when being biased through the resistor R1, the voltage signal being a temporary voltage drop (V.sub.input), as can be seen in
[0066] Two exemplary systems are described in this specification for inhibiting the pulses outside the measurement time windows. The first one, pulse-inhibit circuit 166 in
[0067] A switched-capacitor circuit 160 is used for performing an exponential moving average function, as also illustrated in the bottom graph of
[0068] The switches XN1, XN2 of the switched-capacitor circuit 160 are actuated such that only one of the switches XN1, XN2 is conductive at any moment in time. The driving signals for actuating the switches XN1, XN2 are received from a non-overlapping switch-enable circuit 155 that is explained in more detail below.
[0069] In the embodiment illustrated in
[0070] The non-overlapping switch-enable circuit 155, in particular embodiments of the present invention, comprises an even sequence of inverters which are coupled in series. In this example, there are four inverters X2, X3, X4, X5, with output nodes p2, p3, p4, p5 respectively. Node p2 is the first switch-enable output signal to actuate the first switch XN1 of the switched capacitor circuit 160. This node p2 is also an input to a NOR gate X6 that also has p5 as input. When p1 goes high, p2 goes low, and p5 being low already will go high three inverter delays later. This leave a period of three inverters delays that both inputs of the NOR X6 are low, during which the NOR gate X6 outputs a high on its output p7. This is basically a one-shot circuit: the input p1 goes high (for example during 3 ns), and output p7, goes high for a predetermined short period (e.g. 1 ns), determined by three inverter delays. The output signal of the NOR gate X6 is fed to the second switch XN2 for actuation thereof, for instance to the gate of the NMOS pass-gate. Many alternative one-shot circuits are possible, known to a person skilled in the art.
[0071] As illustrated in the one but last graph of
[0072]
n=C.sub.2/C.sub.1.
[0073] When an output is wanted that has a good precision, n should be taken high, i.e. between 100 and 1000, what increases the number of samples needed for convergence after initialization of the filter, or after a sudden lifetime change. One cannot tell whether this will then take a measuring time of microseconds or milliseconds, because the time it takes to change, entirely depends on the number of incoming photons/events and the n-value. It is an option to keep the number n relatively low, e.g. at 50, and to sample the EMA output from outside the pixel, and to do additional external calculations and averaging, thereby increasing the accuracy and precision in a second step, e.g. with DSP digital processing means.
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[0075] In practice, the accompanying circuit that is located in a pixel should be as small as possible, in order for the pixel to have a fill factor as high as possible. It can therefore be advised to omit the first capacitor C1 entirely, and to rely on the remaining parasitic capacitance of the concerned sample node 173. After having an estimate of the parasitic value C1, one can choose C2 to be n times that value. C2 can then be implemented by the person skilled in the art, in the way it fits best into an imager pixel.
[0076] The more samples are averaged, the better the precision gets. Therefor, it is advantageous to use a large averaging length n. However, even with a small first capacitor C1, the second capacitor C2 will take up some area of the pixel, and making the second capacitor C2 larger, typically requires more area in the pixel. In embodiments of the present invention, the second capacitor C2 can be made similar to a capacitor in a dynamic RAM cell, with a deep hole in the substrate providing a large capacitor on a small area.
[0077] In embodiments of the present invention, two switched capacitor circuits can be implemented, operating on different clocks. An example thereof is illustrated in
[0078] The output signal hybridEMA, being the voltage on the fourth capacitor C6, is then the output for read-out. A regular oscillator with frequency f.sub.clk can for example be used for generating non-overlapping clock signals for the inputs CLK1 and CLK2. Non-overlapping indicates that the switches XN5 and XN6 are never conductive at the same moment. CLK1 drives switch XN5 and CLK2 drives switch XN6. XN5 and XN6 are in this example NMOS pass-gates. The voltage on the third capacitor C5 is a sample of the EMA voltage at the moment CLK1 goes low, and switch XN5 stops conducting. Clk2 then goes high, and a charge sharing occurs between the third capacitor C5 and the fourth capacitor C6. This then gives a classical switched capacitor low pass filter 800, with a −3 dB corner frequency of
[0079] The averaging length of the first stage n1=C2/C1, that of the second stage n2=C6/C5, will give a total averaging length of n1.Math.n2=(C2.Math.C6)/(C1.Math.C5). So, if n1=n2=100, a maximum averaging can be reached of 10000. Averaging of 10000 samples gives a relative fluorescence lifetime precision of 1%, according to theory.
[0080]
[0081] The hybrid EMA averaging principle can be used in any of the invention's averaging circuits.
[0082] Circuits in accordance with embodiments of the present invention can deviate largely from the presented ones. However, special care was taken to keep the transistor count low. Also, since most of the operation is in the digital domain, very limited analog difficulties are present. When envisaging a lifetime precision of 1%, it is also sufficient to have a low precision ADC (e.g. 8 bit) for conversion of the EMA voltage. The width and length (W/L values) of the transistors are not critical, and can be determined by the person skilled in the art. Most transistors can be of minimal width and length; however, one must check that curves 125 and 126 (
[0083] As stated before, a more advantageous solution for the pulse-inhibit circuit than the one explained with reference to
[0084] In the embodiment of
[0085] One of the nice features of the particular solution presented in
[0086]
I.sub.bg is the background light component that generates events at random moments in the input signal. The center of mass t.sub.cm1 in the first measurement time window 111 with a first, shorter, measurement period t.sub.w1, starting at time to and ending at time t.sub.1, is going to be distorted towards the center of the window (i.e. closer to t.sub.w1/2) due to these random events. By including a second center of mass measurement based on a second measurement time window 112 that also starts at time to but that ends at time t.sub.2 later than time t.sub.1, hence with a second, longer, measurement period t.sub.w2 taken e.g. twice as long as the first window t.sub.w1, one has an extra equation to which the system needs to adhere. In this way there are two equations with two unknowns: lifetime τ and background light I.sub.bg. Persons skilled in art can accurately retrieve the lifetime stripped from the background light interference by solving these equations. The precision on the outcome will be somewhat reduced due to the shot-noise of the background light, which can't be avoided.
[0087] In embodiments of the present invention, single photon detection circuits 150 may have elevated dark count rates (DCR), giving the same effect as background light. DCR can thus be treated in the same way, using a double center of mass approach as explained with respect to
[0088]
[0089]
[0090] The photon-counter circuit 168 illustrated in
[0091] When no trigger pulse occurs, the signal at the gate of pass-gate X12 is the signal at node p2, and this signal is high. The voltage level V.sub.sc at the drain side of pass-gate X12 then equals V.sub.SX12. When a trigger pulse occurs, this voltage at the counter sampling node 175 is sampled.
[0092] The signal at node p7, not overlapping with the signal at node p2, now goes high, making the second pass-gate switch X22 conductive. The capacitors C12 and C22 get shorted to each other, and a charge sharing redistribution takes place whereby the signal at the counter sampling node 175 and the signal at the output node Countout move to each other determined by the ratio of C22/C12.
[0093] This way, the voltage at the output node Countout steps up, every time such events happens, but in a saturating way: every step on Countout will be a bit smaller, and in the end, a saturation voltage close to V.sub.SX12. This counter number at saturation depends on the chosen capacitor ratio C22/C12. C12 can be entirely made-up of its parasitic node, keeping the circuit small. One can implement counter values between ten and a few hundreds, without needing a too large capacitor C22.
[0094] A reset switch 700 is coupled between the output node Countout and ground, for resetting the output node Countout. The reset switch 700 may for instance be a transistor, the gate of which is coupled to an externally applied signal ResetCount.
[0095] Sometimes it is known that the EMA average voltage is not yet converged, e.g. right after start-up, or when a different lifetime is suddenly present. In that case, it is possible to speed-up the convergence process by temporarily lowering the n-number of the switched capacitor circuit 160. In fact, by changing the value of capacitor C1, averaging-length n can be modulated in a convenient way. This can be done by externally adding capacitors to the sample node 173. However, averaging-length n can also be linked to the number of photons that passed the window, making use of a photon counter 168. In
[0096] Sometimes, one has a combination of fluorophores that output two lifetimes upon stimulation:
for t>t.sub.0
In this case, three unknowns need to be found, being the first lifetime τ.sub.1, the second lifetime τ.sub.2 and the ratio of the intensities of emitted fluorescent light at the first moment t.sub.0 I.sub.1/I.sub.0.
[0097] If this is the case, finding three centers of mass is required. To solve this, one must choose three measurement time windows in a strategic way. As an example,
[0098] The shorter lifetime will mostly influence the center of mass in the first measurement time window t.sub.w1. The longer lifetime will mostly influence the center of mass in the second measurement time window t.sub.w4, and the center of mass in t.sub.w5 will be largely influenced by each of the three unknowns. Anyhow, the person skilled in the art can solve the three equations based on the three measured centers of mass and find the three unknowns in the way he/she prefers most. Adding the possibility of having also non-negligible background light or DCR (of the single photon detection circuit 150), this would add yet another unknown variable that can retrieved by an additional center of mass measurement time window (not illustrated) and its mathematical equation (having 4 unknowns and 4 equations).
[0099] Any of the systems that are presented here, or that are based on it, can be complemented by other means known in the state of the art in image sensors. For example, one can apply micro-lenses, colour filters, to improve qualitatively, or quantitatively the light input to the single photon detection circuit. Any means for improving the internal/external quantum efficiency, responsivity, and detection probability can be applied. Three-dimensional stacking can be done, e.g. whereby a SPAD detector layer stems from another wafer/material then the CMOS circuit wafer. Back-side illumination (BSI) can be applied, current assistance can be applied or an Silicon On Insulator (SOI) can be favoured. The proposed embodiments of the invention can be laid out as pixels for a sensor array, in total constituting an image sensor for fluorescence lifetime and fluorescence light intensity acquisition. For each read-out voltage node, a voltage-follower transistor, can be provided, with a row-select transistor for row-based read-out, as is often done in CMOS image sensors. Several signals can be grouped for a plurality of pixels, or are the same for a whole array, like the ones defining the windows (Reject), the Ramp signal(s), reset signal(s), and signals determining the averaging-length n. In addition to all this, a standard 3T or 4T image sensor pixel can be added, for performing simultaneously standard image sensing. The single-photon detection circuit 150 may contain a regular SPAD, but can also contain any other means to achieve single photon detection, including an avalanche photodetector (APD) with so much gain, that one can use the linear gain modus to operate the diode below break-down and still achieve digital photon arrival pulses.
[0100] While the invention has been illustrated and described in detail in the drawings and foregoing description, such illustration and description are to be considered illustrative or exemplary and not restrictive. The foregoing description details certain embodiments of the invention. It will be appreciated, however, that no matter how detailed the foregoing appears in text, the invention may be practiced in many ways. The invention is not limited to the disclosed embodiments.