Backplane footprint for high speed, high density electrical connectors
11758656 · 2023-09-12
Assignee
Inventors
- Marc B. Cartier, Jr. (Durham, NH, US)
- Mark W. Gailus (Concord, MA, US)
- Tom Pitten (Merrimack, NH, US)
- Donald A. Girard, Jr. (Bedford, NH, US)
- Huilin Ren (Amherst, NH, US)
Cpc classification
H05K1/184
ELECTRICITY
Y02P70/50
GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
H05K1/145
ELECTRICITY
H05K2201/042
ELECTRICITY
H05K1/115
ELECTRICITY
International classification
H05K1/11
ELECTRICITY
H01R13/66
ELECTRICITY
Abstract
A printed circuit board includes a plurality of layers including conductive layers separated by dielectric layers; and at least one via configured for solder attachment to a connector lead of a surface mount connector, the at least one via including a conductive element that extends from an upper surface of the printed circuit board through one or more of the plurality of layers, the conductive element having a recess in a surface thereof. The recess is configured to receive a tip portion of the connector lead of the surface mount connector. The printed circuit board may have via patterns including signal vias and ground vias.
Claims
1. An interconnection system comprising: a surface mount component comprising surface mount leads; and a printed circuit board comprising conductive layers separated by dielectric layers, and vias configured for solder attachment to respective leads of the surface mount component, each of the vias including a conductive element having a recess in an upper surface thereof, wherein the recess in the conductive element is smaller in diameter than a surface mount lead of the surface mount leads and receives only a tip portion of the surface mount lead.
2. The interconnection system as defined in claim 1, wherein tip portions of the surface mount leads are configured to be inserted into respective recesses of the printed circuit board.
3. The interconnection system as defined in claim 1, wherein the recess includes at least one of a conical portion, a truncated conical portion, a cylindrical portion and a hemispherical portion.
4. The interconnection system as defined in claim 1, wherein the surface mount connector leads comprise superelastic components.
5. The interconnection system as defined in claim 1, wherein at least 95% of the surface mount leads comprise distal tips extending into respective recesses.
6. The interconnection system as defined in claim 1, wherein the recess has a depth in a range of 0.05 mm to 0.30 mm.
Description
BRIEF DESCRIPTION OF THE DRAWINGS
(1) For a better understanding of the disclosed technology, reference is made to the accompanying drawings, which are incorporated herein by reference and in which:
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DETAILED DESCRIPTION
(10) The inventors have recognized and appreciated that, though substantial focus has been placed on providing improved electrical connectors in order to improve the performance of interconnection systems, at some very high frequencies significant performance improvement may be achieved by inventive designs for printed circuit boards. In accordance with some embodiments, improvements may be achieved by inventive designs for connector footprints and for the details of the connector footprints, including but not limited to vias of the connector footprints. The inventive designs may improve the electrical performance of the interconnection system, may improve the reliability of the connection between the printed circuit board and the connector and/or may facilitate further miniaturization of the interconnection system, for example.
(11) As used herein, the terms “connector footprint” and “backplane footprint” refer to elements of a printed circuit board which are configured to interface to a connector. The connector footprint may include multiple via patterns, and each via pattern may include one or more signal vias and one or more ground vias. Each via pattern may further include one or more additional vias configured for shielding, impedance control and the like. However, the via patterns are not limited with respect to the numbers or types of vias. Further, the terms “printed circuit board” and “backplane” are used interchangeably herein to refer to a structure including conductive layers and dielectric layers in an alternating arrangement. However, it should be appreciated that attachment techniques as described herein may be used to attach connectors, or any other type of electrical component, to a substrate having layers and connections between the layers, including daughter boards or midplanes. These techniques may be used with substrates of any thickness.
(12) In some embodiments, the printed circuit board may include a single dielectric layer and a single conductive layer. However, the techniques described herein may provide valuable advantages in terms of speed and/or manufacturing cost when used with multi-layer boards, such as boards with more than 10 conductive layers carrying signal traces, or more than 20 layers or in some embodiments, more than 40 layers. Accordingly, in some embodiments, techniques as described herein may be applied with printed circuit boards with between 10 and 50 layers with signal traces.
(13)
(14) The surface mount connector 100 may include a number of pairs of signal leads and corresponding ground leads. One pair of signal leads and corresponding ground leads are shown in
(15) As shown in
(16) The printed circuit board 110 may include a plurality of conductive layers separated by dielectric layers, as described below. For example, the printed circuit board 110 may include conductive layers 136 separated by dielectric layers 138 in an alternating arrangement. The printed circuit board 110 may include a signal via 140 corresponding to signal lead 120 and a signal via 142 corresponding to signal lead 122. The printed circuit board 110 may further include a ground via 150 corresponding to ground lead 130 and a ground via 152 corresponding to ground lead 132. The signal leads 120 and 122 are electrically and mechanically connected to the respective signal vias 140 and 142 by solder joints 180 (shown in
(17) As best shown in
(18) Signal vias 140 and 142 may include conductive pads 146 and 148, respectively, on a top surface 160 of printed circuit board 110. Signal vias 140 and 142 extend from top surface 160 of printed circuit board 110 to a breakout layer (shown in
(19) As shown in
(20) As shown in
(21) As shown in
(22) As shown in
(23) The features of the solder joints 180 and 182, including increased solder volume, increased solder contact area and the extension of the solder joints 180 and 182 into the respective recesses, increase the shear resistance of the solder joints 180 and 182. In particular, the solder joints 180 and 182 are unlikely to be sheared off in a direction parallel to the surface of the printed circuit board. It will be understood that the above features of the solder joints 180 and 182 are not requirements.
(24) The above-described features of the solder joints 180 and 182, including increased solder volume, increased solder contact area and extension of the solder joints into the recesses, may benefit the mechanical reliability of the solder joints, and, in addition, may affect the electrical performance of the connection. For example, the impedance of the connection may be changed by the increased solder volume. Thus, it may be preferable that the solder joint is distributed along the length of a signal line in the direction of signal propagation. As such, a narrow, deep recess may be preferable to a wide, shallow recess. The shape of the recess may be characterized, in part, by an aspect ratio of depth to width. In some embodiments, the aspect ratio of the recess may be in a range of 1 to 4, but this is not a limitation.
(25) As shown in
(26) A cross section of printed circuit board 110 in accordance with embodiments is shown in
(27) As shown in
(28) As further shown in
(29) As further shown in
(30) The signal via 350 may be backdrilled from the rear surface of printed circuit board 110 to a level slightly below breakout layer 352. The backdrilled portion of the hole is free of conductive material and avoids the formation of an electrical stub which may cause undesired resonance in the transmission characteristic of the signal line.
(31) The signal via 350 may further include a conductive pad 370 on the top surface 364 of the printed circuit board 110. The conductive pad 370 may be formed by patterning conductive layer 310 on top surface 364 and is in electrical contact with conductive element 362 of signal via 350. The conductive pad 370 has a larger diameter than conductive element 362 and surrounds conductive element 362 on top surface 364.
(32) As shown in
(33) By way of example only, the signal via 350 may have a diameter in a range of 0.10 mm to 0.30 mm and the conductive element 362 may extend all or part way through the printed circuit board 110. The recess 380 may have a diameter in a range of 0.08 mm to 0.28 mm and a depth in a range of 0.05 mm to 0.30 mm. In some embodiments, recess 380 may have a shape that concentrates solder generally to match the shape of connector lead 390. The diameter of the recess is based on the diameter of the signal via 350 so as to maintain a minimum wall thickness of the signal via 350 in the region of recess 380. The minimum wall thickness may be in a range of 0.02 mm to 0.08 mm. It will be understood that these dimensions are given by way of example only and are not limiting.
(34) A function of the recess 380 is to receive at least a tip portion of a connector lead 390 of a surface mount connector. The tip portion of the connector lead 390 of the surface mount connector may be tapered, beveled or otherwise configured, to enable insertion of the tip portion into the recess 380. The dimensions and shape of the recess 380 may be selected to engage the tip portion of the connector lead of a particular surface mount connector, and different recess sizes and shapes may be utilized with different surface mount connectors. It is not the intent of the recess 380 to accept the entire connector lead 390 of a surface mount connector, as in the case of a contact tail of a press fit connector which is inserted into a corresponding via of the printed circuit board. Further, it is not the intent that the connector lead 390 of the surface mount connector rest on the surface of the printed circuit board without extending at least partially into the recess 380. By providing a configuration where the tip portion of the connector lead 390 of the surface mount connector extends into the recess 380, advantageous features, including but not limited to mitigating the effects of lack of coplanarity of the connector leads and improving the reliability of solder connections, may be achieved.
(35) In some embodiments, the diameter and/or cross section of the connector lead 390 may be larger than the diameter of the recess 380, except at the tip portion of connector lead 390. In other embodiments, the diameter and/or cross section of the connector lead is smaller than the diameter of the recess 380, and insertion of the connector lead into the recess 380 is limited by the depth of the recess. In some cases, not all connector leads may extend into the respective recesses due to lack of coplanarity of the tip portions of the connector leads. In some embodiments, the recess 380 and the tip portion of connector lead 390 have different sizes and shapes, such that solder fills spaces between recess 380 and connector lead 390 and increases the reliability of the solder joint.
(36) In some embodiments, the recess 380 may be centered with respect to signal via 350. In other embodiments, the recess 380 may be offset with respect to the center of signal via 350. The offset configuration may be used to control the impedance of the signal lines in a transition region between the printed circuit board and the surface mount connector. When the recess 380 is offset with respect to the center of signal via 350, a minimum wall thickness of the via is maintained in order to ensure electrical continuity of the via. The recess 380 typically has a circular cross section in a plane parallel to the top surface of the printed circuit board, but this is not a limitation.
(37) A via 410 having a truncated conical recess 420 is shown in
(38) A via 510 having a cylindrical recess 520 is shown in
(39) A via 610 having a recess 620 is shown in
(40) The shape of the recess may depend in part on the process used to form the recess. For example, when the recess is drilled, the shape of the recess corresponds to the shape of the drill bit. In other embodiments, the recess may be formed by laser drilling and have a shape that conforms to laser drilling processes. Further, the size and shape of the recess may be selected based on the size and shape of the tip portion of the connector lead of the surface mount connector. The recess may have any size and shape that is compatible with the drilling process and which is capable of receiving a tip portion of the connector lead of the surface mount connector. Further, the shape of the recess may include portions with different shapes, such as hemispherical portion 622 and cylindrical portion 624, as shown in
(41) The depth of the recess is based on several factors. Where the bottom of the recess is not flat, the depth may be defined as the depth of the recess at its deepest point. The depth may be sufficient to compensate for a lack of coplanarity of the tip portions of the connector leads of the surface mount connector. For example, the depth of the recess may be based on the coplanarity specification of the surface mount connector such that the longest connector leads extend to or near the bottom of the recess, whereas the shortest connector leads are located at or near the top of the recess.
(42) In some embodiments, the depth of the recess may be selected based on the tolerance with which the distal tip of connector lead 390 may be positioned with respect to top surface 364 when a connector is mounted to the printed circuit board. That tolerance may depend on the manufacturing tolerances of the connector and/or the printed circuit board. In some embodiments, that tolerance may be +/−0.08 mm. The connector and printed circuit board may be designed such that the tip of connector lead 390 is nominally 0.04 mm below the surface, such that, if the position of tip of lead 390 varies by up to 0.08 mm, it will neither fail to fit fully within the recess nor fail to contact solder in the recess. With such a design, a high percentage of connector leads in a connector footprint will extend, at least somewhat, into a corresponding recess. That percentage may be greater than 95%, such as greater than 98% or greater than 99%, in some embodiments.
(43) Further, the depth of the recess may be based on the volume of solder required to achieve a reliable connection between the connector lead and the via. For example, the shear strength of the solder joint may be enhanced by providing a recess having a greater depth. The depth of the recess is limited in the case of a conical or truncated conical shape, due to the requirement for maintaining a minimum wall thickness of the via in the region of the recess. As shown in
(44) A minimum wall thickness of the via in the region of the recess is maintained to ensure electrical continuity of the via. As shown in
(45) A printed circuit board and surface mount connector leads, illustrating compensation for lack of coplanarity of the connector leads in accordance with embodiments, is illustrated in
(46) Solder bricks 750 formed of solder paste are shown in
(47) A prior art printed circuit board and surface mount connector leads are shown in
(48) Solder bricks are typically made up of 50% metal particles in the shape of spheres and 50% flux and other volatiles. The volatiles evaporate by the end of the thermal cycle, resulting in a metal volume that is one half of the original solder brick volume. The reduction in solder brick volume presents a challenge to bridging the gaps caused by variation in surface mount lead length.
(49) The printed circuit board having vias and/or other conductive elements with recesses as described herein provides enhanced reliability as compared with prior art printed circuit boards. In particular, the recesses compensate for lack of coplanarity of the tip portions of the connector leads of the surface mount connector. In addition, the recesses permit increased solder volume, increased solder joint surface area and increased shear resistance as compared with prior art vias having flat surfaces, and therefore the reliability of each solder joint is increased. In some embodiments, the coplanarity specification of the connector leads of the surface mount connector may be relaxed when the vias are provided with recesses.
(50) By eliminating the need for vias of sufficient size to receive contact tails of a press fit connector, the diameters of the vias in a region near the top surface of the printed circuit board can be reduced. The reduced via diameters permit closer center-to-center spacing of vias and permit routing of signal traces in the region near the top surface of the printed circuit board.
(51) A top view of a printed circuit board having via patterns in accordance with embodiments is shown in
(52) As further shown in
(53) Each via pattern shown in
(54) In one example, the signal vias 930 and 932 of via pattern 920 may have diameters of 0.25 mm and be spaced by 0.90 mm. The ground vias 940, 942, 944 and 946 may have diameters of 0.20 mm and may extend through the printed circuit board 910. The overall via pattern 920 may have dimensions of 2.0 mm or less and may be spaced from other via patterns by 2.0 mm or less. It will be understood that these dimensions are given by way of example and are not limiting.
(55) A printed circuit board configured for attachment to a conventional press fit connector may have a similar layout to the via patterns 920, 922, 924 and 926 shown in FIG. 9 and described above. However, because the press fit connector relies upon contact tails that are inserted into respective vias in the printed circuit board, the dimensions of a press fit via pattern are larger than the dimensions of a surface mount via pattern as described herein. In particular, the signal vias and the ground vias configured to accept contact tails of a press fit connector are larger in diameter than corresponding vias configured for solder attachment to a surface mount connector, and the center-to-center spacing between vias is larger to achieve a desired impedance and to limit crosstalk between conductors. Accordingly, it is possible to achieve greater miniaturization using surface mount connectors and the printed circuit boards described herein, as compared with press fit connectors and corresponding printed circuit boards.
(56) Referring again to
(57) In some embodiments, the connector leads of the surface mount connector may be formed of superelastic materials. For example, the signal leads 120 and 122 shown in
(58) Having thus described several aspects of at least one embodiment, it is to be appreciated various alterations, modifications, and improvements will readily occur to those skilled in the art. Such alterations, modifications, and improvements are intended to be part of this disclosure, and are intended to be within the spirit and scope of the invention. Accordingly, the foregoing description and drawings are by way of example only.