Semiconductor Chip and Optical Module
20230283046 · 2023-09-07
Inventors
- Takahiko Shindo (Musashino-shi, Tokyo, JP)
- Meishin Chin (Musashino-shi, Tokyo, JP)
- Shigeru Kanazawa (Musashino-shi, Tokyo, JP)
Cpc classification
H01S5/12
ELECTRICITY
H01S5/026
ELECTRICITY
H01S5/50
ELECTRICITY
H01S5/164
ELECTRICITY
H01S5/1082
ELECTRICITY
International classification
H01S5/10
ELECTRICITY
H01S5/12
ELECTRICITY
Abstract
Provided is a semiconductor chip that can reduce the man-hours for mounting on an optical module, a subcarrier, or the like, and reducing the dedicated area of the subcarrier or the like. The semiconductor chip includes a waveguide that is terminated inside at an output end portion from which light is emitted, without contacting an emission end face, and a window region made of a bulk semiconductor and disposed between the waveguide and the emission end face, wherein the semiconductor chip is provided with an open groove formed in the output end portion so that the emission end face is a side wall formed by etching.
Claims
1. A semiconductor chip including a waveguide terminated inside at an output end portion from which light is emitted, without contacting an emission end face, and a window region made of a bulk semiconductor and disposed between the waveguide and the emission end face, the semiconductor chip comprising: an open groove formed in the output end portion wherein the emission end face is a side wall formed by etching.
2. The semiconductor chip according to claim 1, wherein the open groove has a cleavage plane.
3. The semiconductor chip according to claim 1, wherein a length L of the window region extending from a terminal end of the waveguide to the emission end face is 5 μm<L<15 μm.
4. The semiconductor chip according to claim 2, wherein the waveguide is a bent waveguide forming an angle of θ.sub.wg with respect to a perpendicular line of the cleavage plane, and when an incident angle of light with respect to the emission end face is defined as θ.sub.1 and the light is refracted at the emission end face and emitted to the open groove at an emission angle θ.sub.2, θ.sub.wg=θ.sub.2−θ.sub.1 and θ.sub.f=θ.sub.2 is satisfied.
5. The semiconductor chip according to claim 4, wherein the incident angle θ.sub.1 of light with respect to the emission end face is 4°<θ.sub.1<8°.
6. The semiconductor chip according to claim 1, further comprising: a DFB laser having an active layer composed of a multiple quantum well that generates an optical gain by current injection, and a diffraction grating; an EA modulator having an absorption layer composed of a multiple quantum well having a composition different from that of the DFB laser; and a semiconductor optical amplifier having an active region with the same composition as the DFB laser and connected to the waveguide of the output end portion, wherein the DFB laser, the EA modulator, and the semiconductor optical amplifier are monolithically integrated on a same substrate.
7. The semiconductor chip according to claim 6, wherein the DFB laser, the EA modulator, and the semiconductor optical amplifier are formed on a (100) plane of an InP substrate, and an optical axis of the DFB laser is a direction of a crystallographic orientation [011] or [01-1-] of the substrate.
8. An optical module, comprising: a semiconductor chip according mounted in a package and including: a waveguide terminated inside at an output end portion from which light is emitted, without contacting an emission end face; a window region made of a bulk semiconductor and disposed between the waveguide and the emission end face; and an open groove formed in the output end portion wherein the emission end face is a side wall formed by etching, wherein the waveguide is a bent waveguide forming an angle of θ.sub.wg with respect to a perpendicular line of the cleavage plane, and when an incident angle of light with respect to the emission end face is defined as θ.sub.1 and the light is refracted at the emission end face and emitted to the open groove at an emission angle θ.sub.2, θ.sub.wg=θ.sub.2−θ.sub.1 and θ.sub.f=θ.sub.2 is satisfied.
9. The optical module according to claim 8, wherein the incident angle θ.sub.1 of light with respect to the emission end face is 4°<θ.sub.1<8°.
Description
BRIEF DESCRIPTION OF DRAWINGS
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DESCRIPTION OF EMBODIMENTS
[0053] Embodiments of the present invention will be described hereinafter in detail with reference to the drawings. Hereinafter, an optical transmitter on which an AXEL chip is mounted will be mainly described as an example, but the present embodiment is applicable to various optical modules mounted with semiconductor chips comprising optical semiconductor devices that emit light, and is not intended to limit parameters such as individual components, structures thereof, and oscillation wavelengths.
[0054] As described above, in the cleavage process of a semiconductor chip, a cleavage position error of approximately ±10 μm occurs. On the other hand, since the length of the window region required for securing AXEL characteristics is in the range of 5 μm to 15 μm, it has been difficult to manufacture AXEL chips in a stable manner at a high yield. Therefore, in the present embodiment, an emission end face of an AXEL chip is formed not by cleavage but by a dry etching process. Since the position of the emission end face can be aligned with high accuracy by a photolithography process, the emission end face can be generally formed with a positioning accuracy of ±1 μm or less. Also, in the dry etching process for forming the emission end face, by forming an open groove having a sufficient length in order to compensate for manufacturing errors of the cleavage position, a margin can be secured even for a general cleavage process.
[0055]
[0056] The size and position of an opening region for forming the etched facet are determined by a photolithography mask. Therefore, open grooves 105 of any shape can be formed collectively on a wafer, with a misalignment error of ±1μ or less. As can be seen from
[0057]
[0058] In
[0059] At this moment, the traveling direction of the emitted light is designed to be perpendicular to the cleavage plane 114. Therefore, when viewed from the outside of the semiconductor chip, the emission angle is 0°, and the semiconductor chip can be considered as a semiconductor chip that vertically outputs light from the emission end face. As a result, the load on the mounting process can be reduced, and the area occupied by the semiconductor chip during mounting can be reduced. In order to adjust the outgoing light from the semiconductor chip in a direction perpendicular to the cleavage plane 114, each of the angles shown in
θ.sub.wg=θ.sub.2−θ.sub.1
θ.sub.f=θ.sub.2
[0060] Here, the relationship between θ.sub.1 and θ.sub.2 is derived from the Snell's law. Therefore, by designing the incident angle θ.sub.1 capable of sufficiently suppressing the end face reflection, the bending angle θ.sub.wg of the waveguide and the angle θ.sub.f of the etched facet are uniquely determined.
[0061] By using the above-mentioned etched facet structure, the length of the window region can be made with high accuracy regardless of the error of the cleavage position, and the yield in the window region manufacturing process can be remarkably improved. The positional accuracy in a general cleavage process is approximately ±10 μm. As shown in
[0062] As shown in
EXAMPLE 1
[0063] Example 1 describes, as an example, a 1.3 μm band optical transmitter capable of generating a 25 Gbit/s modulated signal, in which the optical output during modulation is increased to 8 dBm or more in order to cope with a high-loss budget system.
[0064]
[0065] An emission end face 241 at an output end portion 204 includes an etched facet formed by dry etching. By adjusting the angle of the etched facet, the light beam that is output from the emission end face 241 through the window region 243 from the waveguide 242 is emitted in a direction perpendicular to the cleavage end face.
[0066] Next, a production process of the AXEL 200 will be described. An initial substrate in which a lower SCH (Separated Confinement Heterostrture) layer, an active layer of a multiple quantum well layer (MQW1), and an upper SCH layer are sequentially grown on an n-InP substrate (100), is used. The multiple quantum well layer has an optical gain in an oscillation wavelength of 1.3 μm band. The multiple quantum well is composed of six quantum well layers, and the initial growth substrate including these layers has a structure optimized for high-efficiency operation of the DFB laser.
[0067] First, leaving a part that becomes the DFB laser 201 and the SOA 203, other active layers are selectively etched, and a multiple quantum well layer (MQW2) for the EA modulator 202 is grown by butt joint regrowth. Here, the DFB laser 201, the EA modulator 202, and the SOA 203 are arranged so that light propagates in this order. In the SOA 203, the core layer structure formed on the initial growth substrate is left as it is, and the layer structure same as that of the DFB laser 201 is obtained. The difference between the layer structures of these regions is only the presence/absence of the diffraction grating 212. Thus, despite the structure in which a plurality of regions are integrated, the number of regrowth cycles is suppressed, and low-cost manufacturing is made possible.
[0068] Next, a boundary part between the DFB laser 201 and the EA modulator 202, a boundary part between the EA modulator 202 and the SOA 203, and the output end portion 204 extending from a terminal end of the SOA modulator 202 to the emission end face are selectively etched again. By performing butt joint regrowth, a bulk semiconductor that becomes a core layer of the output end portion 204 is grown. Subsequently, the diffraction grating 212 that operates in the 1.3 μm wavelength band of oscillation is formed in the DFB laser 201. Here, the resonator of the DFB laser 201 forms a diffraction grating to output light in the direction of the crystallographic orientation [011] or [01-1-] (hereafter “1-” denotes a superscript bar of 1) of the substrate. Subsequently, a p-InP cladding layer and a contact layer are grown again on the entire surface of the device by regrowth. The thickness of the cladding layer is designed so that the light field does not cover the electrode region, and is 2.0 μm in Example 1
[0069] Next, a mesa structure of the part that becomes the waveguide is formed by etching. In the window region 243, the part that becomes the terminal end of the waveguide 242 is also produced collectively in the present process.
[0070]
[0071] As described above, the DFB laser 201 is formed so as to allow light to propagate in the direction of the crystallographic orientation [011] (or [01-1-]), and the EA modulator 202 and the SOA 203 are also arranged in the same orientation and on the same optical axis. The wavelength is formed between the SOA 203 and the window region 243 of the output end portion 204. Here, the waveguide 242 reaching the window region 243 is a bent waveguide having an angle of θ.sub.wg with respect to the crystallographic orientation [011] (or [01-1-]), and light after the bent waveguide propagates at the propagation angle described above.
[0072] In Example 1, the incident angle θ.sub.1 of light to the etched facet is designed so that θ.sub.1=5° is satisfied. Therefore, since it is assumed that the outgoing angle θ.sub.2 from the etched facet is approximately 16°, the bending angle θ.sub.wg of the waveguide is set at 11°.
[0073] Next, semi-insulating InP layers doped with Fe are formed on both sides of the mesa by burying regrowth. By this process, bulk InP is also grown in the window region. Subsequently, in order to electrically isolate the respective regions of the DFB laser 201, the EA modulator 202, and the SOA 203, the contact layers between the respective regions are removed by wet etching. Subsequently, a P-side electrode for injecting current through the contact layer on each region of the upper surface of the semiconductor substrate is formed.
[0074] Next, an open groove (described later) is formed by a dry etching process, thereby forming an emission end face (etched facet) for outputting light from the AXEL 200. Thereafter, the InP substrate is polished to approximately 150 μm, and an electrode is formed on the rear surface of the substrate, completing the process on the semiconductor wafer. Next, a semiconductor bar including a plurality of AXEL chips is produced by forming a crystal (011) plane by cleavage. Here, a cleavage process for a typical semiconductor chip is used, wherein the cleavage position accuracy is ±10 μm or less. In the semiconductor bar in which a plurality of optical transmitter chips produced by a cleavage process are connected, AR coating is applied to an end face on the front side where S light is output, and high reflection coating HR is applied to an end face on the opposite side.
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[0078] Next, each AXEL chip was mounted on a butterfly type package by a general active mounting process, to produce an optical transmitter. An optical fiber was coupled to the produced optical transmitter, and the optical output was evaluated under the same conditions as the above-described measurement, and optical coupling losses before and after mounting on the optical transmitter were compared.
[0079] The conventional example shows the same data as
[0080] The evaluation result of the optical transmitter according to Example 1 is indicated by ○. In the AXEL chip equipped with the etched facet, no correlation is observed between the amount of deviation of the cleavage position and the optical loss at the time of manufacturing, and a stable optical coupling loss is obtained even against the positional deviation of the cleavage. From this result, by introducing the etched facet, it is possible to manufacture, with a high yield, an AXEL chip having a window structure in which variation in optical loss is inevitable in the past. The yield of the AXEL chip in the wafer was approximately 40% in the conventional manufacturing method with respect to the target value of the optical output at the time of modulation of 8 dBm or more. However, in the AXEL chip according to Example 1, the manufacturing yield can be improved significantly up to approximately 75%.
[0081] Using the optical transmitter having the AXEL chip of Example 1 mounted thereon, the characteristics at 25 Gbit/s modulation were evaluated to confirm the operation quality. As modulated signals, NRZ and PRBS 2.sup.31-1 were used. Here, in all the AXEL chips, the current value of the DFB laser 201 was set to 80 mA, and the voltage applied to the EA modulator 202 was set to −1.5 V, to perform comparison. The drive current of the SOA 203 was set to 70 mA. Here, from the EYE waveform evaluation of 25 Gbit/s, a dynamic extinction ratio of 9.1 dB was obtained.
[0082]
EXAMPLE 2
[0083] The miniaturization of the optical transmitter on which an AXEL chip is mounted will be described with reference to
[0084] On the other hand, by applying the AXEL chip of Example 1 shown in
[0085] Since the AXEL chip is a device in which regions having a plurality of functions are integrated, the length of the chip in the light propagation direction is relatively long. Further, SOA having a long optical path length is required to increase the output of the optical output, resulting in a longer AXEL chip. A typical AXEL chip has a length of 1250 μm and a width of 250 μm, and when the angle of a bent waveguide for suppressing end face reflection is set at 7°, the emission angle θ.sub.2 becomes 22°. Therefore, the AXEL chip 311 needs to be disposed at θ.sub.2=22° with respect to the emission direction of the butterfly type package. In this case, the dedicated area A of the AXEL chip 311 is increased by approximately four times compared with the AXEL chip 301.
[0086]
[0087] When a bent waveguide 342 is introduced into the AXEL chip 330, a beam emission position 344 at which light emitted from the waveguide reaches a cleavage plane 341 is shifted from the center of the cleavage plane 341. That is, if the width W of the AXEL chip 330 is reduced too much, the light beam emission position approaches an end of the cleavage plane 341. In addition, if the light beam is designed so that the emission position thereof is located at the end of an end face, due to the large deviation error in the position in the cleavage process as described above, there is a risk that the emission position is shifted from the cleavage plane and reaches a side wall. For this reason, in the past, the width of the AXEL chip is made large enough to compensate for the errors of the cleavage position, and the width W=approximately 250 μm was required. According to Example 1, the introduction of the etched facet can prevent the positional deviation of the emission position caused by a manufacturing error of the cleavage process, and therefore the width of the AXEL chip can be reduced.
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[0089] An AXEL chip 400 is a monolithic integrated device in which the 300 μm-long DFB laser 401 having an oscillation wavelength of 1.3 μm, the EA modulator 402 having a length of 150 μm, and the SOA 403 are integrated. The length of the SOA 403 is 200 μm, and is set to longest in order to achieve both the optical waveform quality and high output characteristics at the time of 25 Gbit/s modulation. The total length L in the direction [011] of the AXEL chip 400 is 1250 μm.
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[0091] In this case, an offset W.sub.OF of the optical axis with respect to a crystallographic orientation [01-1] is approximately 120 μm (450 μm×tan θ.sub.wg), and this value is a limiting value of the width W of the AXEL chip 400. In Example 2, a margin W.sub.MG from the bent waveguide 442 to the side wall of the chip is 30 μm, and the width of the AXEL chip 400 is 150 μm. The light emission position in the vicinity of the intersection between the (011) plane of a cleavage end face 441 and the (01-1) plane of the chip side wall. According to this configuration, since the positional deviation of the emission position caused by a manufacturing error of the cleavage process can be prevented by introducing the etched facet, the width of the AXEL chip 400 can be reduced significantly as compared with the width W=250 μm of the AXEL chip 330 shown in
[0092]
[0093]
[0094] On an actual wafer, with four AXEL chips as the basic building blocks, 8×66 chips are arranged in a 1 cm square to form a group, and a plurality of chip groups are further produced.
[0095] Hereinafter, the cleavage process will be described. After the group of chips described above (8×66 chips) are cut out from the wafer, eight bars including 66 chips are produced by cleavage of the (011) plane. After AR, HR coating is applied to the (011) plane and the (01-1-) plane of each bar, cleavage is performed on the (01-1) plane of each bar, to cut the bar into a single AXEL chip. As a result of checking the positional accuracy in the two cleavage processes, it was confirmed that the positional error was ±10 μm or less all cleavage processes. As a result of confirming the chip emission angle of the produced AXEL chip, it was confirmed that the emission angle of ±0.01° or less was accomplished in all of the chips with respect to the (011) plane of the cleavage end face 551.
[0096] As described above, an AXEL chip having a chip width of 150 μm and an emission angle of 0° is realized with a high yield. The conventional AXEL chip has an emission angle of 22° and a chip width of 250 μm at most. On the other hand, in the AXEL chip of this example, the chip size is reduced by approximately 40%, and the emission angle is set to 0°, so that the chip dedicated area when the chip is mounted as an optical transmitter can be reduced by 75%.
[0097] The basic characteristics of the produced AXEL chip were evaluated. At an operating temperature of 55° C., a current of 80 mA was applied to the DFB laser and a current of 100 mA was applied to the SOA. The EA modulator was modulated by a 25 Gbit/sNRZ signal at an applied voltage of −1.5 V and an amplitude voltage of Vpp=1.5 V, whereby high output characteristics reaching an optical output at modulation of 11 dBm were confirmed. When the yield of the optical transmitter produced by the AXEL chip was evaluated, a very good result of approximately 60% was confirmed in the AXEL chip having the etched facet according to Example 2, with respect to the target optical output at modulation of 10 dBm or more.