Post-fabrication trimming of silicon ring resonators via integrated annealing

11808978 · 2023-11-07

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Abstract

Methods for post-fabrication trimming of a silicon ring resonator are disclosed. Methods include fabricating a heating element, positioned within 2 microns of the silicon ring resonator, subjecting the silicon ring resonator to energetic ion implantation, and annealing the silicon ring resonator, using the heating element. The energetic ion implantation shifts a resonance of the silicon ring resonator towards the red side of the electro-magnetic spectrum. The annealing shifts the resonance of the silicon ring resonator towards the blue side of the electro-magnetic spectrum.

Claims

1. A method for post-fabrication trimming of a silicon ring resonator, the method comprising: fabricating a heating element, wherein the heating element is separated from the silicon ring resonator; subjecting the silicon ring resonator to energetic ion implantation, wherein the energetic ion implantation shifts a resonance of the silicon ring resonator towards the red side of the electro-magnetic spectrum; and following the energetic ion implantation, annealing the silicon ring resonator, using the heating element, wherein the annealing shifts the resonance of the silicon ring resonator towards the blue side of the electro-magnetic spectrum.

2. The method of claim 1, wherein the silicon ring resonator is one of a plurality of silicon ring resonators forming an optical circuit, and wherein the annealing shifts the resonance of the silicon ring resonator without shifting a resonance in other silicon ring resonators in the plurality of silicon ring resonators.

3. The method of claim 1, wherein the heating element substantially overlies the silicon ring resonator.

4. The method of claim 1, wherein the heating element comprises a titanium-nitride (TiN) micro-heater.

5. The method of claim 1, wherein the heating element is controlled by an electrical signal.

6. The method of claim 1, wherein the energetic ion implantation comprises boron ion implantation at energies sufficient to create silicon lattice defects in the silicon ring resonator.

7. A silicon ring resonator that has been trimmed, post fabrication, according to the method of claim 1.

8. The silicon ring resonator of claim 7, wherein the silicon ring resonator is a passive resonator.

9. The silicon ring resonator of claim 1, wherein the silicon ring resonator is configured to be used as at least one of an optical filter and an optical switch.

10. The silicon ring resonator of claim 7 or claim 8, wherein the silicon ring resonator contains electrical doping, and is configured to be used as at least one of an optical modulator and an optical detector.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

(1) For a better understanding of the described embodiments and to show more clearly how they may be carried into effect, reference will now be made, by way of example, to the accompanying drawings in which:

(2) FIG. 1 is an image of a ring-resonator modulator;

(3) FIG. 2 is a waveguide section view of the ring-resonator modulator of FIG. 1, taken along line A-A′ in FIG. 1;

(4) FIG. 3 is a plot of current and voltage for a heating element, according to one embodiment;

(5) FIG. 4 is a plot of resonance shift as a function of heater power, according to one embodiment;

(6) FIG. 5 is a plot of resonance shift and calculated change in effective index as a function of change in silicon temperature, according to one embodiment;

(7) FIG. 6 is a plot of implant-induced and annealed resonance shift and calculated change in effective index achieved as a function of implanted defect dose, according to one embodiment;

(8) FIG. 7 is a plot of spectra for a device pre- and post-3×10.sup.13 cm.sup.−2 implantation, after annealing, according to one embodiment;

(9) FIG. 8 is a plot of spectra for a four-ring device before and after individual ring-trimming to align to 50 GHz spacing, according to one embodiment;

(10) FIG. 9 is a simplified process flow diagram for a method for post-fabrication trimming of a silicon ring resonator, in accordance with one embodiment; and

(11) FIG. 10 a simplified process flow diagram for a method for post-fabrication trimming of a silicon ring resonator, the silicon ring resonator having a silicon dioxide cladding, in accordance with one embodiment.

(12) The drawings included herewith are for illustrating various examples of articles, methods, and apparatuses of the teaching of the present specification and are not intended to limit the scope of what is taught in any way.

DESCRIPTION OF EXAMPLE EMBODIMENTS

(13) Various apparatuses, methods and compositions are described below to provide an example of an embodiment of each claimed invention. No embodiment described below limits any claimed invention and any claimed invention may cover apparatuses and methods that differ from those described below. The claimed inventions are not limited to apparatuses, methods and compositions having all of the features of any one apparatus, method or composition described below or to features common to multiple or all of the apparatuses, methods or compositions described below. It is possible that an apparatus, method or composition described below is not an embodiment of any claimed invention. Any invention disclosed in an apparatus, method or composition described below that is not claimed in this document may be the subject matter of another protective instrument, for example, a continuing patent application, and the applicant(s), inventor(s) and/or owner(s) do not intend to abandon, disclaim, or dedicate to the public any such invention by its disclosure in this document.

(14) Furthermore, it will be appreciated that for simplicity and clarity of illustration, where considered appropriate, reference numerals may be repeated among the figures to indicate corresponding or analogous elements. In addition, numerous specific details are set forth in order to provide a thorough understanding of the example embodiments described herein. However, it will be understood by those of ordinary skill in the art that the example embodiments described herein may be practiced without these specific details. In other instances, well-known methods, procedures, and components have not been described in detail so as not to obscure the example embodiments described herein. Also, the description is not to be considered as limiting the scope of the example embodiments described herein.

(15) In this disclosure, the ring modulators are treated as passive filters in order to assess the described trimming technique(s). Based on at least the data disclosed herein, it is expected that the described trimming technique(s) are also applicable to both passive (filters) and active (modulator) devices.

(16) Example devices discussed herein were fabricated by the Institute of Microelectronics (IME) of the Agency for Science, Technology and Research (A*STAR) on a 220 nm silicon on insulator (SOI) platform. The devices included four ring resonator modulators coupled to a single bus waveguide with radii of 12 μm, 12.005 μm, 12.01 μm, and 12.015 μm, respectively, with the aim to provide a spacing between resonances for WDM applications.

(17) FIG. 1 illustrates an optical image of an example embodiment of a ring-resonator modulator. The dashed line indicates the location of a TiN heater. FIG. 2 illustrates a schematic waveguide cross-section of the ring-resonator modulator of FIG. 1.

(18) As illustrated in FIG. 2, the waveguides were designed for single-mode TE operation, with a width of 500 nm and slab height of 90 nm. Each ring was designed with a 2.1 pm wide TiN heater directly above, with approximately 97% coverage, separated by 2 pm silicon-dioxide from the silicon. The ring modulator comprised a p−n+ junction with a central offset of 120 nm and heavily-doped contact region separations 1050 nm from the waveguide center.

(19) Heater Efficiency

(20) The efficiency of the integrated TiN heater was determined by measuring the device resonance shift in an unimplanted device as a function of heater power. This resonance shift was then used to estimate the temperature of the ring resonator under bias. Device resonance shifts from ion implantation-induced defects and in-situ annealing of these defects using the integrated heater were quantified. Measurements were performed using a Keysight 8164A Tunable Laser and bias was applied using a Keithley 2400 Source Meter.

(21) In order to determine the effectiveness of the TiN heater for in-situ annealing of lattice defects, the approximate temperature reached in the silicon with the heater active was determined. The thermo-optic coefficient of silicon is often quoted as approximately dn/dT=1.84×10.sup.−4 K.sup.−1 (see e.g. G. T. Reed and A. P. Knights, Silicon Photonics: An Introduction. West Sussex, England: John Wiley & Sons, Ltd, January 2004, ch. 4.8.3, pp. i-xxiii), which may be considered valid for variations around room temperature. For larger temperature increases, such as those expected during the methods disclosed herein, the accuracy may be improved by accounting for the change in dn/dT with temperature (see e.g. H. H. Li, “Refractive index of silicon and germanium and its wavelength and temperature derivatives,” J. Phys. Chem. Ref. Data, vol. 9, no. 3, pp. 561-658, July 1980).

(22) To account for the change in dn/dT with temperature, simulations were performed in Synopsis' FEMSIM suite in RSoft using the geometry illustrated in FIGS. 1 and 2. The silicon's refractive index was adjusted in simulation to emulate increasing temperature, and mode simulations were performed to extract the change in waveguide effective index due to the heater, Δn.sub.e, across wavelength and temperature. Δn.sub.env may be related to a shift in ring resonance as:

(23) Δ n env = ( Δ λ res λ res ) n g ( 1 )
where λ.sub.res is the resonant wavelength of an unperturbed waveguide, n.sub.g is the group index, and Δλ.sub.res, is the resonance shift at each heater power.

(24) FIG. 3 illustrates a plot of heater I-V characteristics. FIG. 4 illustrates a plot of resonance shift Δλ.sub.res in a 12 μm radius ring for a particular resonance λ.sub.res of 1530 nm in an unimplanted device, as a function of heater power.

(25) As shown in FIG. 3, the heater exhibits linear I-V operation with a slope of 1.54 mA/V until approximately 10 V, beyond which the heater current saturates and begins to fail. Suspected failure mechanisms include thermally-activated failure, such as burning or melting of the heater, or void formation leading to an open-circuit (see e.g. Y. L. Cheng, B. J. Wei, F. H. Shih, and Y. L. Wang, “Stability and Reliability of Ti/TiN as a Thin Film Resistor,” ECS Journal of Solid State Science and Technology, vol. 2, no. 1, pp. Dec. 15, 2013).

(26) As shown in FIG. 4, generally linear operation was observed, with an efficiency of 8.85×10.sup.−2 nm/mW. Using equation (1) to calculate each resonance shift's corresponding Δn.sub.env, the change in silicon temperature relative to room temperature may be estimated. FIG. 5 illustrates a plot of resonance shift and calculated change in effective index as a function of change in silicon temperature. As illustrated in FIG. 5, a resonance shift of Δλ=9.1×10.sup.−2 nm/K was observed, and the corresponding change in effective index was 2.42×10.sup.−4 K.sup.−1. The maximum absolute waveguide temperature was T=293° C. prior to failure. At these temperatures, there may be significant annealing of optically-active vacancy-type lattice defects (see e.g. D. E. Hagan and A. P. Knights, “Mechanisms for optical loss in SOI waveguides for mid-infrared wavelengths around 2 μm,” Journal of Optics, vol. 19, no. 2, p. 025801, February 2017). Since the expected temperature changes in the silicon were far greater than the ambient temperature variation, the device was not temperature-stabilized during measurement.

(27) Defect-Induced Resonance Shift

(28) Multiple chips were subjected to high-energy (3 MeV) boron ion implantation, adequate to penetrate both the TiN heater and the silicon waveguide beneath resulting in the creation of silicon lattice defects. These defects increase the silicon refractive index to produce a red-shift in the device spectrum. This high-energy implantation ensures this trimming process in entirely back-end with no modification to the process flow of the foundry.

(29) To quantify the index change caused by the presence of defects, device spectra from each chip were recorded under thermal stabilization at 25° C. with a Thermoelectric Cooler (TEC) before being subjected to ion implantation with doses varying from 3×10.sup.10 to 3×10.sup.13 cm.sup.−2. Post-implantation device spectra were similarly recorded to calculate the defect-induced red-shift as a function of dose.

(30) FIG. 6 illustrates a plot of implant-induced and annealed resonance shift and calculated change in effective index achieved as a function of implanted defect dose. The extracted Q-factor and notch-depth for these conditions were 5500, 5200, and 6100, and 16.8, 7.3, and 30.3 dB, respectively.

(31) FIG. 7 illustrates plots of spectra for a device pre- and post-3×10.sup.13 cm.sup.−2 implantation, and following annealing.

(32) The change in the waveguide mode's effective index, Δn.sub.eff may be calculated for each resonance shift as follows:

(33) Δ n eff = Δ λ res L m , m = 1 , 2 , 3 , .Math. ( 2 )
where L is the ring cavity length, and m is the order of the resonant mode. The waveguide mode, simulated using FEMSIM in RSoft, yielded an n.sub.eff of 2.569 which, with an m of 125, corresponds to a resonant wavelength close to the resonance of interest at 1550 nm. The effect of dispersion is not included in (2), as the equation may be considered accurate for small wavelength perturbations such as those measured here. A clear trend of increased red-shift with implant dose was observed.

(34) In-Situ Defect Annealing

(35) While implanting a device with defects produces a spectral red-shift, annealing a fraction of those defects can be expected to produce an appropriate subsequent blue-shift (relative to the implanted devices). Prior to annealing, the spectrum of the four-ring device was recorded. The ring corresponding to the blue-most resonance in the initial spectrum was chosen as the annealing subject to avoid the overlapping of neighboring resonances. The initial spectrum was then used to determine the primary wavelength spacing between this ring resonance and another arbitrary resonance.

(36) The TiN heater bias was ramped up, held at a bias step for 60 seconds, and then ramped back down followed by a cool-down time of 20 seconds after which a post-annealing spectrum was recorded and the annealing subject's permanent resonance shift calculated.

(37) The maximum annealed permanent resonance shifts, as well as their respective change in effective index as a function of chip implant dose, are plotted in FIG. 6.

(38) Measurable defect annealing begins to occur at heater powers above approximately 150 mW. The maximum achievable shift for the higher doses indicates only partial recovery, likely due to the silicon not reaching temperatures high enough to fully remove the defects introduced (i.e. approximately 350° C.). Vacancy-type defects are mobile above room temperature and can migrate to form more complex defects that can survive beyond 500° C. (see e.g. J. Srour, C. Marshall, and P. Marshall, “Review of displacement damage effects in silicon devices,” IEEE Transactions on Nuclear Science, vol. 50, no. 3, pp. 653-670, June 2003).

(39) Surprisingly, annealed resonance shifts for lower dose implants begin to approach a steady but non-zero blue-shift. This may indicate that there are as-fabricated defects present in the devices, e.g. surviving defects from the doping to form the p−n+ junction, defects at the Si—SiO.sub.2 interface, and/or re-structuring of the cladding oxide. These intrinsic defects may be partially or fully removed by the annealing, in turn causing a blue shift of ˜400 pm. This intrinsic resonance shift was also observed in an unimplanted sample, which may imply that there is an inherent trimming range associated with as-fabricated devices.

(40) With reference to FIG. 6, it should be noted that resonance notch-depth may be precisely controlled through implantation and annealing. While the Q-factor may also be affected, it is typically considered difficult to obtain from these spectra, e.g. due to the lack of isolation of the nearby resonances, and is thus subject to uncertainty. Measurable variation in Q-factor was evident only in devices with higher implantation doses due to the high loss existing in the ring pre-implantation. Using FEMSIM, the propagation loss due to the p−n+ junction was calculated to be in excess of 35 dB/cm. Measurable propagation loss in passive waveguide test structures due to ion-implantation (e.g. measured following the method of P. J. Foster, J. K. Doylend, P. Mascher, A. P. Knights, and P. G. Coleman, “Optical attenuation in defect-engineered silicon rib waveguides,” Journal of Applied Physics, vol. 99, no. 7, p. 073101, April 2006) at the highest three doses of 3×10.sup.12 cm.sup.−2, 1×10.sup.13 cm.sup.−2, and 3×10.sup.13 cm.sup.−2 were 10.2, 19.2, and 53.3 dB/cm, respectively. Below these doses, the passive propagation loss was approximately 3 dB/cm, likely dominated by sidewall scattering. Notably, defect induced propagation loss for all doses below 3×10.sup.12 cm.sup.−2 were comparable with this value, and as such defect implantation appears to have a negligible impact on waveguide loss for these lower doses.

(41) The annealing of defects (and thus device trimming) was observed to require a heater bias exceeding 200 mW, with associated waveguide temperature in excess of 200° C. This is greater than the power typically applied during normal device operation, and is further consistent with thermal annealing of silicon lattice defects. For example, the silicon divacancy has an annealing activation energy of 1.25 eV (see e.g. L. J. Cheng, J. C. Corelli, J. W. Corbett, and G. D. Watkins, “1.8-, 3.3-, and 3.9-Bands in Irradiated Silicon: Correlations with the Divacancy,” Physical Review, vol. 152, no. 2, pp. 761-774, December 1966), which suggests that residual defects in the devices trimmed in the manner described herein have a 50% removal rate at a temperature of 70° C. greater than 10 years.

(42) During annealing, all heaters exhibited similar I-V characteristics to that shown in FIG. 3 despite the potential damage in the TiN caused by high-energy ion implantation, which may indicate repair of the TiN as it approaches high temperatures. The maximum achievable mean and standard deviation heater power across all devices was μ P=295.1 and σ P=1.4 mW, respectively. From FIG. 4, these translate to a mean and standard deviation resonance shift of μ Δλ=26.1 and σ Δλ=1.2 nm, respectively. From FIG. 5, a mean and standard deviation silicon temperature increase of μ ΔT=287.2 and σ ΔT=13.4 K, respectively, indicating a relatively insignificant deviation in defect annealing across devices.

(43) Resonance Trimming

(44) One application of the in-situ annealing described herein is to correct for fabrication variance in silicon ring resonators. For example, a four-ring modulator system designed for resonance spacing of 50 GHz, but containing random variation from this spacing due to fabrication errors, was trimmed using in-situ annealing.

(45) FIG. 7 illustrates a device spectrum before ion implantation (indicated by the beginning of the horizontal arrow labeled “Implant”) and after ion implantation (indicated by the end of the horizontal arrow labeled “Implant”). FIG. 7 also illustrates the device spectrum before annealing (indicated by the beginning of the arrow labeled “Annealing”, which is equivalent to the end of the horizontal arrow labeled “Implant”) and after annealing (indicated by the end of the arrow labeled “Annealing”).

(46) As illustrated in FIG. 7, after annealing (i.e. resonance trimming), the resonance spacing from left to right was 49.14, 50.48, and 49.21 GHz, with each resonance trimmed to within 15 pm of their target wavelength. There was a net blue-shift of the resonances (compared to the implanted device), as expected from the annealing process.

(47) Additionally, or alternatively, defect annealing as disclosed herein may facilitate the precise tuning of loss within a ring resonator, which may e.g. bring an under-coupled ring closer to critical-coupling with an increase in notch-depth. Such a reduction in loss may be limited by the amount of defect annealing allowed by the achievable temperatures. The modulation efficiency of the implanted devices was observed to be degraded (reduced by a factor of 2 at −4 V bias for doses above 3×10.sup.12 cm.sup.−2) and did not show significant recovery after annealing. This degradation is thought to be due to the chip-wide implantation. It is expected that this may be addressed e.g. through targeted implantation in the waveguide core. For example, it is expected that using oxide etches may facilitate better heat distribution to the silicon. Additionally, it is expected that providing one or more masked regions may allow for a more targeted, lower-energy ion implantation that may primarily or only affect the optically-active waveguide core.

(48) Commercial devices featuring ring resonators are often designed with temperature stabilization in mind. Advantageously, with the annealing approach disclosed herein, an entire device may be thermally tuned and/or stabilized to a given grid using a single control circuit (see e.g. W. A. Zortman, D. C. Trotter, and M. R. Watts, “Silicon photonics manufacturing,” Opt. Express, vol. 18, no. 23, p. 23598, November 2010).

(49) Alternatively, one or more rings of a silicon ring resonator may be stabilized at a fixed temperature, and a multi-line laser (or system of individual lasers) may be tuned to the devices' resonances. Such a method may be extended to N-ring systems, provided the required shift does not exceed the available range allotted by the defects.

(50) The following is a description of a method for post-fabrication trimming of a silicon ring resonator, which may be used by itself or in combination with one or more of the other features disclosed herein including the use of any of the apparatus and/or systems disclosed herein.

(51) Referring to FIG. 9, there is illustrated a method 900 for post-fabrication trimming of a silicon ring resonator. At 910, a heating element is fabricated in situ, preferably within 2 microns of the silicon ring resonator. For example, a titanium-nitride (TiN) micro-heater may be fabricated using any suitable fabrication method known in the art.

(52) At 920, the silicon ring resonator is subjected to energetic ion implantation in order to shift a resonance of the silicon ring resonator towards the red side of the electro-magnetic spectrum. For example, the ion implantation may include boron ion implantation at energies sufficient to penetrate both the heating element and the silicon waveguide beneath resulting in the creation of silicon lattice defects.

(53) At 930, the silicon ring resonator is annealed using the heating element, in order to shift the resonance of the silicon ring resonator towards the blue side of the electro-magnetic spectrum.

(54) The following is a description of a method for post-fabrication trimming of a silicon ring resonator that has a silicon dioxide cladding, which may be used by itself or in combination with one or more of the other features disclosed herein including the use of any of the apparatus and/or systems disclosed herein.

(55) Referring to FIG. 10, there is illustrated a method 1000 for post-fabrication trimming of a silicon ring resonator, the silicon ring resonator having a silicon dioxide cladding. At 1010, a heating element is fabricated in situ, preferably within 2 microns of the silicon ring resonator. For example, a titanium-nitride (TiN) micro-heater may be fabricated using any suitable fabrication method known in the art).

(56) At 1020, the silicon dioxide cladding of the silicon ring resonator is annealed using the heating element, in order to shift the resonance of the silicon ring resonator towards the blue side of the electro-magnetic spectrum.

(57) As used herein, the wording “and/or” is intended to represent an inclusive—or. That is, “X and/or Y” is intended to mean X or Y or both, for example. As a further example, “X, Y, and/or Z” is intended to mean X or Y or Z or any combination thereof.

(58) While the above description describes features of example embodiments, it will be appreciated that some features and/or functions of the described embodiments are susceptible to modification without departing from the spirit and principles of operation of the described embodiments. For example, the various characteristics which are described by means of the represented embodiments or examples may be selectively combined with each other. Accordingly, what has been described above is intended to be illustrative of the claimed concept and non-limiting. It will be understood by persons skilled in the art that other variants and modifications may be made without departing from the scope of the invention as defined in the claims appended hereto. The scope of the claims should not be limited by the preferred embodiments and examples, but should be given the broadest interpretation consistent with the description as a whole.