METHOD FOR INCREASING THE DISCHARGE CAPACITY OF A BATTERY CELL AND CHARGE SYSTEM ADAPTED TO SUCH METHOD

Abstract

A method is used for increasing the discharge capacity (Q.sub.disch) of a battery cell provided with charge/discharge terminals to which a charging voltage can be applied with a flowing charging current. The method involves applying a plurality of charge cycles to the battery cell, each of which comprises applying a plurality of constant voltage stages each comprising intermittent voltage plateaus, and monitoring current flow. The temperature of the battery cell is monitored and maintained under a predetermined limit temperature, and the charge cycles are performed until the discharge capacity reaches a predetermined target capacity greater than the rated capacity.

Claims

1. A method for increasing a discharge capacity (Q.sub.disch) of a battery cell having a rated capacity and provided with charge/discharge terminals to which a charging voltage can be applied with a flowing charging current, the method comprising: implementing a plurality of charge cycles to the battery cell, each of the charge cycles comprising the steps of: applying a plurality of constant voltage stages V.sub.j, where V.sub.j+1>V.sub.j, j=1, 2 . . . , k, each voltage stage comprising intermittent n.sub.j voltage plateaus, between two successive voltage plateaus within a voltage stage, letting the charging current going to rest (I=0 A) for a rest period R.sub.j.sup.p, 1≤p≤n.sub.j, between two successive current rest times R.sub.j.sup.p−1 and R.sub.j.sup.p within a voltage stage V.sub.j, and a pending voltage plateau, detecting the flowing pulse-like current dropping from an initial value I.sub.j,p.sup.ini reaches a final value I.sub.j,p.sup.fin in where 1≤p≤n.sub.j, ending the pending voltage plateau, so that the flowing pulse-like current drops to zero for a rest time R.sub.j.sup.p, with the voltage departing from V.sub.j, after the rest time R.sub.j.sup.p is elapsed, applying back the voltage to V.sub.j, initiating a transition from a voltage stage V.sub.j to the following stage V.sub.j+1 when I.sub.j,p.sup.fin, p=n.sub.j reaches a threshold value I.sub.j,nj.sup.Thr, calculating the following stage V.sub.j+1 as=V.sub.j+ΔV(j), with ΔV(j) relating to the current change ΔI(j)=I.sub.j,p.sup.ini˜I.sub.j,p.sup.fin, p=n.sub.j, and ΔV/Δt a function of the following parameters i, V, Δi/Δt, T, SoC (State of Charge), SOH (State of Health), monitoring the temperature of the battery cell under a predetermined limit temperature, and proceeding the charge cycles until the discharge capacity reaches a predetermined target capacity greater than the rated capacity.

2. The method of claim 1, wherein the calculating step implements the upper voltage limit, and/or the step time, and/or voltage step ΔV and/or ΔI/Δt for the voltage step transition.

3. The method of claim 2, wherein the charge cycles are proceeded until any one of the following conditions is reached: a pre-set charge capacity or state of charge (SOC) is reached, the cell temperature exceeds a pre-set limit value T.sub.lim, or the cell voltage has exceeded a pre-set limit value V.sub.lim.

4. The method of claim 1, further comprising an initial step for determining a K-value and a charge step from inputs including charging instructions for C-rate, voltage and charge time.

5. The method of claim 4, further comprising a step for detecting a Cshift threshold, leading to a step for determining a shift voltage, by applying a non-linear voltage equation and using K-value and ΔC-rate.

6. The method of claim 1, further comprising applying the method to a combination of battery cells arranged in series and/or in parallel.

7. The method of claim 6, implemented to charge a plurality of battery cells connected in series, wherein the method provides intrinsic balancing between the battery cells.

8. The method of claim 1, further comprising collecting battery cell data related to the rated capacity for the battery cell.

9. The method of claim 8, wherein collecting batter cell data includes reading a QR code on the battery cell.

10. A system for increasing a discharge capacity (Q.sub.disch) of a battery cell having a rated capacity and provided with charge/discharge terminals to which a charging voltage can be applied with a flowing charging current, implementing the method according to claim 1, the system comprising an electronic converter connected to a power source and designed for applying a charging voltage to the terminals of the battery cell, the electronic converter being controlled by a charging controller designed to process battery cell flowing current and cell voltage measurement data and charging instruction data, wherein the charging controller is further configured to control the electronic converter so as to proceed perform a plurality of charge cycles, each charge cycle comprising steps for: applying to terminals of the battery cell a plurality of constant voltage stages V.sub.j, where V.sub.j+1>V.sub.j, j=1, 2 . . . , k, each voltage stage comprising intermittent n.sub.j voltage plateaus, and between two successive voltage plateaus within a voltage stage, letting the charging current go to rest (I=0 A) for a rest period R.sub.j.sup.p, 1≤p≤n.sub.j, until the discharge capacity reaches a predetermined target capacity greater than the rated capacity.

11. The system of claim 10, wherein the charge cycles are performed until either one of the following conditions is reached: the cell temperature exceeds a pre-set limit value T.sub.lim, or the cell voltage has exceeded a pre-set limit value V.sub.lim.

12. The system of claim 10, wherein the system is configured to charge a plurality of battery cells connected in series, and wherein the charging controller is further configured to provide intrinsic balancing between the battery cells of the plurality.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

[0102] Figures illustrating Prior Art:

[0103] FIG. 1 is a schematic description of prior art charging methods;

[0104] FIG. 2 illustrates Typical CCCV charging and CC discharge profile;

[0105] FIG. 3 illustrates Multistage constant current charge profile (MSCC);

[0106] FIG. 4 and FIG. 5 show The CCCV limitations in fast charging;

[0107] Figures illustrating the present disclosure:

[0108] FIG. 6 illustrates typical voltage and current profiles during VSIP charge and CC discharge cycles;

[0109] FIG. 7 illustrates typical voltage and current profiles during VSIP charge and CC discharge (here full charge time is 26 min);

[0110] FIG. 8 illustrates typical voltage and current profiles during VSIP charge;

[0111] FIG. 9 illustrates typical voltage profile during MVSC with a plurality of voltage stages Vj (here total charge time is about 35 min);

[0112] FIG. 10 illustrates detailed voltage and current profiles during VSIP charge showing voltage and current intermittency;

[0113] FIG. 11 illustrates detailed voltage and current profiles during VSIP charge showing rest time;

[0114] FIG. 12 illustrates Voltage and current profiles during rest time showing a voltage drop;

[0115] FIG. 13 shows current profile at stage j;

[0116] FIG. 14 shows current profile at sub-step j,p;

[0117] FIG. 15 shows Typical DV(j)=Vj+1˜Vj vs. Time profile during VSIP charging in ˜17 min over many cycles;

[0118] FIG. 16 shows voltage and gained capacity during VSIP charge in 26 mn;

[0119] FIG. 17 shows discharge profile of 12 Ah cell after VSIP charge in 26 mn;

[0120] FIG. 18 illustrates linear voltammetry vs VSIP;

[0121] FIG. 19 illustrates two successive VSIP charge profiles can be different from each other;

[0122] FIG. 20 illustrates VSIP charge voltage and current profiles (60 min);

[0123] FIG. 21 illustrates VSIP charge voltage and current profiles (45 min);

[0124] FIG. 22 illustrates VSIP charge voltage and current profiles (30 min);

[0125] FIG. 23 illustrates VSIP charge voltage and current profiles (20 min);

[0126] FIG. 24 illustrates 80% partial charge with VSIP in ˜16 min;

[0127] FIG. 25 shows Temperature profile during VSIP charge in 30 min: Stress test for LIB quality control (QC);

[0128] FIG. 26 shows Temperature profile during VPC in 20 min of a good quality cell;

[0129] FIG. 27 shows VSIP enhances cell's capacity;

[0130] FIGS. 28 and 29 show VSIP applies to multi-cell systems Cells in parallel;

[0131] FIGS. 30 and 31 show VSIP applies to multi-cell systems Cells in series;

[0132] FIG. 32 illustrates a Cycle performance index;

[0133] FIG. 33 is a VSIP flow diagram: Bayesian optimization;

[0134] FIG. 34 is a schematic diagram of a fast-charge system implementing the method for increasing the discharge capacity of the present disclosure;

[0135] FIG. 35 shows a NLV augmented batteries C-rate profile vs time;

[0136] FIG. 36 shows an augmented battery V profile vs time;

[0137] FIG. 37 shows an augmented discharge profile vs time;

[0138] FIG. 38 shows an augmented battery T profile vs time;

[0139] FIG. 39 shows a NLV augmented cell capacity vs the number of cycles;

[0140] FIG. 40 shows 4 cells-in-series voltage profiles measured during a NLV charge in about 30 min.

DETAILED DESCRIPTION

[0141] For programming a controller implementing the fast-charging method according to the present disclosure, with an artificial intelligence (AI)-based approach, a list of duty criteria is proposed: [0142] Fixing the charging time t.sub.ch [0143] Reaching the target capacity in t.sub.ch [0144] Keeping temperature under control (<60° C.) [0145] Achieving the target cycle number [0146] Insuring battery safety [0147] Enhancing capacity

[0148] The variables in the fast-charging method according to the present disclosure are: [0149] The VSIP governing equation A=ΔV/Δt=f(i, V, Δi/Δt, T, SOC, SOH) [0150] The charge current limits [0151] The current trigger for next voltage step [0152] The rest time [0153] The temperature limit [0154] The voltage limit [0155] The target capacity limit

[0156] A Bayesian optimization is used to adjust the Non Linear Voltammetry (NLV) variables.

[0157] The NLV variables are adjusted at each cycle to meet the criteria:

[00002]$A=\frac{\Delta V}{\Delta t}=f\left(i,V,\frac{\Delta i}{\Delta t},T,\mathrm{SOC},\mathrm{SOH}\right)$

[0158] With reference to FIGS. 6 and 7, in a first embodiment, the fast charging (VSIP) method according to the present disclosure is implemented during charge sequences within VSIP charge, CC discharge cycles. In these profiles, the C-rate is representative of the current in the battery cell.

[0159] As shown in FIGS. 8 and 9, a VSIP charge sequence, which has a duration of about 26 min, includes a number of increasing voltage stages, each voltage stage V.sub.1, . . . , V.sub.j,V.sub.j+1, . . . V.sub.k including constant voltage plateau.

[0160] A shown in FIGS. 10 and 11, during each voltage plateau in a VSIP charging sequence, the voltage profile is constant and decreases to a low constant voltage between two successive plateaus, while the C-rate profile includes a decrease during each plateau and decreases to zero during the rest period between two plateaus.

[0161] During a rest time, as illustrated by FIG. 12 showing detailed current and voltage profile, the voltage can be controlled so that ΔV/Δt has a constant negative value calculated as above described.

[0162] As shown in FIG. 13, a voltage stage j includes current impulsions 1,2,3, . . . n.sub.j in response to voltage plateaus applied to the terminal of a battery cell.

[0163] During a voltage plateau V.sub.j, the current at sub-step j,p decreases from I.sub.j,p.sup.ini to I.sub.j,p.sup.fin shown in FIG. 15.

[0164] For a large number of charging cycles operated with the fast-charging method according to the present disclosure, the voltage variations ΔV experienced between the successive voltage plateau within successive voltage stages V.sub.j, V.sub.j+1 globally decrease with time, as shown in FIG. 15.

[0165] During a voltage charge VSIP sequence lasting 26 min full charge time as shown in FIG. 16, the charge capacity Q.sub.ch continuously increases while the corresponding voltage profile includes successive voltage stages each comprising voltage plateau with rest times. As shown in FIG. 17, during a following discharge sequence, the discharge capacity Q.sub.dis decreases with the voltage applied to the terminals of the battery cell.

[0166] The VSIP fast charging method according to the present disclosure clearly differs from a conventional Linear Voltammetry (LV) method, with respective distinct voltage and current profiles shown in FIG. 18. The respective current and voltage profiles can differ from a charge/discharge VSIP cycle to another, as shown in FIG. 19.

[0167] The variability of voltage and current profiles is also observed when the charge time is modified, for example, from 60 min, 45 min, 30 min to 20 min, with reference to respective FIGS. 20-23. For a 60 min charge time, the charge sequence includes 4 voltage stages (FIG. 20), and for a 45 min charge time the charge sequence includes 8 voltage stages (FIG. 21). For a 30 min charge time, the charge sequence includes 10 voltage stages (FIG. 22) and for a 20 min charge time, the charge sequence includes 4 voltage stages (FIG. 23).

[0168] As shown in FIG. 24, the VSIP charging method according to the present disclosure allows 80% partial charge of a Lithium-Ion battery cell in about 16 min.

[0169] With reference to FIG. 25, during a VSIP charge in 30 min, cells A, B and D had temperature raising above the safety limit of 50° C. These battery cells didn't pass the VSIP stress test. Only cell C passed the stress test. It means that all LIB cells can't be fast charged.

[0170] Thus, the VSIP charging method according to the present disclosure can also be used as stress quality control (QC) test before using a cell in a system for fast charging.

[0171] With reference to FIG. 26, during a charge sequence of an excellent quality LIB cell, the full charge is reached in about 20 min and the temperature of the cell does not exceed 32° C.

[0172] With reference to FIG. 27, by adjusting the VSIP parameters such as the upper voltage limit, the step time, ΔV and ΔI/Δt for the voltage step transition, the discharge capacity can be improved without compromising safety and life span.

[0173] The VSIP charging method according to the present disclosure can be implemented for charging 4 LIB cells assembled in parallel in about 35 min, as shown in FIG. 28, with a CC discharge, and in FIG. 29, which is a detailed view of the voltage and current profiles during the VSIP charge sequence of FIG. 28.

[0174] With reference to FIGS. 30 and 31, the VSIP charging method according to the present disclosure can also be applied for charging 4 e-cig cells in series, in about 35 min.

[0175] As shown in FIG. 40, the profiles of the voltages V1, V2, V3 and V4, corresponding to 4 cells connected in series and measured during a NLV charge in about 30 min, are very close to each other, which avoids cell balancing.

[0176] Note that in this configuration, the charging method is particularly advantageous, compared to CCCV, as it no longer requires a time-consuming and energy using active cell balancing.

[0177] As shown in FIG. 32, the charge and discharge capacity varies as a function of the number of cycles, A fast charge cycle performance index Φ can be calculated as:

[00003]$\Phi =\underset{i=1}{\overset{n}{.Math.}}\frac{Q_{disch}^i/Q_{nom}}{t_i}$ [0178] with [0179] Φ=normalized cycle performance index [0180] i=cycle number [0181] t.sub.i=charge time @ i.sup.th cycle (hr) [0182] Q.sub.disch.sup.i discharge capacity @ i.sup.th cycle (Ah) [0183] Q.sub.nom=nominal capacity (Ah)

[0184] With reference to FIGS. 33 and 34, an example of an augmented-battery fast-charging system, along with the implemented VSIP charging method, is now described. This augmented-battery fast-charging system 30 includes a VSIP charge system 10 comprising a power electronics converter 11 designed for processing electric energy provided by an external energy source E and supplying a variable voltage V(t) to a battery cell B to be charged. Note that this battery cell B can be replaced by a system of battery cells connected in series and/or in parallel.

[0185] The VSIP system 10 further includes a VSIP controller 1 designed for receiving and processing: [0186] measurement data provided by a current sensor 13 placed in the current circuit between the power electronics converter 11 and the battery cell B, and by a temperature sensor 12 placed on or in the battery cell B, [0187] instruction data collected from a user interface, including inputs such as an expected C-Rate, a charge voltage instruction and a charge time instruction.

[0188] The user interface 6 is designed to receive as inputs, information on a rated capacity value for the battery cell B and a target capacity value, and a “extra charge” signal from a physical or virtual button 32.

[0189] The VSIP controller 1 is further designed to control power electronics components within the converter 11 so as to generate a charge voltage profile according to the VSIP method until at least of one the termination criteria for ending 9 the charging process are met.

[0190] The augmented-battery fast-charge method implements a VSIP method 100 receiving inputs data including the rated-capacity value 20 and the target-capacity value 21.

[0191] These VSIP termination criteria 5 include: [0192] minimum C-Rate cut-off, [0193] safety voltage exceeded, [0194] charge capacity reached, and [0195] over temperature.

[0196] From inputs “C-Rate,” “Voltage” and “elapsed charge Time,” which can be entered as instructions 6 by an user, the VSIP controller 1 first determines an initial K value and a charge step.

[0197] Provided that no charge termination criterion is met and a predetermined threshold for C-Rate is not reached, the VSIP controller 1 launches a charge sequence 2 by applying voltage for a charge step duration and C-Rate—which is an image of the current flowing into the battery cell—is measured.

[0198] When current reaches a pre-set C-rate value, the VSIP controller 1 commutes to a rest period 3 during which no voltage is applied to the battery cell. The duration of this rest period depends on the measured C-Rate before current decreasing.

[0199] If the C shift reaches the determined threshold 8, the VSIP controller 1 calculates a shift voltage 4 required to maintain a sufficient charge of the battery cell. This calculation is based on the NLV equation using K-value and ΔC-rate. The calculated shift voltage is then applied for applying a new voltage stage to the battery cell.

[0200] A step 22 for determining or estimating the discharge capacity is proceeded at the end of each VSIP charge cycle. The value of the discharge capacity is then compared (step 23) to the target capacity. As long as the discharge capacity has not reached the target capacity, a new VSIP charge cycle is proceeded. When the target capacity is reached, the augmented-battery charge method (step 24) of the present disclosure is ended.

[0201] With reference to FIGS. 35 to 39, A commercial LIB designed for Electric Vehicle (EV) application was charged in 20 minutes with NLV from 0 to 100% SOC and discharged at 1C-rate to 2.7V.

[0202] The cell was then charged with NLV with target capacity 7%, 10%, 13% and 27% higher than its initial rated capacity.

[0203] Cell was discharged at same 1C-rate to 2.7V, the discharge capacity was then determined.

TABLE-US-00001 TABLE 1 NLV Test Data during augmented capacity tests Q aug. rate Max C-rate Max C-rate V max T max (%) vs. initial Q vs. target Q (V) (° C.) 0 3.57 3.77 4.40 36.9 7 3.76 3.76 4.45 38.2 10 3.84 3.74 4.48 39 13 3.97 3.77 4.60 41.4 27 4.47 3.77 4.79 46

[0204] During NLV charge, the C-rate, Voltage and Temperature profiles varied according to the target capacity, as shown in Table 1.

[0205] In all NLV tests the discharge capacity was identical to the target capacity.

[0206] During NLV charge tests temperature remained below 50 C.

[0207] The maximum C-rate during charge with NLV is almost constant vs. target capacity.

[0208] Up to 27% capacity augmentation was achieved with NLV charging with the same battery cell without modifying its composition.

[0209] Of course, the present disclosure is not limited to the above-described examples and other embodiments can be considered without departing from the scope of the present disclosure.