AN ADC CIRCUIT BASED SIGNAL DIGITIZATION DEVICE AND METHOD THEREOF

Abstract

Provided is an ADC circuit based signal digitalization method, including: inputting the analog signal to the ADC circuit, and after being converted by the ADC circuit for the first time, outputting a first ADC output value M.sub.i; adjusting the least significant bit of the ADC circuit based on the value of the higher bits of the output value M.sub.i, turning down the least significant bit of the ADC circuit, when all the values of the higher bits of the output value M.sub.i are 0; inputting the analog signal to the ADC circuit again, and then outputting the ADC output value M.sub.i+1 for the i+1 time; outputting the final signal conversion result and the adjusted least significant bit based on all the ADC output values. The present invention could improve the ADC precision of small signals without increasing the ADC circuit size.

Claims

1. An ADC circuit based signal digitalization method, comprising: S1, inputting the analog signal to the ADC circuit, after being converted by the ADC circuit for the first time, outputting a first ADC output value M.sub.i, i=1; S2, adjusting the least significant bit of the ADC circuit based on the value of the higher bits of the output value M.sub.i, turning down the least significant bit of the ADC circuit, when all the values of the higher bits of the output value M.sub.i are 0; inputting the analog signal to the ADC circuit one more time, and then outputting the ADC output value M.sub.i+1 for the i+1 time; S3, judging the precision of the output value M.sub.i+1 and the values of the higher bits of the output value M.sub.i, when the precision of the output value M.sub.i+1 meets the output requirement, or the value of the most significant bit of the output value M.sub.i is 1, turning to step S4, otherwise, making i=i+1 and turning to step S2; S4, outputting the final signal conversion result and the adjusted least significant bit based on all the ADC output values.

2. The ADC circuit based signal digitalization method of claim 1, wherein the step of adjusting the least significant bit of the ADC circuit based on the value of the higher bits of the output value M.sub.i in step S2 comprises: S21, making the ADC circuit comprise n+1 bits, outputting the first ADC output value M.sub.i, after the analog signal being converted by the ADC circuit; the output value M.sub.i includes n+1 bits from high to low, which are defined as D.sub.i,n, D.sub.i,n−1, . . . , D.sub.i,1, D.sub.i,0; S22, analyzing the values of the bits of the output value M.sub.i, when the values of D.sub.i,n, D.sub.i,n−1, . . . , D.sub.i,x, are all 0, making the least significant bit of the ADC circuit LSB.sub.i decrease to LSB.sub.i+1=LSB.sub.i/y, in which 0<y<=(n+1)/(x+1), x is a positive integer greater than 0 and less than n.

3. The ADC circuit based signal digitalization method of claim 2, wherein when x is a fixed value specified externally, determining whether to adjust the least significant bit of the ADC circuit by judging whether the sum of the higher n-x bits of the output value M.sub.i is equal to 1, and only outputting the final signal conversion result.

4. The ADC circuit based signal digitalization method of claim 1, wherein the signal digitalization method comprises: setting a corresponding maximum conversion time based on the correlation properties in different application scenarios; calculating the maximum conversion times i.sub.max for the ADC circuit based on the maximum conversion time, in which i≤i.sub.max, and the correlation properties include the signal amplitude change value, signal output precision requirements and real-time requirements.

5. The ADC circuit based signal digitalization method of claim 1, wherein in step S4, combining all ADC output values to weight and average to obtain the final signal conversion result.

6. An ADC circuit based signal digitalization device, comprising: a conversion and control module used to input the analog signal to the ADC circuit, and judge the precision of the output value of the ADC circuit, and then determine whether to input the analog signal to the ADC circuit for the next conversion, comprising an output terminal connected to the input terminal of the ADC circuit, and an input terminal connected to the output terminal of the ADC circuit; an ADC circuit used to convert the analog signal input by the conversion and control module into the corresponding digital signal, including n+1 bits; a module for adjusting the least significant bit used to adjust the least significant bit of the ADC circuit based on the value of the higher bits of the ADC circuit output value, and turn down the least significant bit when all the values of the higher bits of the output value are 0, comprising an input terminal connected to the output terminal of the ADC circuit, and an output terminal connected to the control terminal of the ADC circuit; an output value statistics module used to store all the ADC circuit output values corresponding to the analog signal; and configured to connect to the input terminal of the ADC circuit; an output module used to transfer all output values stored in the output value statistics module to output the final signal conversion result and the adjusted least significant bit.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

[0029] FIG. 1 is a flow chart of the ADC circuit based signal digitalization method according to an embodiment of the present invention.

[0030] FIG. 2 is an output principle diagram of the ADC circuit of the prior art.

[0031] FIG. 3 is a principle diagram of the two-time signal digitalization in an embodiment of the present invention.

[0032] FIG. 4 is a schematic diagram of how to improve the precision of the ADC circuit-based signal digitization method in an embodiment of the present invention; FIG. 4(a) is a schematic diagram of how a n+1 bits ADC circuit achieving higher precision for small signals, FIG. 4(b) is a schematic diagram of how a 8 bits ADC circuit achieving higher precision (of 9 bits) for small signals, when n=7, x=3.

DETAILED DESCRIPTION OF THE INVENTION

[0033] The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, but not all the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by a person of ordinary skill in the art without creative efforts shall fall within the protection scope of the present invention.

[0034] In the description of the present invention, it should be noted that the orientation or position relationships indicated by the terms “center, higher, lower, left, right, vertical, horizontal, inside and outside” are based on the orientation or position relationships shown in the drawings, and are only for it is convenient to describe the present invention and simplify the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operate in a specific orientation, and therefore cannot be understood as limitation on the present invention. In addition, the terms “first”, “second” and “third” are used for descriptive purpose only and cannot be understood as indicating or implying relative importance.

[0035] In the description of the present invention, it should be noted that the terms “installation”, “connected with”, and “connected to” should be understood in a broad sense unless explicitly stated and limited otherwise. For example, they may be “fixed connected” or “removable connected”, or “integratedly connected”; they may be “mechanically connected”, or “electronically connected”, or “directly connected”, or “indirectedly connected through an intermediated medium”, or “internal connection of two elements or the interaction of two elements relationships”. For those of ordinary skill in the art, the specific meanings of the above terms in the present invention can be understood according to specific situations. Furthermore, the technical features mentioned in the different embodiments of the invention described below may be combined with each other as long as they do not conflict with each other.

[0036] FIG. 1 is the flow chart of the ADC circuit based signal digitalization method according to an embodiment of the present invention. As shown in FIG. 1, the method comprises: [0037] S1. inputting the analog signal to the ADC circuit, and after being converted by the ADC circuit for the first time, outputting a first ADC output value M.sub.i=1; [0038] S2. adjusting the least significant bit of the ADC circuit based on the value of the higher bits of the output value M.sub.i, turning down the least significant bit of the ADC circuit, when all the values of the higher bits of the output value M.sub.i are 0; inputting the analog signal to the ADC circuit again, and then outputting the ADC output value M.sub.i+1 for the i+1 time; [0039] S3. judging the precision of the output value M.sub.i+1 and the value of the higher bits of the output value M.sub.i, when the precision of the output value M.sub.i+1 meets the output requirement, or the value of the most significant bit of the output value M.sub.i is 1, turning to step S4, otherwise, making i=i+1 and turning to step S2; [0040] S4. outputting the final signal conversion result and the adjusted least significant bit based on all the ADC output values. In the present embodiment, the ADC circuit could be integrated in the chip, or connected to the chip externally. As shown in FIG. 4(a), ADC's LSB (least significant bit) is controlled by the higher bits (Dn˜Dx), x is a positive integer greater than 0 and less than n, when one value of the higher bits (Dn˜Dx) is high, the LSB remains constant; when all the values of the higher bits (Dn˜Dx) are low, LBS becomes LSB/Y, that is to decrease LSB, and to improve the ADC precision.

[0041] Accordingly, the process for adjusting the significant least bit of the ADC circuit based on the value of the higher bits of the output value M.sub.I in step S2 includes: [0042] S21, making the ADC circuit comprise n+1 bits, outputting the first ADC output value M.sub.I, after the analog signal being converted by the ADC circuit; the output value M.sub.I includes n+1 bits from high to low, which are defined as D.sub.I,n, D.sub.I,n−1, . . . , D.sub.I,1, D.sub.I,0; [0043] S22. Analyzing the values of the bits of the output value M.sub.I, when all the values of D.sub.I,n, D.sub.I,n−1, . . . , D.sub.I,X are 0, making the least significant bit of the ADC circuit LSB decrease to LSB.sub.i+1=LSB.sub.i/y, in which 0<y<=(n+1)/(x+1), x is a positive integer greater than 0 and less than n.

[0044] As shown in FIG. 3, after the first ADC conversion, the ADC output value is M, and the ADC precision is n+1; if one value of the higher bits (Dn˜Dx) of M is high, then ADC's LSB would remain constant, and then the second ADC conversion would be performed, the second ADC output value would still be M, and the ADC precision would still be n+1. If all the values of the higher bits (Dn˜Dx) of M are 0, then the LSB would decrease to LSB/Y, and then the second ADC conversion would be performed, the second conversion output value is N (the value of N is closer to the real input value of the ADC, approximately equal to the value of M/Y, but the precision is higher than M). Therefore, after two conversions, especially when all values of the higher bits (Dn˜Dx) are zero, the ADC LSB decreases, the ADC precision of the small signal is improved.

[0045] There are many ways to change the LSB of an ADC, because the LSB could be a current, a voltage, or a resistance, etc. For example, if the quantization comparator of an ADC is a voltage comparator, the LSB of an ADC is the product of the current and resistance: I.sub.LSB*R, or I*R.sub.LSB, the LSB/y could be achieved through reducing the current I.sub.LSB by a factor of y, or the resistance R.sub.LSB by a factor of y.

[0046] Preferably, y is a positive integer to facilitate subsequent data processing. Take n=7 or 8 bits ADC for example, assuming that x=3, LSB.sub.i+1=LSB.sub.i/y; y<=(n+1)/(x+1), y could be 2; and once again, assuming that x=1, y could be 4, 3, 2. Assuming that x=0, y could be 8, 7, 6, 5, 4, 3, 2. Y doesn't have to be 1, if y is 1, the LSB is unchanged.

[0047] In the present embodiment, the value of x could be specified by an external circuit or adaptively adjusted based on the amplitude of the input signal, depending on the specific application scenario. For example, in a certain application scenario, where the signal amplitude does not change much or a higher precision of the small signal is required, two or more ADC conversions would be performed by specifying a fixed value; or, for another application scenario, where the signal amplitude varies dramatically, and meanwhile, the higher precision of the small signal is required, the value of x could be adjusted adaptively according to the amplitude of the signal. As shown in FIG. 4(b), taking n=7 and x=3 as an example, the precision of a 9 bits ADC could be achieved with an 8 bits ADC due to reduced LSB.

[0048] Similarly, for small signals, the more it converts, the higher the accuracy of output value is, thus the conversion times could also be adjusted adaptively according to the characteristics of the aforementioned application scenarios. It could be determined whether to perform the ADC operation one more time by analyzing the higher bits of the output value after each conversion.

[0049] Since it would take more time to perform multiple ADC conversions, the real-time requirements of signal output also need to be considered in specific scenarios. In this case, the maximum conversion time for different application scenarios could be set. According to the maximum conversion time, the maximum ADC conversion times i.sub.max could be calculated to make the final conversion times I not exceed the maximum conversion times i.sub.max, that is 1≤i.sub.max.

[0050] Preferably, when the x is a fixed value specified externally, determining whether to adjust the least significant bit of the ADC circuit by judging whether the sum of the higher n-x bits of the output value M.sub.I is equal to 1, and only output the final signal conversion result.

[0051] In step S4, combining all the ADC output values to weight and average to obtain the final signal conversion result, wherein for the large signal that cannot reduce LSB, the precision of output signal could still be improved by two conversions; for the small signal that can reduce LSB, the final signal conversion result could be obtained by averaging the ADC output values directly; since the output value of the adjusted LSB has higher precision, the final signal conversion result could also be obtained by weighting and averaging the ADC output values, and the weight value could be continuously increased based on the conversion times. The present embodiment also provided an ADC based signal digitalization device for the aforementioned signal digitalization method. The signal digitalization device comprises: [0052] a conversion and control module used to Input the analog signal to the ADC circuit, and judge the precision of the output value of the ADC circuit, and then determine whether to input the analog signal to the ADC circuit for the next conversion, comprising an output terminal connected to the input terminal of the ADC circuit, and an input terminal connected to the output terminal of the ADC circuit; [0053] an ADC circuit used to convert the analog signal Input by the conversion and control module into the corresponding digital signal, including n+1 bits; [0054] a module for adjusting the least significant bit used to adjust the least significant bit of the ADC circuit based on the value of the higher bits of the ADC circuit output value, and turn down the least significant bit when all the values of the higher bits of the output value are 0, comprising an input terminal connected to the output terminal of the ADC circuit, and an output terminal connected to the control terminal of the ADC circuit; [0055] an output value statistics module used to store all the ADC circuit output values corresponding to the analog signal; and configured to connect to the input terminal of the ADC circuit; [0056] an output module used to transfer all output values stored in the output value statistics module to output the final signal conversion result and the adjusted least significant bit.

[0057] The technical features of the foregoing embodiments may be combined arbitrarily. For the sake of brevity, all possible combinations of the technical features of the foregoing embodiments are not described. However, as long as there is no contradiction in the combinations of these technical features, all shall be considered to be within the scope of this specification.

[0058] The foregoing description has been made on several embodiments of this invention which are relatively specific and detailed, however the invention is not limited thereto. It should be further understood by those skilled in the art that various changes and modifications may be made without departing from the spirit of the invention are protected by this invention. Therefore, the scope of protection for this invention shall be subject to the appended claims.