CHIP PACKAGE AND MANUFACTURING METHOD THEREOF

Abstract

A chip package includes a carrier board, a chip, a light transmissive sheet, a supporting element, and a molding material. The chip is located on the carrier board and has a sensing area. The light transmissive sheet is located above the supporting element and covers the sensing area of the chip. The supporting element is located between the light transmissive sheet and the chip, and surrounds the sensing area of the chip. The molding material is located on the carrier board and surrounds the chip and the light transmissive sheet. A top surface of the molding material is lower than a top surface of the light transmissive sheet.

Claims

1. A chip package, comprising: a carrier board; a chip located on the carrier board and having a sensing area; a light transmissive sheet covering the sensing area of the chip; a supporting element located between the light transmissive sheet and the chip and surrounding the sensing area of the chip, wherein the light transmissive sheet is located above the supporting element; and a molding material located on the carrier board and surrounding the chip and the light transmissive sheet, wherein a top surface of the molding material is lower than a top surface of the light transmissive sheet.

2. The chip package of claim 1, wherein a top of an edge of the molding material is lower than a position of half a thickness of the light transmissive sheet.

3. The chip package of claim 1, wherein a thickness of the light transmissive sheet is in a range from 50 μm to 1000 μm, and a thickness of the supporting element is in a range from 40 μm to 250 μm.

4. The chip package of claim 1, wherein a sidewall of a top portion of the light transmissive sheet has a protruding portion extending in a horizontal direction, and the molding material extends to a bottom surface of the protruding portion.

5. The chip package of claim 1, wherein a corner of a top portion of the chip has a concave portion, and the molding material extends to the concave portion.

6. The chip package of claim 1, wherein an outer sidewall of the supporting element is recessed in a sidewall of the light transmissive sheet.

7. The chip package of claim 1, wherein an outer sidewall of the supporting element is aligned with a sidewall of the light transmissive sheet in a vertical direction.

8. The chip package of claim 1, wherein a top portion of an outer sidewall of the supporting element is aligned with a sidewall of the light transmissive sheet in a vertical direction, and a bottom portion of the outer sidewall of the supporting element protrudes from the sidewall of the light transmissive sheet.

9. The chip package of claim 1, wherein an entire outer sidewall of the supporting element protrudes from a sidewall of the light transmissive sheet.

10. The chip package of claim 1, wherein the carrier board has a conductive pad, the chip has a contact electrically connected to the conductive pad of the carrier board by a conductive wire, and the conductive wire is located in the molding material.

11. A manufacturing method of a chip package, comprising: forming a supporting element having a grip shape on a light transmissive sheet; forming a temporary bonding layer covering the light transmissive sheet; cutting the light transmissive sheet and the supporting element along the supporting element to form a plurality of trenches; bonding the supporting element to a wafer such that the supporting element is located between the light transmissive sheet and the wafer and surrounds a plurality of sensing areas of the wafer; removing the temporary bonding layer; cutting the wafer along the trenches to form a plurality of chips; bonding one of the chips on a carrier board; and forming a molding material on the carrier board, wherein the molding material surrounds said chip on the carrier board and the light transmissive sheet, and a top surface of the molding material is lower than a top surface of the light transmissive sheet.

12. The manufacturing method of the chip package of claim 11, wherein forming the molding material on the carrier board is performed such that a top of an edge of the molding material is lower than a position of half a thickness of the light transmissive sheet.

13. The manufacturing method of the chip package of claim 11, further comprising: flipping a combination of the light transmissive sheet, the supporting element, and the temporary bonding layer after the trenches is formed and before the supporting element is bonded to the wafer, such that the temporary bonding layer is above the light transmissive sheet, and the supporting element is below the light transmissive sheet.

14. The manufacturing method of the chip package of claim 11, wherein cutting the light transmissive sheet and the supporting element along the supporting element comprises: cutting, by a first cutting tool, a portion of the light transmissive sheet; and cutting, by a second cutting tool, another portion of the light transmissive sheet and the supporting element, wherein a width of the second cutting tool is greater than a width of the first cutting tool, such that a sidewall of the light transmissive sheet has a protruding portion extending in a horizontal direction.

15. The manufacturing method of the chip package of claim 14, wherein forming the molding material on the carrier board is performed such that the molding material extends to a bottom surface of the protruding portion.

16. The manufacturing method of the chip package of claim 11, wherein cutting the wafer along the trenches to form the chips comprises: cutting, by a first cutting tool, a top portion of the wafer; and cutting, by a second cutting tool, a bottom portion of the wafer, wherein a width of the second cutting tool is less than a width of the first cutting tool, such that a corner of a top portion of each of the chips has a concave portion.

17. The manufacturing method of the chip package of claim 11, wherein cutting the light transmissive sheet and the supporting element along the supporting element comprises: cutting, by a first cutting tool, the light transmissive sheet; and cutting, by a second cutting tool, the supporting element, wherein a width of the second cutting tool is greater than a width of the first cutting tool, such that an outer sidewall of the supporting element is recessed in a sidewall of the light transmissive sheet.

18. The manufacturing method of the chip package of claim 11, wherein cutting the light transmissive sheet and the supporting element along the supporting element comprises: cutting, by a first cutting tool, the light transmissive sheet and a portion of the supporting element; and cutting, by a second cutting tool, another portion of the supporting element, wherein a width of the second cutting tool is less than a width of the first cutting tool, such that a top portion of an outer sidewall of the supporting element is aligned with a sidewall of the light transmissive sheet in a vertical direction, and a bottom portion of the outer sidewall of the supporting element protrudes from the sidewall of the light transmissive sheet.

19. The manufacturing method of the chip package of claim 11, wherein cutting the light transmissive sheet and the supporting element along the supporting element comprises: cutting, by a first cutting tool, the light transmissive sheet; and cutting, by a second cutting tool, the supporting element, wherein a width of the second cutting tool is less than a width of the first cutting tool, such that an entire outer sidewall of the supporting element protrudes from a sidewall of the light transmissive sheet.

20. The manufacturing method of the chip package of claim 11, further comprising: after bonding one of the chips on the carrier board, electrically connecting a conductive wire to a contact of the chip on the carrier board and a conductive pad of the carrier board by wire bonding, wherein after the molding material is formed on the carrier board, the conductive wire is located in the molding material.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

[0028] Aspects of the present disclosure are best understood from the following detailed description when read with the accompanying figures. It is noted that, in accordance with the standard practice in the industry, various features are not drawn to scale. In fact, the dimensions of the various features may be arbitrarily increased or reduced for clarity of discussion.

[0029] FIG. 1 is a cross-sectional view of a chip package according to one embodiment of the present disclosure.

[0030] FIGS. 2 to 6 are cross-sectional views at intermediate stages of a manufacturing method of the chip package of FIG. 1.

[0031] FIG. 7 is a cross-sectional view of a chip package according to one embodiment of the present disclosure.

[0032] FIG. 8 is a cross-sectional view of a chip package according to one embodiment of the present disclosure.

[0033] FIG. 9 is a cross-sectional view of a chip package according to one embodiment of the present disclosure.

[0034] FIG. 10 is a cross-sectional view of a chip package according to one embodiment of the present disclosure.

[0035] FIG. 11 is a cross-sectional view of a chip package according to one embodiment of the present disclosure.

DETAILED DESCRIPTION

[0036] The following disclosure provides many different embodiments, or examples, for implementing different features of the provided subject matter. Specific examples of components and arrangements are described below to simplify the present disclosure. These are, of course, merely examples and are not intended to be limiting. In addition, the present disclosure may repeat reference numerals and/or letters in the various examples. This repetition is for the purpose of simplicity and clarity and does not in itself dictate a relationship between the various embodiments and/or configurations discussed.

[0037] Further, spatially relative terms, such as “beneath,” “below,” “lower,” “above,” “upper” and the like, may be used herein for ease of description to describe one element or feature's relationship to another element(s) or feature(s) as illustrated in the figures. The spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. The apparatus may be otherwise oriented (rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein may likewise be interpreted accordingly.

[0038] FIG. 1 is a cross-sectional view of a chip package 100 according to one embodiment of the present disclosure. The chip package 100 includes a carrier board 110, a chip 120, a light transmissive sheet 130, a supporting element 140, and a molding material 150. The chip 120 is located on the carrier board 110 and has a sensing area 122. The light transmissive sheet 130 is located above the supporting element 140 and covers the sensing area 122 of the chip 120. Light may pass through the light transmissive sheet 130, and the light transmissive sheet 130 can protect the sensing area 122. The supporting element 140 is located between the light transmissive sheet 130 and the chip 120, and surrounds the sensing area 122 of the chip 120. The molding material 150 is located on the carrier board 110 and surrounds the chip 120 and the light transmissive sheet 130, in which a top surface 152 of the molding material 150 is lower than a top surface 132 of the light transmissive sheet 130. The molding material 150 may be in direct contact with a sidewall 121 of the chip 120, an outer sidewall 141 of the supporting element 140, and a sidewall 131 of the light transmissive sheet 130.

[0039] In this embodiment, the chip 120 may be an image sensor, such as a complementary metal-oxide semiconductor (CMOS), and the sensing area 122 may be an image sensing area. The material of the light transmissive sheet 130 may be glass, and the material of the supporting element 140 may be epoxy, but the present disclosure is not limited in this regard. The carrier board 110 may have conductive pads 112 and 116, a circuit 114, and a conductive structure 118. The circuit 114 may be electrically connected to the conductive pads 112 and 116. The conductive pad 112 is configured to electrically connect to the chip 120. The conductive structure 118 is electrically connected to the conductive pad 116, and is configured to electrically connect to another electronic component (e.g., a system PCB).

[0040] Specifically, since the amount of the molding material 150 has been specially designed, the top surface 152 of the molding material 150 can be lower than the top surface 132 of the light transmissive sheet 130 after the molding material 150 is formed on the carrier board 110. Compared with a tradition configuration, the height of the top surface 152 of the molding material 150 is reduced by 20% to 50%. Such a configuration can electively reduce the influence of the mismatch of the coefficient of thermal expansion (CTE) between the light transmissive sheet 130 and the molding material 150, thereby preventing the light transmissive sheet 130 from cracking due to temperature during manufacturing processes.

[0041] In some embodiments, the top of an edge 151 of the molding material 150 is lower than the position of half a thickness H of the light transmissive sheet 130 (i.e., lower than the position of a dotted line L). The thickness H of the light transmissive sheet 130 may be in a range from 50 μm to 1000 μm. A thickness h of the supporting element 140 is in a range from 40 μm to 250 μm. The outer sidewall 141 of the supporting element 140 is aligned with the sidewall 131 of the light transmissive sheet 130 in a vertical direction. Moreover, the chip 120 may be bonded to the carrier board 110 by an adhesive layer A, and the chip 120 has a contact 124. The contact 124 can be electrically connected to the conductive pad 112 of the carrier board 110 by a conductive wire W, such as performing a wire bonding process. In addition, the conductive wire W is located in the molding material 150.

[0042] It is to be noted that the connection relationships, the materials, and the advantages of the elements described above will not be repeated in the following description. In the following description, the manufacturing method of the chip package 100 will be explained.

[0043] FIGS. 2 to 6 are cross-sectional views at intermediate stages of the manufacturing method of the chip package 100 of FIG. 1. As shown in FIG. 2, the supporting element 140 having a grip shape is formed on a light transmissive sheet 130a, in which a cutting process is not performed on the light transmissive sheet 130a yet. Thereafter, a temporary bonding layer TB can be formed to cover the light transmissive sheet 130a, such that the light transmissive sheet 130a is located between the temporary bonding layer TB and the supporting element 140. For example, the temporary bonding layer TB is above the supporting element 140, and the light transmissive sheet 130a is below the supporting element 140.

[0044] After the light transmissive sheet 130a is covered by the temporary bonding layer TB, the structure of FIG. 2 can be flipped. Thereafter, as shown in FIG. 3, the light transmissive sheet 130a and the supporting element 140 may be cut along the supporting element 140 to form a plurality of trenches TR. As a result, the light transmissive sheet 130a is cut to form plural light transmissive sheets 130. When the light transmissive sheet 130a and the supporting element 140 are cut at one time with the same cutting tool, the structure of the supporting element 140 and the light transmissive sheet 130 of FIG. 1 can be obtained, and thus the outer sidewall 141 of the supporting element 140 is aligned with the sidewall 131 of the light transmissive sheet 130 in the vertical direction.

[0045] As shown in FIG. 4, after the trenches TR (see FIG. 3) are formed and before the supporting element 140 is bonded to a wafer 120a, the combination of the light transmissive sheet 130, the supporting element 140, and the temporary bonding layer TB can be flipped (i.e., the structure of FIG. 3 is flipped), such that the temporary bonding layer TB is above the light transmissive sheet 130, and the supporting element 140 is below the light transmissive sheet 130. Afterward, the supporting element 140 is bonded to the wafer 120a such that the supporting element 140 is located between the light transmissive sheet 130 and the wafer 120a and surrounds the sensing areas 122 of the wafer 120a. The wafer 120a is a semiconductor structure which is not yet cut.

[0046] As shown in FIG. 5, after the supporting element 140 is bonded to the wafer 120a, the temporary bonding layer TB of FIG. 4 may be removed, and then the wafer 120a below the temporary bonding layer TB of FIG. 4 can be cut along the trenches TR to form the chips 120. After cutting the wafer 120a, plural structures of FIG. 6 can be obtained, while the structure of FIG. 6 is a stacked structure including the chip 120, the supporting element 140, and the light transmissive sheet 130 of FIG. 1.

[0047] As shown in FIG. 6 and FIG. 1, in subsequent steps, the chip 120 may be bonded on the carrier board 110, and the molding material 150 is formed on the carrier board 110, such that the molding material 150 surrounds the chip 120 and the light transmissive sheet 130, and the top surface 152 of the molding material 150 is lower than the top surface 132 of the light transmissive sheet 130. Furthermore, forming the molding material 150 on the carrier board 110 is performed such that the top of the edge 151 of the molding material 150 is lower than the position of half the thickness H of the light transmissive sheet 130 (i.e., lower than the position of the dotted line L). After the chip 120 is bonded to the carrier board 110, the conductive wire W can electrically connect to the contact 124 of the chip 120 and the conductive pad 112 of the carrier board 110 by a wire bonding process. In addition, the conductive wire W is located in the molding material 150 after the molding material 150 is formed on the carrier board 110.

[0048] In the following description, other types of chip packages and manufacturing thereof will be explained.

[0049] FIG. 7 is a cross-sectional view of a chip package 100a according to one embodiment of the present disclosure. The chip package 100a includes the carrier board 110, the chip 120, the light transmissive sheet 130, the supporting element 140, and the molding material 150. The difference between this embodiment and the embodiment of FIG. 1 is that the sidewall 131 of the top portion of the light transmissive sheet 130 of the chip package 100a has a protruding portion 134 extending in a horizontal direction, and the molding material 150 extends to the bottom surface of the protruding portion 134. In the step of cutting the light transmissive sheet 130 and the supporting element 140 along the supporting element 140, a portion (e.g., the top half portion) of the light transmissive sheet 130 may be cut by a first cutting tool, and another portion (e.g., the bottom half portion) of the light transmissive sheet 130 and the supporting element 140, wherein the width of the second cutting tool is greater than the width of the first cutting tool, such that the sidewall 131 of the light transmissive sheet 130 has the protruding portion 134 extending in a horizontal direction. In such a configuration, when the molding material 150 is formed on the carrier board 110, the molding material 150 may extend to the bottom surface of the protruding portion 134 that is capable of limiting the position of the molding material 150.

[0050] FIG. 8 is a cross-sectional view of a chip package 100b according to one embodiment of the present disclosure. The chip package 100b includes the carrier board 110, the chip 120, the light transmissive sheet 130, the supporting element 140, and the molding material 150. The difference between this embodiment and the embodiment of FIG. 1 is that a corner of the top portion of the chip 120 of the chip package 100b has a concave portion 123, and the molding material 150 extends to the concave portion 123. In the step of cutting the wafer 120a along the trenches TR (see FIG. 5) to form the chips 120, the top portion of the wafer 120a may be cut by a first cutting tool, and the bottom portion of the wafer 120a may be cut by a second cutting tool, wherein the width of the second cutting tool is less than the width of the first cutting tool, such that the corner of the top portion of the chip 120 has the concave portion 123.

[0051] FIG. 9 is a cross-sectional view of a chip package 100c according to one embodiment of the present disclosure. The chip package 100c includes the carrier board 110, the chip 120, the light transmissive sheet 130, the supporting element 140, and the molding material 150. The difference between this embodiment and the embodiment of FIG. 1 is that the outer sidewall 141 of the supporting element 140 of the chip package 100c is recessed in the sidewall 131 of the light transmissive sheet 130. In the step of cutting the light transmissive sheet 130 and the supporting element 140 along the supporting element 140, the light transmissive sheet 130 may be cut by a first cutting tool, and the supporting element 140 may be cut by a second cutting tool, wherein the width of the second cutting tool is greater than the width of the first cutting tool, such that the outer sidewall 141 of the supporting element 140 is recessed in the sidewall 131 of the light transmissive sheet 130.

[0052] FIG. 10 is a cross-sectional view of a chip package 100d according to one embodiment of the present disclosure. The chip package 100d includes the carrier board 110, the chip 120, the light transmissive sheet 130, the supporting element 140, and the molding material 150. The difference between this embodiment and the embodiment of FIG. 1 is that the top portion of the outer sidewall 141 of the supporting element 140 of the chip package 100d is aligned with the sidewall 131 of the light transmissive sheet 130 in a vertical direction, and the bottom portion of the outer sidewall 141 of the supporting element 140 protrudes from the sidewall 131 of the light transmissive sheet 130. In the step of cutting the light transmissive sheet 130 and the supporting element 140 along the supporting element 140, the light transmissive sheet 130 and a portion (e.g., the top half portion) of the supporting element 140 may be cut by a first cutting tool, and another portion (e.g., the bottom half portion) of the supporting element 140 may be cut by a second cutting tool, wherein the width of the second cutting tool is less than the width of the first cutting tool, such that the top portion of the outer sidewall 141 of the supporting element 140 is aligned with the sidewall 131 of the light transmissive sheet 130 in a vertical direction, and the bottom portion of the outer sidewall 141 of the supporting element 140 protrudes from the sidewall 131 of the light transmissive sheet 130.

[0053] FIG. 11 is a cross-sectional view of a chip package 100e according to one embodiment of the present disclosure. The chip package 100e includes the carrier board 110, the chip 120, the light transmissive sheet 130, the supporting element 140, and the molding material 150. The difference between this embodiment and the embodiment of FIG. 1 is that the entire outer sidewall 141 of the supporting element 140 of the chip package 100e protrudes from the sidewall 131 of the light transmissive sheet 130. In the step of cutting the light transmissive sheet 130 and the supporting element 140 along the supporting element 140, the light transmissive sheet 130 may be cut by a first cutting tool, and the supporting element 140 may be cut by a second cutting tool, wherein the width of the second cutting tool is less than the width of the first cutting tool, such that the entire outer sidewall 141 of the supporting element 140 protrudes from the sidewall 131 of the light transmissive sheet 130.

[0054] In summary, during the manufacturing method of the chip package, the light transmissive sheet 130 which is not yet cut is covered by the temporary bonding layer TB (see FIG. 2), and then the light transmissive sheet 130 and the supporting element 140 are cut along the supporting element 140, and then the supporting element 140 is bonded to the wafer 120a (see FIG. 4). Therefore, the wafer 120a can be cut along the trenches TR (see FIG. 5) to form the chips 120, thereby realizing wafer-level packaging for bonding the light transmissive sheet 130 to the chips 120. As a result, process time can be saved, and the sensing area 122 (see FIG. 6) of the chip 120 is prevented from being polluted to improve product yield. In a subsequent process, the chip 120 can be bonded to the carrier board 110 (see FIG. 1), and the amount of the molding material 150 (see FIG. 1) can be controlled to form on the carrier board 110 such that the top surface 152 of the molding material 150 is lower than the top surface 132 of the light transmissive sheet 130.

[0055] The foregoing outlines features of several embodiments so that those skilled in the art may better understand the aspects of the present disclosure. Those skilled in the art should appreciate that they may readily use the present disclosure as a basis for designing or modifying other processes and structures for carrying out the same purposes and/or achieving the same advantages of the embodiments introduced herein. Those skilled in the art should also realize that such equivalent constructions do not depart from the spirit and scope of the present disclosure, and that they may make various changes, substitutions, and alterations herein without departing from the spirit and scope of the present disclosure.