OPTICAL SAMPLING SIGNAL HOLDING METHOD FOR PHOTONIC ANALOG-TO-DIGITAL CONVERSION SYSTEM

Abstract

An optical sampling signal holding method for a photonic analog-to-digital conversion system, based on frequency response principles of sampling and holding, controls photoelectric conversion processes after photonic sampling to be equivalent to the signal holding effect in switch sampling, and converts sampled optical pulses into a special holding waveform, directly eliminating the time mismatch between back-end electronic analog-to-digital converters and optical pulses. The photoelectric conversion frequency responses in the invention do not lead to additional expenses on active devices and software, which greatly improves performances of the photonic analog-to-digital conversion system. The method is not limited by the number of channels, and can provide more reliable technical solutions for realizing a photonic analog-to-digital conversion system with high sampling rate in the future.

Claims

1. An optical sampling signal holding method for a photonic analog-to-digital conversion system comprising photodetectors and electronic analog-to-digital converters, comprising controlling frequency responses of photodetectors to selectively retain and filter out high-frequency components of signals generated by optical pulse sampling, folding back the high-frequency components to signal frequency positions when quantified by the electronic analog-to-digital converters of a same rate, and creating a time offset opposite to a time mismatch to counteract time mismatch and to obtain signal outputs without time mismatch.

2. The optical sampling signal holding method according to claim 1, comprising (1) assuming that sampled signals are single-tone signals with a frequency of f.sub.in, sampling the signals by optical pulses with a repetition frequency of F.sub.s, so as to result in a periodic extension in spectrum and generate many high-frequency components other than the original signals; these high-frequency components exist symmetrically with the multiple kF.sub.s of the optical pulse sampling rate as a center, and the frequency is kF.sub.s±f.sub.in, where k is positive integer greater than or equal to 1 and less than or equal to the number of harmonics of an optical sampling clock; (2) controlling frequency responses |H.sub.OE(f)| of the photodetectors, as shown in the following formula: $.Math.H_{\mathrm{OE}}\left(f\right).Math.=\{\begin{array}{cc}1,& \mathrm{if}0\le f\le \frac{1}{2}.Math.F_S\\ 1-\frac{1}{m.Math.F_S}.Math.\left(f-\frac{1}{2}.Math.F_S\right),& \mathrm{if}\frac{1}{2}.Math.F_S\le f\le m.Math.F_S+\frac{1}{2}.Math.F_S\\ 0,& \mathrm{otherwise}\end{array}.$ wherein f is independent variable of the frequency response expression, m is the number of retained high-frequency component pairs and is positive integral greater than or equal to 1; and (3) inputting optical pulses into the photodetectors with controlled frequency response to obtain held electrical signals, and passing the held electrical signals through the electronic analog-to-digital converters to obtain electrical digital signals.

3. The optical sampling signal holding method according to claim 2, wherein m is 1 in the frequency response expression |H.sub.OE(f)|.

4. The optical sampling signal holding method according to claim 2, further comprising adding filters that conform to the frequency responses after the photodetectors.

5. The optical sampling signal holding method according to claim 2, further comprising (4) performing a direct-current removal and data reconstruction and interleaving of the electrical digital signals to obtain quantization results without time mismatch of the original electrical analog signals.

6. The optical sampling signal holding method according to claim 1, wherein the photonic analog-to-digital conversion system comprises an optical sampling clock source, a sampled signal source, a photonic sampling gate, a demultiplexer array and a data integration and processing module; the photodetectors are composed of N PD units in parallel; and the electronic analog-to-digital converters are composed of N electronic analog-to-digital converters in parallel; wherein an output end of the optical sampling clock source is connected to an input end of the photonic sampling gate, an output end of the photonic sampling gate is connected to an input end of the demultiplexer, N output ends of the demultiplexer are connected to input ends of the N PD units, output ends of the N PD units are respectively connected to input ends of the N electronic analog-to-digital converters, and output ends of the electronic analog-to-digital converters are respectively connected to N input ends of the data integration and processing module, wherein, N is an positive integral greater than or equal to 1.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

[0023] FIG. 1 is a diagram showing the overall architecture of one embodiment of the photonic analog-to-digital conversion method of the present invention. Reference numbers refer to the following: 1—light source; 2—sampled signal source; 3—sampling gate; 4—demultiplexer; 5—photodetector array; 6—electronic analog-to-digital converter; 7—data processing.

[0024] FIGS. 2A to 2C show calculation process of a sampling and holding effect in frequency domain in the present invention, where FIG. 2A is a spectrum diagram showing a signal passed through a photodetector with controlled frequency response, where A.sub.0 is an original signal vector, A.sub.1 and A.sub.2 are retained high-frequency components; FIG. 2B shows that, in the quantification process of an electronic analog-to-digital converter, the high-frequency components A.sub.1 and A.sub.2 of the signal are folded back to original signal positions; and FIG. 2C is a diagram showing the vector superposition of the original signal and signals of the folded-back high-frequency components, where A.sub.0′ is a signal vector after equivalent time offset.

[0025] FIG. 3 is a schematic diagram showing a set of frequency responses in the present invention as in formula (6), where m is positive integer greater than or equal to 1.

[0026] FIGS. 4A and 4B show simulation result in one embodiment of the present invention with a time mismatch added to a two-channel channel interleaved photonic analog-to-digital conversion system, where FIG. 4A shows variation of the size of the equivalent delay with time mismatch, the horizontal axis represents normalized time mismatch (τ/Ts) and the vertical axis represents normalized equivalent delay (τ.sub.eff/Ts); and FIG. 4B shows the improvement effect of a spurious-free dynamic range, the horizontal axis represents normalized time mismatch (τ/Ts), and the vertical axis represents spurious-free dynamic range (dB). In both figures, 100 is a photonic analog-to-digital conversion system using photodetectors with low-pass filtering frequency response, 200 is a photonic analog-to-digital conversion system using photodetectors with controlled frequency response, and 300 is a photonic analog-to-digital conversion system in which a time mismatch is completely suppressed under ideal conditions.

DETAILED DESCRIPTION OF THE INVENTION

[0027] One embodiment of the present invention is further described in combination with the drawings. The embodiment shows the implemented technical solutions of the present invention and provides detailed implementation modes and processes, but the scope of protection of the present invention is not limited to the embodiment.

[0028] As shown in FIG. 1, based on an interconnection mode of a traditional channel interleaved photonic analog-to-digital conversion architecture, the present invention comprises an optical sampling clock source 1, a sampled signal source 2, a photonic sampling gate 3, a demultiplexer array 4, a photodetector array 5, an electronic analog-to-digital converter array 6, and a data integration and processing module 7. After determining a sampling rate N*F.sub.s and the number N of channels of the entire channel interleaved photonic analog-to-digital conversion system, a sampling rate of a single channel is F.sub.s, and a 3 dB bandwidth of a photodetector in the traditional architecture is half of the sampling rate of a single channel, i.e., F.sub.s/2. In the embodiment of the present invention, based on the aforementioned formula (5), the key to obtaining a time mismatch counteraction effect is to retain high-frequency components generated by a sampled signal in a single channel. Amplitude-frequency responses of the photodetectors as shown in the following formula are used, and their 3 dB bandwidths are set to be the sampling rate of a single channel, i.e., F.sub.s. In a frequency spectrum of a single channel, in addition to a signal within the Nyquist bandwidth, two high-frequency components symmetrical to the sampling rate are retained, that is, m=1 in formula (6).

[00006]$\begin{array}{cc}.Math.H_{\mathrm{OE}}\left(f\right).Math.=\{\begin{array}{cc}1,& 0\le f\le \frac{1}{2}{F}_s\\ 1-\frac{1}{F_s}\left(f-\frac{1}{2}{F}_s\right),& \frac{1}{2}{F}_s<f\le \frac{1}{2}{F}_s+F_s\\ 0,& \mathrm{otherwise}\end{array}& \left(7\right)\end{array}$

[0029] Based on basic principles of the channel interleaved photonic analog-to-digital converters, whose actual implementations all are from the extension based on a two-channel photonic analog-to-digital conversion system, the above-mentioned photodetectors with controlled frequency response are used for two-channel photonic analog-to-digital converters, and their signal holding effect is verified by simulation. In the two-channel channel interleaved analog-to-digital converters, when input signals are single-frequency signals, a time mismatch will cause the inclusion of a large spurious signal in a frequency spectrum of output data in addition to original input signals. The power of the spurious signal is proportional to the square of the time mismatch, so a signal-to-noise ratio of a final spectrum can reflect the size of a remaining time mismatch, thereby reflecting a sampling and holding effect. In the simulation of the embodiment, the number N of channels of the photonic analog-to-digital conversion system is set to be 2, the sampling rate F.sub.s of a single channel is set to be 5 GSPS, a total sampling rate is set to be 10 GSPS, and frequency spectrum responses of the used photodetectors can be derived by formula (7). A noise floor of the system is set to be 60 dBm, the powers of input signals are set to be 0 dBm, and it can be seen that an upper limit of the signal-to-noise ratios is 60 dB. A time mismatch of −50 ps-50 ps and step 1 ps is added to one of the channels, and signal-to-noise ratios are respectively calculated. In the same situation, compared with photodetectors with rectangular amplitude-frequency response in the current technology, results are shown in FIGS. 4A and 4B, where FIG. 4A shows the variation of the size of the equivalent delay with time mismatch, and FIG. 4B shows the improvement effect of a spurious-free dynamic range. In the two figures, 100 is a photonic analog-to-digital conversion system using photodetectors with low-pass filtering frequency response, 200 is a photonic analog-to-digital conversion system using photodetectors with controlled frequency response, and 300 is a photonic analog-to-digital conversion system in which the time mismatch is completely suppressed under ideal conditions. It can be seen that a small time mismatch can lead to a significant reduction in signal-to-noise ratio in the prior art. The control of the frequency responses of the photodetectors based on the method proposed in the invention can make the photonic analog-to-digital conversion system unaffected by the time mismatch within a certain range, which is equivalent in time domain to holding optical sampling pulse points for ±20 ps, about 0.2 sampling periods.

[0030] The implementation method of the above photonic analog-to-digital conversion architecture based on photonic parallel sampling of the present invention comprises the following steps: [0031] (1) determining the sampling rate N*F.sub.s and the number N of channels according to the channel interleaved photonic analog-to-digital conversion system architecture; [0032] (2) proposing the achievable frequency responses according to formula (6) and actual bandwidth requirements, which should meet two conditions: the high-frequency components generated by pulse sampling should be retained in pairs; the 3 dB bandwidths should be equal to an integer multiple of the Nyquist bandwidth of a single channel, that is, in formula (6), m is set to be a positive integer greater than or equal to 1, and a corresponding photodetector array is used in the system; [0033] wherein, on the other hand, phase frequency responses are held to be linear phases, a corresponding photodetector array is used in the system, and the obtained N channels of optical pulse sequences are input into N PD units with controlled frequency response to obtain N channels of held electrical signals which are then passed through N electronic analog-to-digital converters with synchronous sampling to obtain N channels of electrical digital signals; and [0034] (3) passing the obtained N channels of electrical signals through the N electronic analog-to-digital converters to obtain N channels of electrical digital signals that are input into the data integration and processing module, which performs the data reconstruction, interleaving and processing of the received N channels of electrical digital signals to obtain the information about the original electrical analog signals.

[0035] In the above process, basic architecture settings of the channel interleaved photonic analog-to-digital converters are retained, and appropriate frequency responses of photoelectric conversion are selected according to the proposed equivalent sampling and holding principles, so as to achieve a holding effect on each channel of demultiplexed signals, thereby counteracting sampling errors caused by the time mismatch. Experiments show that the present invention enables the photonic analog-to-digital conversion system to counteract the time mismatch between sampling and quantization in any sub-channel. At the same time, the controlled frequency responses of photoelectric conversion do not lead to additional expenses on active devices and software, which greatly improves performances of the photonic analog-to-digital conversion system. Based on the channel interleaved photonic analog-to-digital conversion architecture, the present invention simplifies the compensation mode of time mismatch, is not limited by the number of channels, and can provide more reliable technical solutions for realizing a photonic analog-to-digital conversion system with high sampling rate in the future.