METHOD AND CIRCUIT ARRANGEMENT FOR DETECTING AN ARC, AND PHOTOVOLTAIC (PV) INVERTER HAVING A CORRESPONDING CIRCUIT ARRANGEMENT

20220365145 · 2022-11-17

    Inventors

    Cpc classification

    International classification

    Abstract

    The disclosure is directed to a method for detecting an arc in a direct-current circuit including a DC load, a DC source supplying the DC load, and a circuit arrangement arranged between the DC source and the DC load. A power flow between the DC source and an output of the circuit arrangement is cyclically interrupted by a switching circuit, such that the power flow is enabled in an active time window with the first period Δt.sub.1 and the power flow is suppressed in an inactive time window with the second period Δt.sub.2. Detection of a current I characterizing the power flow P and/or a voltage U characterizing the power flow P in two consecutive active time windows and comparison of the detected values of current I and/or voltage U of the active time window with the corresponding detected values from the preceding active time window can signal an arc if these values of the active time window differ from the corresponding values of the preceding active time window by more than a threshold value. The application also describes a circuit arrangement for detecting an arc and a photovoltaic (PV) inverter comprising such a circuit arrangement.

    Claims

    1. A method for detecting an arc in a direct-current (DC) circuit comprising a DC load, a DC source supplying the DC load, and a circuit arrangement arranged between the DC source and the DC load, wherein the circuit arrangement comprises an input comprising two input terminals configured to connect to the DC source, an output comprising two output terminals configured to connect to the DC load, and a switching circuit arranged between the input and the output, wherein the switching circuit or the switching circuit in connection with an output voltage U.sub.out applied to the output of the circuit arrangement is configured to enable a power flow P between the DC source and the output in a first operating mode BM1 and is configured to suppress the power flow between the DC source and the output in a second operating mode BM2, comprising: cyclically interrupting the power flow P between the input and the output using the switching circuit such that the power flow P is enabled in an active time window with the first period Δt.sub.1 in the first operating mode BM1 and the power flow P is suppressed in an inactive time window with the second period Δt.sub.2 in the second operating mode BM2, detecting a current I characterizing the power flow P and/or a voltage U characterizing the power flow P in two consecutive active time windows comprising a current active time window and a preceding active time window, comparing the detected values of current I and/or voltage U of the current active time window with the corresponding detected values of current and/or voltage from the preceding active time window, and signaling an arc if the values of current I and/or voltage U of the current active time window differ from the corresponding values of current and/or voltage of the preceding active time window by more than a threshold value.

    2. The method as claimed in claim 1, further comprising interrupting the power flow P between the input and the output either permanently, or for a period of several minutes, or until a manual acknowledgement.

    3. The method as claimed in claim 1, wherein the current active time window and the preceding active time window are separated from one another by exactly one inactive time window.

    4. The method as claimed in claim 1, wherein a value of the second period Δt.sub.2 of the inactive time window is sufficient to quench an arc that may be present in the DC circuit and to suppress reignition of the arc quenched in the specified inactive time window in the active time window that immediately chronologically follows the specified inactive time window.

    5. The method as claimed in claim 4, wherein the second period Δt.sub.2 comprises a value between 0.1 ms and 10.0 ms.

    6. The method as claimed in claim 1, wherein a value of the second period Δt.sub.2 is selected depending on detected values of current I and/or voltage U of an immediately preceding active time window, and wherein the second period Δt.sub.2 increases as a value of the current I and/or the voltage U increases.

    7. The method as claimed in claim 1, wherein the circuit arrangement comprises an input capacitance connected in parallel with the input, and further comprising detecting, in the inactive time window, an input current I.sub.in flowing at the input and/or an input voltage U.sub.in applied to the input between the input terminals, and determining the second period Δt.sub.2 of the inactive time window depending on the detected input current I.sub.in and/or on the detected input voltage U.sub.in.

    8. The method as claimed in claim 7, wherein the second period Δt.sub.2 of the inactive time window is further determined, wherein an end point of the inactive time window is dictated by a time when the detected input current I.sub.in falls below a further current threshold value I.sub.TH2.

    9. The method as claimed in claim 1, wherein the circuit arrangement comprises an input capacitance connected in parallel with the input, and further comprising measuring, in the inactive time window, an input current I.sub.in flowing at the input by evaluating a change over time in the input voltage U.sub.in applied to the input capacitance.

    10. The method as claimed in claim 1, wherein the switching circuit comprises a DC-DC converter, and the circuit arrangement comprises an output capacitance connected in parallel with the output, and further comprising increasing, in the active time window, a voltage U.sub.out applied to the output capacitance toward an end of the first period Δt.sub.1 by the switching circuit.

    11. The method as claimed in claim 1, wherein a value of the first period Δt.sub.1 of the active time window is selected so that an arc energy that would be generated by a power loss of an assumed arc in the active time window does not exceed a predetermined maximum permitted energy value E.sub.max.

    12. The method as claimed in claim 1, wherein the DC source comprises a PV string and the DC load comprises a single-phase DC-AC converter connected on the output side thereof to an AC voltage (AC) grid, and wherein the cyclical interruption of the power flow P takes place so that there is a zero crossing of an AC current I.sub.AC(t) flowing via an output of the DC-AC converter during the second period Δt.sub.2 of the inactive time window.

    13. The method as claimed in claim 1, wherein a plurality of DC sources are each connected to the DC load in parallel with one another via a respective switching circuit to jointly supply the DC load with their respective power flows P, wherein the method is carried out concurrently for each of the DC sources so that a temporal overlap of the inactive time windows of the plurality of DC sources is minimized.

    14. A circuit arrangement for detecting an arc in a DC circuit, comprising: an input comprising two input terminals configured to connect to a DC source, and an output comprising two output terminals configured to connect to a DC load, a switching circuit arranged between the input and the output, wherein the switching circuit or the switching circuit in connection with an output voltage U.sub.out applied to the output of the circuit arrangement is configured to enable a power flow P between the input and the output in a first operating mode (BM1) and to suppress a power flow P between the input and the output in a second operating mode (BM2), a measuring device configured to determine a voltage U applied to the input or to the output and/or a current I flowing in a connection line from one of the input terminals to one of the output terminals, and a control circuit configured to control the switching circuit, or control the switching circuit and the measuring device, wherein the control circuit is configured, in connection with the switching circuit and the measuring device, to carry out a method comprising: cyclically interrupting the power flow P between the input and the output using the switching circuit such that the power flow P is enabled in an active time window with the first period Δt.sub.1 in the first operating mode BM1 and the power flow P is suppressed in an inactive time window with the second period Δt.sub.2 in the second operating mode BM2, detecting a current I characterizing the power flow P and/or a voltage U characterizing the power flow P in two consecutive active time windows comprising a current active time window and a preceding active time window, comparing the detected values of current I and/or voltage U of the current active time window with the corresponding detected values of current and/or voltage from the preceding active time window, and signaling an arc if the values of current I and/or voltage U of the current active time window differ from the corresponding values of current and/or voltage of the preceding active time window by more than a threshold value.

    15. The circuit arrangement as claimed in claim 14, wherein the switching circuit comprises a semiconductor switch arranged in one of the connection lines, wherein the semiconductor switch is free of a freewheeling diode, or wherein the semiconductor switch has an intrinsic freewheeling diode associated therewith.

    16. The circuit arrangement as claimed in claim 14, wherein the circuit arrangement or the switching circuit of the circuit arrangement comprises a DC-DC converter.

    17. A photovoltaic (PV) inverter comprising: at least one input comprising two input terminals configured to connect to a PV string as a DC source and an output for connection to an AC voltage (AC) grid, a DC-AC converter configured to convert a DC voltage to an AC voltage, and a circuit arrangement comprising an input connected to the at least one input of the PV inverter and comprising an output connected to an input of the DC-AC converter, wherein the circuit arrangement comprises: the input comprising two input terminals configured to connect to the DC source, and the output comprising two output terminals configured to connect to a DC load comprising the DC-AC converter, a switching circuit arranged between the input and the output, wherein the switching circuit or the switching circuit in connection with an output voltage U.sub.out applied to the output of the circuit arrangement is configured to enable a power flow P between the input and the output in a first operating mode (BM1) and to suppress a power flow P between the input and the output in a second operating mode (BM2), a measuring device configured to determine a voltage U applied to the input or to the output and/or a current I flowing in a connection line from one of the input terminals to one of the output terminals, and a control circuit configured to control the switching circuit, or control the switching circuit and the measuring device, wherein the control circuit is configured, in connection with the switching circuit and the measuring device, to carry out a method comprising: cyclically interrupting the power flow P between the input and the output using the switching circuit such that the power flow P is enabled in an active time window with the first period Δt.sub.1 in the first operating mode BM1 and the power flow P is suppressed in an inactive time window with the second period Δt.sub.2 in the second operating mode BM2, detecting a current I characterizing the power flow P and/or a voltage U characterizing the power flow P in two consecutive active time windows comprising a current active time window and a preceding active time window, comparing the detected values of current I and/or voltage U of the current active time window with the corresponding detected values of current and/or voltage from the preceding active time window, and signaling an arc if the values of current I and/or voltage U of the current active time window differ from the corresponding values of current and/or voltage of the preceding active time window by more than a threshold value.

    18. The PV inverter as claimed in claim 17, comprising a plurality of inputs configured to connect to a respective PV string as a DC source, wherein the inputs are each connected to a common DC link circuit in parallel with one another via a respective DC-DC converter, and wherein the DC link circuit is connected to an input of the DC-AC converter, and comprising a plurality of circuit arrangements, wherein each of the inputs of the PV inverter is connected to the respective input of a circuit arrangement assigned thereto, and wherein the output of each of the circuit arrangements is connected to the respective input of the DC-AC converter, wherein each of the circuit arrangements comprise: an input comprising two input terminals configured to connect to a respective PV string as a DC source, and an output comprising two output terminals configured to connect to the DC load comprising the DC-AC converter, a switching circuit arranged between the input and the output, wherein the switching circuit or the switching circuit in connection with an output voltage U.sub.out applied to the output of the circuit arrangement is configured to enable a power flow P between the input and the output in a first operating mode (BM1) and to suppress a power flow P between the input and the output in a second operating mode (BM2), a measuring device configured to determine a voltage U applied to the input or to the output and/or a current I flowing in a connection line from one of the input terminals to one of the output terminals, and a control circuit configured to control the switching circuit, or control the switching circuit and the measuring device, wherein the control circuit is configured, in connection with the switching circuit and the measuring device, to carry out a method comprising: cyclically interrupting the power flow P between the input and the output using the switching circuit such that the power flow P is enabled in an active time window with the first period Δt.sub.1 in the first operating mode BM1 and the power flow P is suppressed in an inactive time window with the second period Δt.sub.2 in the second operating mode BM2, detecting a current I characterizing the power flow P and/or a voltage U characterizing the power flow P in two consecutive active time windows comprising a current active time window and a preceding active time window, comparing the detected values of current I and/or voltage U of the current active time window with the corresponding detected values of current and/or voltage from the preceding active time window, and signaling an arc if the values of current I and/or voltage U of the current active time window differ from the corresponding values of current and/or voltage of the preceding active time window by more than a threshold value.

    19. The PV inverter as claimed in claim 18, wherein the control circuit is configured to control the DC-AC converter and the DC-DC converter of the PV inverter so that, during operation of the PV inverter, a voltage applied to the DC link circuit is kept above a maximum value of open circuit voltages of the individual PV strings.

    Description

    BRIEF DESCRIPTION OF THE FIGURES

    [0037] In the following, the disclosure is illustrated using figures. In the figures

    [0038] FIG. 1 shows a DC circuit comprising a DC source, a DC load, and a circuit arrangement according to a first embodiment of the disclosure;

    [0039] FIG. 2 shows a circuit arrangement according to a second embodiment of the disclosure;

    [0040] FIG. 3 shows time profiles for the operating mode, current and voltage of the circuit arrangement from FIG. 2 during the method according to the disclosure; and

    [0041] FIG. 4 shows a PV system comprising a PV inverter according to one embodiment of the disclosure.

    DETAILED DESCRIPTION

    [0042] FIG. 1 shows a direct-current (DC) circuit 6 comprising a DC source 2, a DC load 3 and a circuit arrangement 1 according to a first embodiment of the disclosure. The DC source 2 may have an internal resistance (not explicitly shown in FIG. 1). The circuit arrangement 1 has an input 7 comprising a first input terminal 7.1 and a second input terminal 7.2, to which input the DC source 2 is connected. The circuit arrangement 1 also has an output 8 comprising a first output terminal 8.1 and a second output terminal, the output being connected to the DC load 3. Each of the input terminals 7.1, 7.2 is connected via a respective connection line 23, 24 to a corresponding one of the output terminals 8.1, 8.2. A switching circuit 10 is arranged between the input 7 and the output 8. The switching circuit 10, optionally in connection with a voltage U.sub.out applied to the output 8 of the circuit arrangement 1, is configured to enable a power flow P between the DC source 2 and the output 8 during a first operating mode BM1 and to suppress it during a second operating mode BM2. For example, a power flow P between the input 7 and the output 8 can be made possible by means of the switching circuit 10 during the first operating mode BM1 and prevented during the second operating mode BM2. For this purpose, the switching circuit 10 has at least one controllable switch, possibly also a plurality of controllable switches. The switches may be electromechanical switches, or semiconductor switches. In addition, the switching circuit 10 can also have one or more non-controllable semiconductor switches, for example, diodes. The switching circuit 10 is controlled by a control circuit 5. The circuit arrangement 1 also comprises a measuring device 4 that is configured to measure an output voltage U.sub.out applied to the output 8 of the circuit arrangement 1 and/or an output current I.sub.out flowing via the output 8. Alternatively or cumulatively, the measuring device 4 can also be configured to measure an input voltage U.sub.in applied to the input 7 and/or an input current I.sub.in flowing via the input 7. The measuring device 4 is connected to the control circuit 5 for the purpose of communication and control. The circuit arrangement 1 can optionally comprise an output capacitance 11—illustrated by dashed lines in FIG. 1—that is connected in parallel with its output 8. Alternatively or cumulatively, the circuit arrangement 1 can comprise an input capacitance that is connected in parallel with its input 7 (not shown in FIG. 1).

    [0043] During operation of the circuit arrangement 1, a power flow P between the DC source 2 and the output 8 of the circuit arrangement 1 is now interrupted cyclically by means of the switching circuit 10—and optionally in connection with an output voltage U.sub.out applied to the output 8 of the circuit arrangement 1, that is to say in a manner satisfying a rule and repeatedly. A power flow P between the DC source 2 and the output 8 therefore takes place discontinuously, with—as will be explained in connection with FIG. 3—active time windows 31 with a first period Δt.sub.1 alternating with inactive time windows 32 with a second period Δt.sub.2. During the active time window 31, a power flow P different from 0 thus takes place between the DC source 2 and the output 8, with the power flow P taking the value of 0 in the inactive time windows 32.

    [0044] During two consecutive active time windows 31, a current I and/or a voltage U are now respectively determined by means of the measuring device 4 and communicated to the control circuit 5. The current I may be the input current I.sub.in or the output current I.sub.out and the voltage may be the input voltage U.sub.in or the output voltage U.sub.out, respectively. By means of the control circuit 5, the values of the current I and/or of the voltage U of the consecutive active time windows 31 are compared with one another. The control circuit 5 is set up to signal an arc 9, for example, a series arc, if the values of current I and/or voltage U of the chronologically following active time window 31 deviate by more than a threshold value from the corresponding values of current I and/or voltage U of the preceding active time window 31.

    [0045] FIG. 2 shows a circuit arrangement 1 according to a second embodiment of the disclosure. It is similar in some components to the first embodiment already described in FIG. 1, which is why reference is made to the descriptions under FIG. 1 for the matching features. Primarily the differences between the second embodiment and the first embodiment are explained below.

    [0046] According to the second embodiment, the circuit arrangement 1 is configured as a DC-DC converter 21, in particular, as a step-up converter, to convert an input voltage U.sub.in applied to the input 7 to an output voltage U.sub.out applied to the output 8. For this purpose, the switching circuit 10 of the circuit arrangement 1 comprises an inductance 22 and a first semiconductor switch S.sub.1 connected in series therewith within the first connection line 23 between the first input terminal 7.1 and the first output terminal 8.1. A second semiconductor switch S.sub.2 is connected by way of its first terminal to a connection point 25 of the inductance 22 and the first semiconductor switch S.sub.1 and connected by way of its second terminal to the second connection line 24. The first S.sub.1 and the second semiconductor switch S.sub.2 may each comprise an intrinsic or separately formed freewheeling diode D.sub.1, D.sub.2, illustrated using dashes in FIG. 2.

    [0047] During the first operating mode BM1, in other words in the active time window 31 shown in FIG. 3 with the first period Δt.sub.1, the circuit arrangement 1 operates as a step-up converter and converts the input voltage U.sub.in to a larger output voltage U.sub.out relative to the input voltage U.sub.in by means of suitable clocking of the first S.sub.1 and optionally the second semiconductor switch S.sub.2. In this case, the output voltage U.sub.out is advantageously selected in such a way that it is greater than an open circuit voltage U.sub.0 of a DC source 2 (not shown in FIG. 2) connected to the input 7. An energy associated with the output voltage U.sub.out is temporarily stored in an output capacitance 11 arranged in parallel with the output 8. In the second operating mode BM2, that is to say in the inactive time window 32 with the second period Δt.sub.2, illustrated in FIG. 3, the clocking of the semiconductor switches S.sub.1, S.sub.2 is interrupted by the control circuit 5. The semiconductor switches S.sub.1, S.sub.2 are permanently open during the second operating mode BM2. The second period Δt.sub.2 can last for a few clock cycles of the DC-DC converter 21. Since the voltage U.sub.out applied to the output 8 is now selected in such a way that it is greater than the open circuit voltage U.sub.0 of the DC source 2 connected to the input, the freewheeling diode D.sub.1, which may be present and associated with the first semiconductor switch S.sub.1, blocks a current flow between the first input terminal 7.1 and the first output terminal 8.1, and thus a power flow P between the DC source 2 and the output 8 of the circuit arrangement 1.

    [0048] By means of the control circuit 5, the circuit arrangement 1 is set in an alternating manner during the first period Δt.sub.1 to the first operating mode BM1 and during the second period Δt.sub.2 to the second operating mode BM1, which generates a discontinuous power flow P from the DC source 2 to the output 8 of the circuit arrangement 1. Detection and evaluation of the values of current I and/or voltage U in two chronologically consecutive active time windows 31, and selective signaling of an arc based on the comparison takes place by means of the control circuit 5 as already described in connection with FIG. 1.

    [0049] FIG. 3 shows, below one another, time profiles for operating modes BM1, BM2 of the switching circuit 10 of the circuit arrangement 1 (upper graph), as well as current I(t) (middle graph) and voltage U(t) (lower graph) of the circuit arrangement 1 from FIG. 2 during the method according to the disclosure. The time profiles of current and voltage each involve, for example, variables I.sub.in(t), U.sub.in(t) detected by using the measuring device 4 (e.g., a device, sensor or circuitry) at the input 7 of the circuit arrangement 1. In this case, the time profiles reflect the behavior of the circuit arrangement 1 in close temporal proximity to a series arc 9 that ignites at the time t.sub.0.

    [0050] As illustrated in the upper graph, active time windows 31 of the period Δt.sub.1 in which the circuit arrangement 1 is in the first operating mode BM1, alternate with inactive time windows 32 of the period Δt.sub.2 in which the circuit arrangement is in the second operating mode BM2. In the first active time window 31, the current I.sub.in(t) takes the value I.sub.1 and the voltage U.sub.in(t) takes the value U.sub.1. The values of the current I.sub.1 and the voltage U.sub.1 result from the power consumption of the DC load 3 connected to the output 8 of the circuit arrangement 1. In the immediately adjacent inactive time window 32, the power flow P between the DC source 2 and the output 8 of the circuit arrangement 1 is interrupted for the second period Δt.sub.2. The current I.sub.in(t) flowing via the input 7 takes a value of 0 A, while the voltage U.sub.in(t) applied to the input 7 corresponds to the open circuit voltage U.sub.0 of the DC source 2. The open circuit voltage U.sub.0 is usually higher than the voltage U.sub.1 of the loaded DC source 2 due to an always present internal resistance of a real DC source 2, for example PV generator. In the next active time window 31, in this case the second active time window 31, the current I.sub.in(t) first corresponds to the value of the preceding active time window 31 up to the time t.sub.0 at which the arc 9 in the DC circuit 6, in particular between the DC source 2 and the input of the circuit arrangement 1, ignites. From the time t.sub.0, there is a sudden slight drop in the current values, and possibly also the voltage, from the original values I.sub.1, U.sub.1 to the values I.sub.2, U.sub.2. The sudden drop in current is based on a power loss and an associated voltage drop of a series arc 9 starting from t.sub.0. For example, the series arc 9 burns across a microgap in a broken conductor. In the adjoining inactive time window 32, the series arc 9 is quenched by the power flow P between the DC source 2 and the output 8 of the circuit arrangement 1 being interrupted again. The current I.sub.in(t) flowing via the input 7 again takes the value 0 A. The voltage U.sub.in(t) applied to the input 7 in the second inactive time window 32 is now no longer defined via the DC source 2, owing to the microgap present upstream of the input, but rather via the voltage U.sub.out(t) applied to the output 8 and an impedance ratio of the open semiconductor switches S.sub.1, S.sub.2. These namely act as voltage dividers of the voltage U.sub.out(t) applied to the output 8. For the profile of the voltage U.sub.in(t), it should also be considered that the voltage U.sub.out(t) applied to the output 8 can be discharged to a greater or lesser extent depending on a current possibly flowing through the DC load 3. In any case, the voltage U.sub.in(t) applied to the input differs significantly from the open circuit voltage U.sub.0 of the DC source 2. FIG. 3 illustrates by way of example a value of the voltage U.sub.in(t) of nearly 0 V in the second inactive time window 32. In the subsequent third active time window 31, a power flow P through the switching circuit 10 is in principle possible, but it is now prevented by the microgap, which is why the values of voltage U.sub.in(t) and current I.sub.in(t) in FIG. 3 are shown as negligibly low.

    [0051] The control circuit 5 now compares the values of current I.sub.in(t) and/or voltage U.sub.in(t) of the active time windows 31 detected by the measuring device 4 with the values of the respectively preceding active time window 31. When comparing the values between the second 31 and the third active time window 31, in FIG. 3, the control circuit 5 determines a difference between these values that exceeds a threshold value and signals an arc 9 in response thereto. In response to the signaling of the arc 9, the switching circuit 10 remains in the second operating mode BM2 until manual acknowledgement by a qualified person, with a power flow P between the DC source 2 and the output 8 being suppressed.

    [0052] FIG. 4 shows a photovoltaic (PV) system 47 comprising a PV inverter 40 according to one embodiment of the disclosure. The PV inverter 40 is configured as what is known as a multi-string inverter comprising several (in this case as an example: two) DC-side inputs 43 comprising input terminals 43.1 and 43.2 for connecting a PV string 45 as a DC source 2. Each of the inputs 43 is connected in parallel with a link circuit capacitance of a common DC link circuit 42 via a respective DC-DC converter 21, in this case a step-up converter. The link circuit capacitance is connected to an input of a DC-AC converter 41. The output of the DC-AC converter 41 is connected to an AC voltage (AC) grid 46 via an output 44 of the PV inverter 40 via corresponding AC isolating elements (not shown in FIG. 4).

    [0053] The PV inverter 40 comprises a circuit arrangement 1 for each of the DC-side inputs 43. The circuit arrangements 1, in particular the switching circuits 10 thereof, are in this case each configured as DC-DC converters and are at least partially formed by the DC-DC converters 21 of the PV inverter 40 that are present anyway. The inputs 7 of the circuit arrangements 1 correspond here to the inputs 43 of the PV inverter 40. The outputs 8 of the circuit arrangements 1 each correspond here to the outputs of the DC-DC converter 21. The circuit arrangements 1 comprise a common control circuit 5 that is part of a central control circuit of the PV inverter 40 and is configured to control the DC-DC converter 21 and the DC-AC converter 41. The measuring devices 4 of the circuit arrangements are also part of the DC-DC converter 21 and are not explicitly illustrated in FIG. 4.

    [0054] The method according to the disclosure is carried out via the control circuit 5 simultaneously for each DC source 2 configured as a PV string 45. Each of the PV strings 45 therefore has a discontinuous power flow P within its respective DC lines between the PV modules and the corresponding DC-side input 43 of the PV inverter 40 during normal operation of the PV inverter 40. In this case, active time windows 31 with a first period Δt.sub.1 alternate with inactive time windows 32 with a second period Δt.sub.2. The discontinuous power flow P within the two PV strings 45 can advantageously take place here in one embodiment in such a way that there is as little overlap as possible between the inactive time windows 32 of one PV string 45 and the inactive time windows of the other PV string 45, that is to say the inactive time windows are offset from each other as far as possible. If an arc 9, for example, a series arc, is now determined within one of the PV strings 45 by means of the control circuit 5, only that switching circuit 10, that is to say that DC-DC converter 21, which is assigned to that PV string 45 in which the series arc 9 was also detected is set to the second operating mode BM2 for a longer period—and possibly until a manual acknowledgement by a qualified person. In contrast, the respective other PV string 45 can continue to be operated with a discontinuous power flow P in the direction of its associated DC-side input 43.