Abstract
A composition of matter comprising: a graphene layer carried directly on a sapphire, Si, SiC, Ga.sub.2O.sub.3 or group III-V semiconductor substrate; wherein a plurality of holes are present through said graphene layer; and wherein a plurality of nanowires or nanopyramids are grown from said substrate in said holes, said nanowires or nanopyramids comprising at least one semiconducting group III-V compound.
Claims
1. A composition of matter comprising: a sapphire, Si, SiC, Ga.sub.2O.sub.3 or group III-V semiconductor substrate; an intermediate group III-V semiconductor layer directly on top of said substrate; a graphene layer directly on top of said intermediate layer; wherein a plurality of holes are present through said graphene layer; and wherein a plurality of nanowires or nanopyramids are grown from said intermediate layer in said holes, said nanowires or nanopyramids comprising at least one semiconducting group III-V compound.
2. A composition of matter comprising: a graphene layer carried directly on a sapphire, Si, SiC, Ga.sub.2O.sub.3 or group III-V semiconductor substrate; wherein a plurality of holes are present through said graphene layer; and wherein a plurality of nanowires or nanopyramids are grown from said substrate in said holes, said nanowires or nanopyramids comprising at least one semiconducting group III-V compound.
3. A composition as claimed in any preceding claim, further comprising group III-V nanoislands grown directly on the graphene layer.
4. A composition as claimed in claim 3, wherein the epitaxy, crystal orientation and facet orientations of said nanoislands are directed by the intermediate layer, if present, or by the substrate if there is no intermediate layer.
5. A composition of matter as claimed in any of claim 1 or 3-4, wherein the intermediate layer is GaN, AlGaN, AlInGaN or AlN, preferably AlN.
6. A composition of matter as claimed in any of claim 1 or 3-5, wherein the intermediate layer has a thickness of less than 200, preferably less than 100 nm, more preferably less than 75 nm.
7. A composition of matter as claimed in any preceding claim, wherein the composition does not comprise an additional masking layer directly on top of said graphene layer, e.g. does not comprise an oxide, nitride or fluoride masking layer directly on top of said graphene layer.
8. A composition of matter as claimed in any preceding claim, wherein at least some or all of said nanowires or nanopyramids and optionally nanoislands are coalesced.
9. A composition as claimed in any preceding claim in which said nanowires or nanopyramids grow epitaxially from the substrate or intermediate layer through the holes in graphene.
10. A composition as claimed in any preceding claim in which said graphene layer is up to 20 nm in thickness, preferably up to 10 nm, more preferably up to 5 nm, more preferably up to 2 nm in thickness.
11. A composition as claimed in any preceding claim in which the substrate comprises sapphire, especially sapphire (0001).
12. A composition as claimed in any preceding claim in which said nanowires or nanopyramids are doped.
13. A composition as claimed in any preceding claim in which said nanowires or nanopyramids are axially heterostructured.
14. A composition as claimed in any preceding claim in which said nanowires or nanopyramids are core-shell or radially heterostructured.
15. A composition as claimed in any preceding claim wherein a graphitic top contact layer or conventional metal contact or metal stack contact layer is present on top of said nanowires or nanopyramids.
16. A composition as claimed in any preceding claim wherein the surface of the graphene layer is chemically/physically modified to modify its electrical properties.
17. A composition of matter comprising: a graphene layer carried directly on a sapphire, Si, SiC, Ga.sub.2O.sub.3 or group III-V semiconductor substrate; and an oxide, nitride or fluoride masking layer directly on top of said graphene layer; wherein a plurality of holes are present through said graphene layer and through said masking layer to said substrate; and wherein a plurality of nanowires or nanopyramids are grown from said substrate in said holes, said nanowires or nanopyramids comprising at least one semiconducting group III-V compound.
18. A composition as claimed in claim 17 in which said nanowires or nanopyramids grow epitaxially from the substrate.
19. A composition as claimed in claim 17 or 18 in which said graphene layer is up to 20 nm in thickness.
20. A composition as claimed in any of claims 17-19 in which said masking layer comprises a metal oxide, metal nitride or metal fluoride.
21. A composition as claimed in any of claims 17-20 in which said masking layer comprises Al.sub.2O.sub.3, W.sub.2O.sub.3, HfO.sub.2, TiO.sub.2, MoO.sub.2, SiO.sub.2, AlN, BN (e.g. h-BN), Si.sub.3N.sub.4, MgF.sub.2 or CaF.sub.2.
22. A composition as claimed in any of claims 17-21 in which the substrate comprises sapphire, especially sapphire (0001).
23. A composition as claimed in any of claims 17-22 in which said nanowires or nanopyramids are doped.
24. A composition as claimed in any of claims 17-23 in which said nanowires or nanopyramids are axially heterostructured.
25. A composition as claimed in any of claims 17-24 in which said nanowires or nanopyramids are core-shell or radially heterostructured.
26. A composition as claimed in any of claims 17-25 wherein a graphitic top contact layer or conventional metal contact or metal stack contact layer is present on top of said nanowires or nanopyramids.
27. A composition as claimed in any of claims 17-26 wherein the holes in the graphene layer are smaller than the holes in the masking layer so that a portion of the graphene layer is exposed during nanowire or nanopyramid growth.
28. A composition as claimed in any of claims 17 to 27 wherein the surface of the graphene layer is chemically/physically modified in the said plurality of holes in masking layer to enhance the epitaxial growth of nanowires or nanopyramids or to modify its electrical properties.
29. A composition as claimed in any preceding claim, wherein the graphene layer is in electrical contact with at least a portion of said nanowires or nanopyramids.
30. A process comprising: (I) obtaining a composition of matter in which a graphene layer is carried directly on a group III-V intermediate layer, wherein said intermediate layer is carried directly on a sapphire, Si, SiC, Ga.sub.2O.sub.3 or group III-V semiconductor substrate; (II) etching a plurality of holes through said graphene layer; and (III) growing a plurality of nanowires or nanopyramids from said intermediate layer in said holes, said nanowires or nanopyramids comprising at least one semiconducting group III-V compound.
31. A process as claimed in claim 30 in which said nanowires or nanopyramids are grown in the presence or absence of a catalyst.
32. A product obtained by a process as claimed in claim 30 or 31.
33. A device, such as an opto-electronic device, comprising a composition as claimed in claims 1 to 16, e.g. a solar cell, photodetector or LED.
34. A process comprising: (I) providing a graphene layer carried on a sapphire, Si, SiC, Ga.sub.2O.sub.3 or group III-V semiconductor substrate; (II) depositing an oxide, nitride or fluoride masking layer on said graphene layer; (III) introducing a plurality of holes in said masking layer and graphene layer, said holes penetrating through to said substrate; and (IV) growing a plurality of semiconducting group III-V nanowires or nanopyramids in the holes, preferably via molecular beam epitaxy or metal organic vapour phase epitaxy.
35. A process as claimed in claim 34 in which said nanowires or nanopyramids are grown in the presence or absence of a catalyst.
36. A product obtained by a process as claimed in claim 34 or 35.
37. A device, such as an opto-electronic device, comprising a composition as claimed in claims 17 to 29, e.g. a solar cell, photodetector or LED.
38. A process comprising: (I) obtaining a composition of matter in which a graphene layer is carried directly on a sapphire, Si, SiC, Ga.sub.2O.sub.3 or group III-V semiconductor substrate; (II) etching a plurality of holes through said graphene layer; and (III) growing a plurality of nanowires or nanopyramids from said substrate in said holes, said nanowires or nanopyramids comprising at least one semiconducting group III-V compound.
39. A process as claimed in claim 38 in which said nanowires or nanopyramids are grown in the presence or absence of a catalyst.
40. A product obtained by a process as claimed in claim 38 or 39.
41. A device, such as an opto-electronic device, comprising a composition as claimed in claims 2 to 16, e.g. a solar cell, photodetector or LED.
Description
BRIEF DESCRIPTION OF THE FIGURES
[0246] FIGS. 1-7 concern positioned nanowires/nanopyramids using graphene as a hole mask on a crystalline substrate/intermediate-layer and experimental results of LEDs fabricated using this method. FIGS. 8-16 concern positioned nanowires/nanopyramids using the deposition of a hole mask layer on graphene on a crystalline substrate/intermediate-layer and experimental results of a LED fabricated using this method.
[0247] FIG. 1 (case 1.1) shows positioned flat-tip nanowires grown epitaxially on a crystalline substrate/intermediate-layer carrying a graphene mask layer through which holes have been etched. The nanowires first nucleate on the substrate/intermediate-layer epitaxially through the holes in the graphene. As the nanowires continue to grow both axially and radially, they also grow on top of the graphene layer maintaining the epitaxial relationship with the substrate/intermediate-layer. The graphene layer forms electrical contact with the nanowires both by nanowire contact with the graphene surface as well as contact with the edges of the graphene holes. Hence the graphene layer forms a conductive transparent electrode. The nanowires can be grown with either an axial or radial heterostructure in order to fabricate axial or radial n-i-p/p-i-n junction nanowire device structures, respectively. In the case of the radial n-i-p/p-i-n junction nanowire device structure, growth of the p/n nanowire shell layer on graphene must be avoided (gaps needed) to avoid shortening between n/p nanowire core and p/n nanowire shell.
[0248] FIG. 2 (case 1.2) is analogous to FIG. 1, with the only difference being that the nanowires have a pyramidal tip. FIG. 2 shows positioned pyramid-tip nanowires grown epitaxially on a crystalline substrate/intermediate-layer carrying a graphene mask layer through which holes have been etched.
[0249] FIG. 3 (case 1.3) is analogous to the axial n-i-p junction device of FIG. 2, but the nanowires in FIG. 3 are completely coalesced as a result of the growth of an additional n-AlGaN nanowire shell layer. FIG. 3 therefore shows positioned pyramid-tip nanowires grown epitaxially on a crystalline substrate/intermediate-layer carrying a graphene mask layer through which holes have been etched, but the nanowires are completely coalesced as a result of the growth of an additional n-AlGaN nanowire shell layer.
[0250] FIG. 4 (case 1.4) is analogous to FIG. 3, but with coalesced nanopyramids instead of coalesced nanowires. FIG. 4 therefore shows positioned nanopyramids grown epitaxially on a crystalline substrate/intermediate-layer carrying a graphene mask layer through which holes have been etched, and the nanopyramids are completely coalesced as a result of the growth of an additional n-AlGaN nanowire shell layer.
[0251] FIG. 5 depicts nanopyramid growth on a graphene hole mask layer on a sapphire (0001) substrate. The grown structure is a coalesced axial n-n-i-p junction GaN/AlGaN nanopyramid light emitting diode (LED) structure (as schematically described in FIG. 4 above). FIG. 5a is a top-view SEM image taken after the initial growth of n-AlGaN nanopyramids and FIG. 5b is a top-view SEM image taken after the complete growth of the n-AlGaN/n-AlGaN/i-GaN/p-AlGaN nanopyramid LED structure.
[0252] FIG. 6 demonstrates device characteristics of the sample shown in FIG. 5b processed into a flip-chip LED with a size of 50 μm×50 μm. (a) Current-voltage curve and (b) electroluminescence (EL) spectrum of the corresponding LED showing emission at 360 nm.
[0253] FIG. 7 depicts nanopyramid growth on a graphene hole mask layer on an AlN/sapphire (0001) substrate. The grown coalesced structure is an axial n-n-i-p junction GaN/AlGaN nanopyramid light emitting diode (LED) structure (as schematically described in FIG. 4 above). FIG. 7a is a top-view SEM image taken after the initial growth of n-GaN nanopyramids and FIG. 7b is a top-view SEM image taken after the complete growth of the n-GaN/n-AlGaN/i-GaN/p-AlGaN nanopyramid LED structure. FIG. 7c shows a top-view SEM image of seven positioned n-GaN nanopyramids showing one n-GaN triangular-based nanopyramid nucleated on the graphene mask by remote epitaxy. One can see that the nanoisland has nucleated with its three facets parallel to the facet orientation of three of the six facets of the hexagonal nanopyramid. FIG. 7d demonstrates the current-voltage curve of the sample shown in FIG. 7b processed into a flip-chip LED with a size of 50 μm×50 μm.
[0254] FIG. 8 (case 2.1) shows positioned flat-tip nanowires grown epitaxially on a crystalline substrate/intermediate-layer carrying a mask layer on top of graphene through which holes are etched through both masking layer and graphene layer to expose the crystalline substrate/intermediate layer below. The nanowires first nucleate epitaxially on the crystalline substrate/intermediate-layer exposed through the holes in the mask layer. As the nanowires continue to grow both axially and radially, they also grow on top of the mask layer maintaining the epitaxial relationship with the substrate/intermediate-layer. The graphene layer forms electrical contact with the nanowires by nanowire contact with the edges of the graphene holes. Hence the graphene layer forms a conductive transparent electrode. The nanowires can be grown with either an axial or radial heterostructure in order to fabricate axial or radial n-i-p/p-i-n junction nanowire device structures, respectively.
[0255] FIG. 9 (case 2.2) is analogous to FIG. 8, with the only difference being that the nanowires have a pyramidal tip. FIG. 9 therefore shows positioned pyramid-tip nanowires grown epitaxially on a crystalline substrate/intermediate-layer carrying a mask layer on top of graphene through which holes are etched through both masking layer and graphene layer to expose the crystalline substrate/intermediate layer below.
[0256] FIG. 10 (case 2.3) is analogous to the axial n-i-p junction heterostructure of FIG. 9, but the nanowires in FIG. 10 are completely coalesced as a result of the growth of an additional n-AlGaN nanowire shell layer. FIG. 10 therefore shows positioned pyramid-tip nanowires grown epitaxially on a crystalline substrate/intermediate-layer carrying a mask layer on top of graphene through which holes are etched through both masking layer and graphene layer to expose the crystalline substrate/intermediate layer below, but the nanowires are completely coalesced as a result of the growth of an additional n-AlGaN nanowire shell layer
[0257] FIG. 11 (case 2.4) is analogous to FIG. 10, but with coalesced nanopyramids instead of coalesced nanowires. FIG. 11 therefore shows positioned nanopyramids grown epitaxially on a crystalline substrate/intermediate-layer carrying a mask layer on top of graphene through which holes are etched through both masking layer and graphene layer to expose the crystalline substrate/intermediate layer below, but the nanopyramids are completely coalesced as a result of the growth of an additional n-AlGaN nanowire shell layer.
[0258] FIG. 12 depicts nanowire growth using a silicon oxide hole mask layer deposited on graphene carried on a sapphire (0001) substrate. The grown coalesced structure is an axial n-n-i-p junction GaN/AlGaN nanowire light emitting diode (LED) structure (as schematically described in FIG. 10 above). FIG. 12a is a bird-view SEM image taken after the initial growth of n-AlGaN nanowires and FIG. 12b is a bird-view SEM image taken after the complete growth of the n-AlGaN/n-AlGaN/i-GaN/p-AlGaN nanowire LED structure.
[0259] FIG. 13 demonstrates device characteristics of the sample shown in FIG. 12b processed into a flip-chip LED with a size of 50 μm×50 μm. (a) Current-voltage curve and (b) electroluminescence (EL) spectrum of the corresponding LED showing emission at 372 nm.
[0260] FIG. 14 (case 2.2) contrasts AlGaN nanowire growth directly on sapphire (0001) substrate using silicon oxide layer and graphene as combined hole mask with growth directly on graphene using a silicon oxide layer as hole mask. FIGS. 14a and b demonstrate the growth that occurs in the present invention. Here the AlGaN nanowires are directly grown on sapphire substrate. The nanowires have uniform morphology and same in-plane orientation. Corners face each other (FIG. 14a) or facets face each other (FIG. 14b). In contrast, FIG. 14c shows the nanowire structure that occurs when growth is effected directly on graphene using a silicon oxide mask. The nanowires have a non-uniform morphology and random in-plane orientation.
[0261] FIG. 15 (case 3.1) shows an embodiment in which the holes etched in the silicon oxide masking layer are larger than those etched in the graphene layer. This exposes the graphene layer below to allow a better electrical contact to be made with the axial and/or radial heterostructured nanowires, especially in the context of radial nanowire core-shell type device structures.
[0262] FIG. 16 (case 3.2) is analogous to FIG. 15, but with nanopyramids.
EXAMPLES
Experimental Procedure of Growing Positioned AlGaN NWs/NPs.
[0263] Graphene was grown by CVD on Cu foil and subsequently transferred onto sapphire (0001) substrates (for the growth shown in FIGS. 5, 12 and 14) or AlN/sapphire (0001) substrates (for the growth shown in FIG. 7) for the experiments. A silicon oxide (SiO.sub.2) mask layer of thickness 30-50 nm was deposited on the graphene layer for the experiments shown in FIGS. 12 and 14. Electron-beam lithography was used for the hole patterning. The SiO.sub.2 mask layer and the graphene layer was etched by a combination of wet and dry etching (for the experiments in FIGS. 12 and 14) whereas the graphene layer was etched by dry etching (for the experiments in FIGS. 5 and 7). This process exposes the sapphire substrate (for the growth shown in FIGS. 5, 12 and 14) or AlN-template surface (for the growth shown in FIG. 7) in the hole. The nanowire/nanopyramid growth was carried out in an MOCVD reactor. Trimethylaluminum (TMAl), trimethylgallium (TMGa), and ammonia (NH.sub.3) were used as precursors for Al, Ga, and N, respectively. Silane was supplied during the growth of the n-AlGaN (for the growth shown in FIGS. 5a, 12a and 14) or n-GaN (for the growth shown in FIGS. 7a and 7c) NWs/NPs for n-type doping. For growing the full LED structures after growing the n-AlGaN/n-AlGaN (for the growth shown in FIGS. 5b and 12b) or n-GaN/n-AlGaN (for the growth shown in FIG. 7b) NWs/NPs, an intrinsic GaN active layer followed by p-AlGaN and p-GaN layers were grown. Bis-cyclopentadienyl magnesium (Cp.sub.2Mg) was used as the precursor for Mg for the p-type doping. Mg dopants were activated by an annealing process under N.sub.2 ambient.
Comparison of NW Growth Directly on Graphene Vs on Sapphire.
[0264] FIG. 14(a) shows top-view SEM image of the same positioned AlGaN NWs as in FIG. 12(a). Here the corners of the hexagonal NWs are facing each other. FIG. 14(b) shows top-view SEM image of positioned AlGaN NW using the same growth condition as in FIG. 14(a) but the hole pattern was rotated by 30° with respect to the in-plane sapphire surface orientation during electron beam lithography. Here the edges of the hexagonal NWs are facing each other. In both cases (FIG. 14(a,b)), NWs are uniform and have the same in-plane orientation. To compare the NWs grown directly on sapphire with the NWs grown directly on graphene, one additional hole pattern sample was prepared. In this case, graphene was not etched in the holes, i.e. the sapphire substrate was not exposed in the holes. FIG. 14(c) shows top-view SEM image of AlGaN NWs grown directly on graphene using the same growth condition as in FIG. 14(a,b). It can be seen that the NWs are non-uniform and have random in-plane orientation.
