Motor drive

Abstract

A motor drive comprises a rectifier circuit portion arranged to receive an externally supplied AC voltage and to generate a DC bus voltage. An inverter circuit portion is arranged to receive the DC bus voltage (V.sub.DC_Bus) and to generate an AC output voltage (V.sub.out) for supply to an external load. A DC bus portion is connected between the rectifier and the inverter. An inductor (L.sub.1) is connected in series along a bus conductor between the rectifier and inverter, and a DC link capacitor (C.sub.1) is connected in parallel between the bus conductors. A voltage across the DC link capacitor (C.sub.1) is input to a tuneable notch filter arranged to supply a filtered signal. A controller varies the resonant frequency of the notch filter to a plurality of values across an operational range and modulates a supply current provided by the inverter with a probe current signal at the resonant frequency.

Claims

1. A motor drive comprising: a rectifier circuit portion arranged to receive an externally supplied AC voltage and to generate a DC bus voltage therefrom; an inverter circuit portion arranged to receive the DC bus voltage and to generate an AC output voltage therefrom for supply to an external load; a DC bus portion connected between said rectifier and inverter circuit portions, said DC bus portion comprising first and second conductors, wherein an inductor is connected in series along the first conductor between said rectifier and inverter circuit portions, and wherein a DC link capacitor is connected in parallel between the first and second conductors; a notch filter having a tuneable resonant frequency, wherein a voltage across the DC link capacitor is input to the notch filter, the notch filter being arranged to supply a filtered signal; and a controller arranged to vary the resonant frequency of the notch filter and to modulate a supply current provided by the inverter circuit portion with a probe current signal at the resonant frequency; wherein the controller is arranged to vary the resonant frequency to a plurality of values across an operational range, to measure an amplitude of the filtered signal, to determine which of the plurality of values of the resonant frequency has a maximal amplitude of the filtered signal associated therewith, and to determine a capacitance value of the DC link capacitor from said value of the resonant frequency associated with the maximal amplitude.

2. The motor drive as claimed in claim 1, wherein the controller determines the capacitance value during a power-up procedure of the motor drive.

3. The motor drive as claimed in claim 1, wherein the controller generates an alert when the determined capacitance of the DC link capacitor differs from a target value by more than a threshold amount.

4. The motor drive as claimed in claim 1, wherein the controller is arranged to compare the determined capacitance value to a stored capacitance value and determine a difference between said determined and stored capacitance values.

5. The motor drive as claimed in claim 4, wherein the controller is arranged to compare the determined capacitance value to a plurality of stored capacitance values or a stored capacitance trend.

6. The motor drive as claimed in claim 1, wherein the DC bus portion comprises a voltage sensor arranged to produce a sense signal dependent on a voltage between the inductor and the DC link capacitor.

7. The motor drive as claimed in claim 6, wherein the voltage sensor comprises a potential divider connected between the inductor and DC link capacitor, and wherein the node is connected between first and second resistors of the potential divider.

8. The motor drive as claimed in claim 7, wherein the potential divider is connected in parallel across the first and second conductors.

9. The motor drive as claimed in claim 1, wherein the notch filter comprises: a first low pass filter block arranged to remove a DC component of a voltage at the input of the notch filter to produce an AC component; a forward rotation vector block arranged to generate a first vector having a first element set to zero and a second element set to the AC component, and to recalculate said vector in a reference frame rotating at the resonant frequency of the notch filter, thereby generating a second vector; a second low pass filter block arranged to filter a first element and a second element of second vector, thereby generating a third vector; and a backward rotation vector block arranged to recalculate the third vector in a stationary reference frame, thereby generating a fourth vector; wherein a second element of the fourth vector is output as the filtered signal.

10. The motor drive as claimed in claim 9, wherein the first, second, third, and fourth vectors are two-dimensional vectors.

11. The motor drive as claimed in claim 9, wherein the first element of each vector is an x-component and the second element of each vector is a y-component.

12. The motor drive as claimed in claim 1, wherein the external load comprises a motor, optionally wherein the motor is arranged to drive an actuator.

13. The motor drive as claimed in claim 1, wherein the supply current provided by the inverter is generated by a cascaded current control loop arrangement.

14. A method of operating a motor drive comprising: a rectifier circuit portion and an inverter circuit portion having a DC bus portion connected therebetween, said DC bus portion comprising first and second conductors, wherein an inductor is connected in series along the first conductor between said rectifier and inverter circuit portions, and wherein a DC link capacitor is connected in parallel between the first and second conductors; and a notch filter having a tuneable resonant frequency, wherein a voltage across the DC link capacitor is input to the notch filter, the notch filter being arranged to supply a filtered signal; wherein the method comprises: receiving an externally supplied AC voltage and to generate a DC bus voltage therefrom using the rectifier circuit portion; receiving the DC bus voltage and generating an AC output voltage therefrom using the inverter circuit portion; supplying the AC output voltage to an external load; varying the resonant frequency of the notch frequency; modulating a supply current provided by the inverter circuit portion with a probe current signal at the resonant frequency; varying the resonant frequency to a plurality of values across an operational range; measuring an amplitude of the filtered signal; determining which of the plurality of values of the resonant frequency has a maximal amplitude of the filtered signal associated therewith; and determining a capacitance value of the DC link capacitor from said value of the resonant frequency associated with the maximal amplitude.

15. The motor drive as claimed in claim 1, wherein the controller is arranged to store the determined capacitance value in the memory and/or to retrieve the stored capacitance value from memory.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

(1) Certain examples of the present disclosure will now be described with reference to the accompanying drawings, in which:

(2) FIG. 1 is a schematic diagram of a motor drive system in accordance with an example of the present disclosure;

(3) FIG. 2 is a block diagram of a notch filter for use in the motor drive system of FIG. 1;

(4) FIG. 3 is a graph of a DC voltage vector in the rotating reference frame;

(5) FIG. 4 is a graph of a filtered trajectory of the vector of FIG. 3;

(6) FIG. 5 is a graph of the filtered trajectory of FIG. 4 translated back to a stationary reference frame;

(7) FIG. 6 is a graph of the transient filter response;

(8) FIG. 7 is a graph of the steady-state filter response;

(9) FIG. 8 is a block diagram of the capacitance monitor portion used in the motor drive system of FIG. 1;

(10) FIGS. 9A and 9B are vector plots illustrating a Clarke transform;

(11) FIGS. 10A and 10B are vector plots illustrating a Park transform; and

(12) FIG. 11 is a graph illustrating a PWM modulation scheme.

DETAILED DESCRIPTION

(13) FIG. 1 is a schematic diagram of a motor drive system 2 in accordance with an example of the present disclosure. The motor drive system 2 includes a front-end rectifier 4 and a power inverter 6, which are connected by a DC bus 8.

(14) The front-end rectifier 4 is arranged to receive an externally supplied AC voltage Vsupply, which in this example is a three-phase AC input voltage. The rectifier 4 converts this AC voltage Vsupply to a DC bus voltage VDC_Bus which is transferred to the inverter 6 across the DC bus 8, the details of which are discussed in more detail below. It will be appreciated that other arrangements are possible, e.g. in which the rectifier 4 receives a single-phase input. Thus the rectifier 4 is an AC-to-DC converter (ADC).

(15) The inverter 6 takes the DC bus voltage VDC_Bus and converts it back to an AC output voltage Vout suitable for supply to the connected load. In this example, the inverter 6 supplies the output voltage Vout to a motor 10, which in turn is arranged to drive an actuator 12. In this example, the output voltage Vout provided to the motor 10 is a three-phase voltage suitable to drive the three-phase motor 10. It will be appreciated that other arrangements are possible, e.g. in which the inverter 6 produces a single-phase output. Thus the inverter 6 is a DC-to-AC converter (DAC).

(16) The DC bus 8 includes a protective arrangement 14 constructed from a resistor R1 connected in parallel with a thyristor D1. This resistor R1 serves to limit the inrush current during DC link pre-charge immediately after the input power supply is switched on. The thyristor D1 provides a bypass around the resistor R1 after the end of the pre-charge in order to limit power losses of the motor drive system 2.

(17) The output of the protective arrangement 14 is connected to a terminal of an inductor L1 which is arranged in series along the positive conductor 16 of the DC bus 8. The other terminal of the inductor L1 is connected to the input of the inverter 6.

(18) A DC link capacitor C1 is connected in parallel between the positive conductor 16 and the negative conductor 17 of the DC bus 8. This DC link capacitor C1 serves to smooth the DC bus voltage VDC_Bus output of the front-end rectifier 4. The DC link capacitor also protects upstream circuits from the transient response of downstream circuits.

(19) A potential divider is connected in parallel to the DC link capacitor C1 between the positive conductor 16 and the negative conductor 17 of the DC bus 8. The potential divider is constructed from a pair of resistors R2, R3, having a node 18 connected between them. This node 18 is connected to a capacitance monitor portion 20, as explained in further detail below.

(20) A pair of transistors T1, T2 and a resistor R4 are provided for operation of the motor in its ‘regenerative mode’ which may, for example, be used when the motor is working to slow down the mechanical actuator. In this case, kinetic energy is converted to electrical energy which is transferred to the capacitor as electrical charge. In other words, the motor operates as a generator in such situations. In order to protect the system from the capacitor voltage increasing to potentially dangerously high levels, the two additional transistors T1, T2 are switched on to allow the excess capacitor charge to discharge across the so-called ‘brake resistor’ R4.

(21) The capacitance monitor portion 20 includes a DC Voltage ADC interface 22, a tuneable notch filter 24, an PBIT controller 26, an NVM interface 28, and a current control loop 30. It will be appreciated that the ‘capacitance monitor portion’ 20 is a collective term for the components used to detect degradation of the DC link capacitor C1 and is used for the purposes of explanation only. Some or all of the components in this portion 20 may be wholly separate components (i.e. physically distinct), or may be integrated within the same component, e.g. implemented as functions of a microprocessor, application specific integrated circuit (ASIC), field-programmable gate array (FPGA), etc., as appropriate. In preferred examples, the use of discrete physical components is minimised and ideally avoided in order to reduce the cost and complexity of the system.

(22) The DC Voltage ADC interface 22 is connected to the node 18 between the potential divider resistors R2, R3, and thus receives a voltage that is proportional to the voltage at the node 32 between the inductor L1 and the DC link capacitor C1, in accordance with the ratio between the resistances of the potential divider resistors R2, R3. This DC Voltage ADC interface 22 converts the analogue voltage at the node 18 to a digital value supplied to the notch filter 24. In practice, this DC Voltage ADC interface 22 may form part of the notch filter 24 or may be an existing logic block within the motor drive, however it is shown as a discrete block in FIG. 1 for ease of reference. This ADC interface 22 may, in general, be an existing ADC interface already present within an otherwise-conventional motor drive that can be repurposed for the purposes of the present disclosure.

(23) The notch filter 24 is tuneable across an operating range of frequencies around the nominal resonant frequency of the LC circuit comprising the inductor L1 and the DC link capacitor C1, assuming no degradation of the DC link capacitor C1. The resonant frequency of the notch filter 24 is controlled in steps by the PBIT controller 26 as explained in further detail below. Essentially, the notch filter 24 is a highly selective filter (i.e. it has a relatively narrow pass band, potentially of only several Hertz) that outputs a signal having a magnitude dependent on the magnitude of frequency components of the signal at its input that fall within the notch filter's pass band.

(24) The PBIT controller 26 receives the output of the notch filter 24 and controls the frequency sweep-based test of the motor drive 2. The controller 26 provides a modulating, sinusoidal AC current to the current control loop 30, which uses this signal to determine a voltage demand which is subsequently PWM modulated and provided to the inverter 6. The current control loop 30 modulates a steady state current ID that, in this example, is the steady state D-axis current ID* supplied to the motor 10.

(25) The provision of PWM switching patterns provided to the inverter 6 gives rise to an alternating voltage across the motor and a corresponding alternating current the DC link capacitor C1, i.e. it indirectly supplies an AC input to the LC resonator within the DC bus 8. As a result, the magnitude of the voltage at the node 18 will vary in response to this indirectly injected AC input to the LC resonator. The magnitude of the voltage at the node 18 will depend on the capacitance of the DC link capacitor C1, which will in turn affect the cut-off frequency of the LC resonator.

(26) The PBIT controller 26 steps through a number of different resonant frequency values, wherein for each step, the frequency of the modulating current Imod applied to the current control loop 30 and the tuned frequency of the notch filter 24 are updated to the same value.

(27) The magnitude of the output of the notch filter 24 is observed by the PBIT controller 26 for each frequency step and may be stored in a NVM 34 via the NVM interface 28. While sweeping through the frequencies, the PBIT controller 26 determines which of the frequency settings gives rise to the greatest magnitude at the output of the notch filter 24, thereby determining the approximate resonant frequency of the LC resonator within the DC bus 8.

(28) Once the approximate resonant frequency of the LC resonator within the DC bus 8 is determined, the PBIT controller 26 may then determine the capacitance of the DC link capacitor C1 using the relationship described previously with reference to Equation 2. Depending on the determined capacitance value, the PBIT controller 26 may raise an alert (e.g. if the capacitance value has deviated from its intended value by more than a threshold amount) indicating that replacement or repair of the DC link capacitor C1 (or if necessary part or all of the motor drive 2) is required.

(29) The PBIT controller 26 may also compared the determined capacitance value to one or more previously determined capacitance values stored in the NVM 34 to determine a rate of change of the capacitance and to determine approximately when replacement or repair may be necessary, even if it is not currently required.

(30) The construction of a suitable notch filter 24 can be seen in FIG. 2, and the operation of this filter 24 may be understood with reference to FIGS. 3 to 7.

(31) The notch filter 24 comprises a first low pass filter block 36 that is arranged to receive the voltage from the node 18 between the resistors R2, R3 of the potential divider via the DC Voltage ADC interface 22. This low pass filter block 36 produces an ‘average’ Vdc of the voltage presented at its input (i.e. the DC component of the voltage from the node 18), which is then subtracted from the voltage from the node 18, i.e. the voltage Vcap across DC link capacitor C1, thereby leaving only the AC component of the voltage from the node 18.

(32) A forward rotation vector block 38 is arranged to generate a first vector

(33) $\left(\begin{array}{c}0\\ V_{cap}-V_{\mathrm{dc}}\end{array}\right)$
having an x-coordinate set to zero and a y-coordinate set to the AC component resulting from the subtraction of the average Vdc from the voltage Vcap across DC link capacitor C1.

(34) This forward rotation vector block 38 then recalculates this vector in a reference frame rotating at the resonant frequency of the notch filter, thereby generating a second vector, in accordance with Equation 3:

(35) $\begin{array}{cc}\left(\begin{array}{c}{V}_x^{rot}\\ V_y^{rot}\end{array}\right)=\left(\begin{array}{cc}\cos \omega t& \sin \omega t\\ -\sin \omega t& \cos \omega t\end{array}\right)\left(\begin{array}{c}0\\ V_{\mathrm{cap}}-V_{\mathrm{dc}}\end{array}\right)\mathrm{Rotation}\mathrm{performed}\mathrm{by}\mathrm{the}\mathrm{forward}\mathrm{rotation}\mathrm{vector}\mathrm{block}38& \mathrm{Equation}3\end{array}$

(36) The trajectory of this vector

(37) $\left(\begin{array}{c}{V}_x^{rot}\\ V_y^{rot}\end{array}\right)$
can be seen in FIG. 3, which is a graph of the voltage vector in the rotating reference frame. The ‘flower-like’ pattern that can be seen is a result of the rotating frame of reference. It will be appreciated that the angular frequency ω referred to with reference to FIGS. 3 to 7 is the angular frequency corresponding to the current resonant frequency value f as set by the PBIT controller 26, and may be calculated as ω=2πf.

(38) A second low pass filter block 39—which in this implementation is constructed from two separate low pass filters 40, 42 but could comprise a single filter block in other examples—is arranged to filter the x- and y-components of the second vector, i.e. the output of the forward rotation vector block 38, thereby generating a third vector

(39) $\left(\begin{array}{c}{V}_x^{filt}\\ V_y^{filt}\end{array}\right).$
The trajectory of this third filtered vector can be seen in FIG. 4. It should be noted that the filters 40, 42 attenuate the magnitude of the vector by half, however this is compensated for later as outlined below.

(40) A backward rotation vector block 44 is arranged to recalculate the third vector in the stationary reference frame, thereby generating a fourth vector, in accordance with Equation 4:

(41) $\begin{array}{cc}\left(\begin{array}{c}{V}_x^{stat}\\ V_y^{stat}\end{array}\right)=\left(\begin{array}{cc}\cos \omega t& -s\mathrm{in}\omega t\\ \sin \omega t& \cos \omega t\end{array}\right)\left(\begin{array}{c}{V}_x^{filt}\\ V_y^{filt}\end{array}\right)\mathrm{Rotation}\mathrm{performed}\mathrm{by}\mathrm{the}\mathrm{backward}\mathrm{rotation}\mathrm{vector}\mathrm{block}44& \mathrm{Equation}4\end{array}$

(42) The trajectory of this vector

(43) $\left(\begin{array}{c}{V}_x^{stat}\\ V_y^{stat}\end{array}\right)$
can be seen in FIG. 5, which is a graph of the voltage vector in the station reference frame. The ‘flower-like’ pattern that can be seen is a result of the rotating frame of reference.

(44) The y-component V.sub.y.sup.stat of the fourth vector is output as the filtered signal, i.e. the resonant voltage amplitude for the current frequency as set by the PBIT controller 26 is extracted from V.sub.y.sup.stat Finally an amplifier 46 multiplies the magnitude of the V.sub.y.sup.stat by two (i.e. it doubles the magnitude) in order to compensate for the attenuation referred to above.

(45) The length of the transient response increases with decreasing filter bandwidth. The transient response can be adjusted by selecting the order of the low-pass filters 40, 42. Where first order low pass filters are used, these may provide transient responses in the order of tens of milliseconds for a bandwidth of 20 Hz as illustrated by FIG. 6. The steady-state filter response can be seen in FIG. 7.

(46) A shorter transient time can be achieved with second order low-pass filters, where mathematical complexity is traded off for a faster response time.

(47) Those skilled in the art will readily appreciate the respective functions of the other components of the capacitance monitor portion 20. However, for reference, the capacitance monitor portion 20 also includes a phase current ADC interface 48; a Clarke transform block 50; a Park transform block 52. The structure of these elements may be understood with reference to FIG. 8, in which some of the functional blocks are broken down into simpler functional blocks for ease of reference.

(48) The phase current ADC interface 48 is a functional block which reads the values of the three motor phase currents from A/D Converters connected to analogue current sensors.

(49) The Clarke transform block 50 is a functional block which calculates a so-called ‘stator current space vector’. Those skilled in the art will appreciate that this ‘space vector’ is a generally understood term in the field of motor control theory which applies to any set of three quantities such as three phase currents, three phase voltages, three magnetic fluxes, etc. The original quantities (currents, voltages, or magnetic fluxes as appropriate) are scalar but they are associated with three basis vectors arranged 120° apart around the origin of a two-dimensional space. Positive scalars are transformed into vectors in the direction of the associated basis vector, whereas negative scalars produce opposite vectors. The final ‘space vector’ is the sum of these three scalars-converted-to-vectors, as can be seen in FIG. 9A.

(50) The space vector is algebraically represented in a coordinate system (α, β), as can be seen in FIG. 9B. The vector is also rescaled such that the length of the space vector is equal to the amplitude of the motor phase currents or voltages or fluxes. The resulting equations for the Clarke transform are given as per Equation 5 below:

(51) $\begin{array}{cc}\{\begin{array}{c}{I}_{\alpha }=I_a\\ I_{\beta }=\frac{I_b-I_c}{\sqrt{3}}\end{array}\mathrm{Clarke}\mathrm{Transform}& \mathrm{Equation}5\end{array}$

(52) The Park transform block 52 is a functional block which recalculates the current space vector from the (α, β) coordinates into (d, q) coordinate system which is aligned to the magnetic field of the rotor and it rotates synchronously with the rotor, as can be seen in FIGS. 10A and 10B, where the equations for the Park transform are given as per Equation 6 below:

(53) 0$\begin{array}{cc}\left(\begin{array}{c}{I}_d\\ I_q\end{array}\right)=\left(\begin{array}{cc}\cos \theta & \sin \theta \\ -s\mathrm{in}\theta & \cos \theta \end{array}\right)\left(\begin{array}{c}{I}_{\alpha }\\ I_{\beta }\end{array}\right)\mathrm{Park}\mathrm{Transform}& \mathrm{Equation}6\end{array}$

(54) The current control loops 30 include two PI controllers 54, 56. The first PI controller 54 is arranged to control the d-axis current component I.sub.d and the other PI controller 56 is arranged to control the q-axis current component I.sub.q. These PI controllers 54, 56 determine the appropriate current error (i.e. the difference between set point and measured current) and produce corresponding voltage demands V.sub.d_dem and V.sub.q_dem respectively.

(55) An Inverse Park transform block 58 changes the coordinates of voltage space vector (V.sub.d_dem, V.sub.q_dem) to (V.sub.α_dem, V.sub.β_dem) as per Equation 7 below:

(56) $\begin{array}{cc}\left(\begin{array}{c}{I}_{\alpha }^{\mathrm{dem}}\\ I_{\beta }^{\mathrm{dem}}\end{array}\right)=\left(\begin{array}{cc}\cos \theta & -s\mathrm{in}\theta \\ \sin \theta & \cos \theta \end{array}\right)\left(\begin{array}{c}{I}_d^{\mathrm{dem}}\\ I_q^{\mathrm{dem}}\end{array}\right)\mathrm{Inverse}\mathrm{Park}\mathrm{Transform}& \mathrm{Equation}7\end{array}$

(57) An Inverse Clarke transform block 60 converts the space vector (V.sub.α_dem, V.sub.β_dem) to individual phase voltage demands V.sub.a_dem, V.sub.b_dem, V.sub.c_dem as per Equation 8 below:

(58) $\begin{array}{cc}\{\begin{array}{c}{V}_a^{\mathrm{dem}}=V_{\alpha }^{\mathrm{dem}}\\ V_b^{\mathrm{dem}}=-\frac{V_{\alpha }^{\mathrm{dem}}}{2}+\frac{\sqrt{3}}{2}{V}_{\beta }^{\mathrm{dem}}\\ V_c^{\mathrm{dem}}=-\frac{V_{\alpha }^{\mathrm{dem}}}{2}-\frac{\sqrt{3}}{2}{V}_{\beta }^{\mathrm{dem}}\end{array}\mathrm{Inverse}\mathrm{Clarke}\mathrm{Transform}& \mathrm{Equation}8\end{array}$

(59) A PWM modulator 62 transforms the individual phase voltage demands into pulse-width modulation patterns, where an illustrative example of a basic PWM modulation scheme can be seen in FIG. 11.

(60) Also provided is a resolver interface 64 which is a functional block that calculates motor speed and rotor angular position based on the feedback signals provided by a position sensor, in this case a resolver 66 (which is connected to the interface 64 via an ADC interface 68). The two feedback signals are typically named ‘Sin’ and ‘Cos’ because the corresponding signals are amplitude-modulated signals with amplitudes proportional to the sine and the cosine of the rotor angle. The resolver interface 64 performs the demodulation of the resolver feedback signals to extract speed and position information. The resolver interface 64 is connected to the ADC 68 which receive the analogue Sin and Cos signals from the resolver 66.

(61) Thus it will be appreciated that examples of the present disclosure provide an improved motor drive system and method of operating the same in which the capacitance of the DC link capacitor is determined by performing a frequency sweep to probe the resonant frequency of the effective resonant circuit and thereby determine the current level of degradation of the DC link capacitor. In some examples, dangerous capacitance drops due to dielectric breakdown may be detected very early, and potentially immediately. Also provided herein is a novel notch filter and associated method.

(62) The logical functions used by the components (e.g. the filtering and rotation functions used by the notch filter) may, in some examples, already be otherwise present in a conventional motor drive and thus may advantageously require no additional hardware to implement. The present disclosure may therefore provide yet further volume and weight savings which is advantageous for e.g. aerospace applications.

(63) Extraction of general capacitor degradation trends across all units of a whole aircraft fleet may be achieved, which may be useful for analysing reliability and in-service problems. Furthermore, early detection of capacitor degradation may help to schedule maintenance operations for particular units.

(64) While specific examples of the disclosure have been described in detail, it will be appreciated by those skilled in the art that the examples described in detail are not limiting on the scope of the disclosure.