Advanced solder alloys for electronic interconnects
11411150 · 2022-08-09
Assignee
Inventors
- Morgana de Avila Ribas (Bangalore, IN)
- Pritha Choudhury (Bangalore, IN)
- Siuli Sarkar (Bangalore, IN)
- Ranjit Pandher (Plainsboro, NJ, US)
- Nicholas G Herrick (Edison, NJ, US)
- Amit Patel (East Brunswick, NJ, US)
- Ravindra M Bhatkal (East Brunswick, NJ, US)
- Bawa Singh (Marlton, NJ, US)
Cpc classification
H01L2224/29294
ELECTRICITY
H01L2933/0066
ELECTRICITY
C22C13/02
CHEMISTRY; METALLURGY
H01L2924/20106
ELECTRICITY
H01L33/647
ELECTRICITY
H01L33/62
ELECTRICITY
H01L2924/00014
ELECTRICITY
B23K35/262
PERFORMING OPERATIONS; TRANSPORTING
B23K1/002
PERFORMING OPERATIONS; TRANSPORTING
B23K1/0016
PERFORMING OPERATIONS; TRANSPORTING
B23K1/0056
PERFORMING OPERATIONS; TRANSPORTING
International classification
B23K35/26
PERFORMING OPERATIONS; TRANSPORTING
B23K1/08
PERFORMING OPERATIONS; TRANSPORTING
B23K1/005
PERFORMING OPERATIONS; TRANSPORTING
B23K1/002
PERFORMING OPERATIONS; TRANSPORTING
B23K1/00
PERFORMING OPERATIONS; TRANSPORTING
C22C13/02
CHEMISTRY; METALLURGY
Abstract
Improved electrical and thermal properties of solder alloys are achieved by the use of micro-additives in solder alloys to engineer the electrical and thermal properties of the solder alloys and the properties of the reaction layers between the solder and the metal surfaces. The electrical and thermal conductivity of alloys and that of the reaction layers between the solder and the -metal surfaces can be controlled over a wide range of temperatures. The solder alloys produce stable microstructures wherein such stable microstructures of these alloys do not exhibit significant changes when exposed to changes in temperature, compared to traditional interconnect materials.
Claims
1. A lead-free solder alloy consisting of: (a) from greater than 3.6 to 10 wt. % silver; (b) from greater than 0 to 10 wt. % bismuth; (c) from greater than 0 to 3 wt. % copper; (d) from greater than 0 to 1.4 wt. % antimony; (e) from greater than 0 to 1 wt. % nickel; (f) the balance tin, together with any unavoidable impurities.
2. A soldered joint comprising a lead-free solder alloy consisting of: (a) from greater than 3.6 to 10 wt. % of silver; (b) from greater than 0 to 10 wt. % of bismuth; (c) from greater than 0 to 3 wt. % of copper; (d) from greater than 0 to 1.4 wt. % of antimony; (e) from greater than 0 to 1 wt. % of nickel; (f) the balance tin, together with any unavoidable impurities.
3. A method of soldering, the method comprising the steps of: a) applying a solder alloy to a substrate, wherein the solder is a lead free solder alloy according to claim 1; wherein the solder can be applied by wave soldering, Surface Mount Technology (SMT) soldering, die attach soldering, thermal interface soldering, hand soldering, laser and RF induction soldering, rework soldering, lamination, and combinations thereof.
4. The method according to claim 3, wherein the substrate is a printed circuit board, flexible substrate, a metal core circuit board, a leadframe, a direct bond copper on Al.sub.2O.sub.3 or AlN.
5. The method according to claim 3, wherein the substrate is an LED component, LED die, and LED package, a high power switch, a high power amplifier or any other electronic component.
6. The method according to claim 5, wherein the LED component exhibits less than 5% change in CCT over 1500 temperature cycles.
7. The method according to claim 3, wherein the solder alloy has a thermal conductivity drop of less than 10% when the temperature of the alloy reaches 150° C.
8. The method according to claim 3, wherein the electrical resistivity of the solder alloy increases less than 20% when the temperature of the alloy reaches 85° C.
9. The method according to claim according to claim 5, wherein the LED with the solder alloy applied exhibits at least 10% higher luminous efficacy compared to an LED with SAC305.
10. The method according to claim 5 wherein the LED with the solder alloy applied shows a smaller drop in luminous flux during temperature cycling compared to an LED with SAC305.
11. The method according to claim 5, wherein the solder is applied to the LED using die attach.
12. The lead-free solder alloy of claim 1, wherein the alloy has melting point of 200 to 222 ° C.
13. The solder alloy of claim 1, wherein the alloy is in the form of a stick, a solid or flux cored wire, a foil or strip, or a powder or paste (powder plus flux blend), or solder spheres for use in ball grid array joints or chip scale packages, or other pre-formed solder pieces, with or without a flux core or a flux coating.
Description
BRIEF DESCRIPTION OF THE DRAWINGS
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DETAILED DESCRIPTION OF THE PREFERED EMBODIMENTS
(13) The invention relates to micro level additions to solder alloys to engineer the electrical and thermal properties for use in the manufacture of electronic components and devices, as well as in electronic assembly and packaging.
(14) The novel solder alloys allow for improved electrical properties in addition to improved thermal fatigue life of the die attach layer. The invention results in lower contact resistance in a die attach layer, lower change in contact resistance during operation and aging of the die attach layer, and higher efficiency of LEDs, especially during high power operation.
(15) The engineered microstructure of finer IMC particles in the solder alloy allows for more uniform distribution of the particles compared to SAC alloys. The smaller size of bulk IMCs and their uniform distribution lowers the electronic scattering at interface between IMCs and the adjoining layers.
(16) The engineered microstructure allows for slower growth of bulk IMCs, controlled interfacial IMC and slower change in microstructure during high temperature operation and temperature cycling. This leads to very little change or degradation in LED performance over its lifetime when the disclosed solder alloys are used to die attach LEDs.
(17) The novel solder alloys result in a lower coefficient of temperature dependence for electrical resistance. The alloys additionally result in a lower coefficient of temperature dependence for effective thermal resistance and effective thermal conductivity. The lower coefficient of temperature dependence for both electrical resistance and effective thermal resistance/conductivity results in lower drift in optical power, wavelength and efficiency of an LED.
(18) The preparation of the solder alloys includes solid solution strengthening whereby the crystalline lattice is distorted by addition of elements within the solubility limit. Aspects of the invention may further comprise methods such as grain refinement, precipitation strengthening and addition of diffusion modifiers. The solder alloy composition can be engineered such that the interfacial intermetallic results in overall improvement in thermal and electrical conductivity performance.
(19) The invention includes a family of interconnect materials compositions including solder alloy compositions that produce stable microstructures. These stable microstructure compositions do not exhibit significant changes when used (over time, operating temperature range, thermal cycling regime, and power loads etc.). Key metrics for evaluating microstructure properties, such as grain size, IMC thickness, creep properties (stress-strain hysteresis characteristics, etc.), and solder alloys, remain fairly constant when compared to traditional interconnect materials such as SAC 305.
(20) The stable microstructures exhibit stable thermal and electrical properties such as stable electrical resistance values. Stable electrical resistance values minimize variation in the output variable and yield stable outputs such as sustained electrical efficiency over time. This is important for use in power conversion devices. An example of such electrical efficiency is sustained lumen output (in case of LED and laser diodes) with minimal lumen depreciation over time.
(21) The invention uses a combination of micro level additions to the solder alloys to engineer the bulk solder microstructure. These additions are so small that that they do not have significant impact on the solder melting behavior but can have significant impact on other properties. New alloys are designed using a combination of solid solution strengthening, grain refinement, precipitate strengthening and diffusion modifiers.
(22) In solid solution strengthening, the crystalline lattice is distorted due to alloying elements addition within the solubility limit. Such lattice distortion generates stress fields that interact with dislocations present in the material. Strengthening arises from impeding dislocation motion, which prevents plastic deformation. Thus elements such as Bi and Sb are added to a Sn based matrix, up to the limit in which a new phase would form, strengthening the alloy microstructure. Since dislocation movement is interrupted by grain boundaries, reducing grain size limits the dislocation movement, which results in higher mechanical strength of the alloy. For example, Ge and rare earths are used for grain refinement of alloys. Similarly, in precipitation strengthening, alloying elements with lower solubility in the matrix form precipitated intermetallics. Such intermetallics desirably are uniformly distributed within the grains in the Sn matrix, pinning the dislocations and, consequently, improving the mechanical strength of the alloy. Examples of such additions are Ag, Cu, Ti, Co, Ni, Ce and Mn.
(23) The growth of interfacial IMC and interfacial voids can be controlled through addition of diffusion modifiers to the solder during the alloy development. Similarly, the mechanical properties of the bulk solder alloy can be controlled through the formation of intermetallics and microstructure refinement. The choice of which alloying element(s) to add depends on its relation with the alloy system and the resulting thermodynamics and kinetics properties. The invention shows that interfacial intermetallics are not only responsible for the actual bond between the solder and the substrate, but also can be designed to improve thermal and electrical conductivity.
(24) Although brittle in nature, intermetallics have a quite unique behavior when subjected to extended periods under high temperature condition. It is shown here that thermal and electrical conductivity can be improved under high temperature operation depending on the alloy that is used. It is also shown that a solder alloy composition can be engineered such that its interfacial intermetallics result in improved thermal and electrical conductivity. Cu6Sn5 and Cu3Sn intermetallics form at the interface between bulk solder alloy and copper substrate. The individual values of thermal conductivity and electrical resistivity values of alloy A, alloy B, SAC305, Cu6Sn5 and Cu3Sn are shown in Table 1. Cu3Sn has higher thermal conductivity and lower electrical resistivity than SAC305 bulk alloy. Thus, in the case of a solder joint, the interfacial intermetallics play an important role in achieving high thermal and electrical conductivity.
(25) TABLE-US-00001 TABLE 1 Thermal conductivity and electrical resistivity of alloys and intermetallics Thermal Conductivity Electrical Resistivity (W/mK) (μΩ .Math. cm) Alloy A 55.2 16.4 Alloy B 59.2 14.2 SAC305 64 11.8 Cu3Sn (Ref. 1) 70.4 8.8 Cu6Sn5 (Ref. 1) 34.1 17.5 Reference 1: H. P. FL Frederikse, R. J. Fields, and A. Feldman, “Thermal and electrical properties of copper-tin and nickel-tin intermetallics”. J. Appl. Phys. 72 (7), 1 Oct. 1992.
(26) The effect of high temperature storage at 175° C. on intermetallics thickness was investigated by evaluating solder joints on copper metallized dies, as shown in
(27) Both
(28) Change in Thermal Conductivity With Temperature:
(29) As shown in
(30) Change in Electrical Conductivity With Temperature:
(31) As shown in
(32) High-Power LED Performance:
(33) Forty-eight mid-power LEDs were assembled on flexible PET substrates using SAC305, Alloy A, and Alloy B as the package attach material (approximately 16 each). These LEDs were evaluated in an integrating sphere to measure their optical, electrical, and thermal performance. After initial analysis, the LEDs were placed in an air-to-air thermocycling chamber cycling from −40 to 125 C with a dwell time of 30 minutes. Every 250 thermocycles, up to 1500, these LEDs were removed and re-evaluated in the integrating sphere. Data reported here is absolute measured values and values normalized to each LED's pre-temperature cycling performance.
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(35) As shown in
(36) The change in flux output becomes even clearer when the normalized flux is compared for each set of LEDs as plotted in
(37) Similarly, luminous efficacy of these LEDs also shows higher value for LEDs assembled with Alloys A and B as compared SAC305. In addition, as shown in
(38) Another measure of LED performance is its Color Correlated Temperature (CCT) and its stability over the life of the LED.
(39) Alloy Examples:
(40) Examples of the inventive alloys are shown in Table 1 with the balance of each alloy being tin.
(41) TABLE-US-00002 Elements wt % Alloys Ag Bi Cu Ni Co Ge Mn Ti Ce In La Nd Sb Sn A 3.63 3.92 0.76 0.18 — — — — — — — — — balance B 3.81 3.94 0.8 0.25 — — — — 0.04 — — — — balance C 3.8 2.98 0.7 0.1 — — — 0.01 — — — — — balance D 3.85 3.93 0.68 0.22 — — — — 0.078 — — — — balance E 3.86 3.99 0.63 0.16 — — — 0.042 — — — — — balance F 3.82 3.96 0.6 0.16 0.042 — — — — — — — — balance G 3.9 3 0.6 0.12 — — 0.006 — — — — — — balance H 3.83 3.93 0.63 0.15 — 0.006 — — — — — — — balance I 4.2 3.99 0.63 0.18 — — — — — 3.22 — — — balance J 3.91 2.9 0.72 0.2 — — — — 0.04 — — — — balance K 3.87 3.02 0.61 0.14 — — — — — — 0.038 — — balance L 3.86 3.99 0.64 0.14 — — — — — — — 0.044 — balance M 3.94 3.92 0.7 0.12 0.023 — — — — — — — — balance N 3.72 5.1 0.52 0.1 — — — — — — — — — balance P 3.8 3 0.7 0.15 — — — — — — — — 1.4 balance
(42) The invention is generally disclosed herein using affirmative language to describe the numerous embodiments. The invention also specifically includes embodiments in which particular subject matter is excluded, in full or in part, such as substances or materials, method steps and conditions, protocols, procedures, assays or analysis. Thus, even though the invention is generally not expressed herein in terms of what the invention does not include aspects that are not expressly included in the invention are nevertheless disclosed herein.
(43) A number of embodiments of the invention have been described. Nevertheless, it will be understood that various modifications may be made without departing from the spirit and scope of the invention.