Semiconductor Layered Structure

Abstract

A semiconductor laminated structure includes a first buffer layer formed on a substrate, an insulating layer formed on the first buffer layer, a second buffer layer, an oxide layer formed on the second buffer layer, and a semiconductor layer formed on the oxide layer. The second buffer layer is formed by being regrown through an opening portion from a surface of the substrate which is exposed through the opening portion. A total thickness of the second buffer layer and the oxide layer is larger than a value obtained by multiplying a width of the opening portion by the square root of two (√{square root over (2)}).

Claims

1.-5. (canceled)

6. A semiconductor laminated structure, the structure comprising: a first buffer layer on a substrate, the first buffer layer comprising a first semiconductor having a different lattice constant in a plane direction from a lattice constant of the substrate; an insulating layer on the first buffer layer, the insulating layer including an opening portion therein; a second buffer layer in and above the opening portion, the second buffer layer extending upward from a surface of the first buffer layer that is exposed through the opening portion; an oxide layer on the second buffer layer and comprising an oxide of a semiconductor, wherein a total thickness of the second buffer layer and the oxide layer is larger than a value obtained by multiplying a width of the opening portion by the square root of two (√{square root over (2)}); and a semiconductor layer on the oxide layer, the semiconductor layer comprising a second semiconductor.

7. The structure according to claim 6, wherein the oxide layer comprises the oxide of the semiconductor on which crystal growth of the semiconductor layer is able to be performed.

8. The structure according to claim 6, wherein the substrate comprises Si.

9. The structure according to claim 6, wherein the first buffer layer and the second buffer layer comprise GaAs or InP.

10. The structure according to claim 6, wherein the oxide layer comprises AlAs, AlGaAs, AlAsSb, or an oxide of a compound semiconductor thereof.

11. A method of forming a semiconductor laminated structure, the method comprising: forming a first buffer layer on a substrate, the first buffer layer comprising a first semiconductor having a different lattice constant in a plane direction from a lattice constant of the substrate; forming an insulating layer on the first buffer layer; forming an opening portion in the insulating layer and exposing a surface of the first buffer layer; forming a second buffer layer in and above the opening portion, the second buffer layer extending upward from the exposed surface of the first buffer layer; forming an oxide layer on the second buffer layer, the oxide layer comprising an oxide of a semiconductor, wherein a total thickness of the second buffer layer and the oxide layer is larger than a value obtained by multiplying a width of the opening portion by the square root of two (2.sup.1/2); and forming a semiconductor layer on the oxide layer, the semiconductor layer comprising a second semiconductor.

12. The method according to claim 11, wherein the oxide layer comprises the oxide of the semiconductor on which crystal growth of the semiconductor layer is able to be performed.

13. The method according to claim 11, wherein the substrate comprises Si.

14. The method according to claim 11, wherein the first buffer layer and the second buffer layer comprise GaAs or InP.

15. The method according to claim 11, wherein the oxide layer comprises AlAs, AlGaAs, AlAsSb, or an oxide of a compound semiconductor thereof.

16. The method according to claim 11, wherein forming the first buffer layer on the substrate comprises growing GaAs on the substrate comprising Si.

17. The method according to claim 16, wherein forming the insulating layer comprises depositing SiO.sub.2 on the first buffer layer.

18. The method according to claim 17, wherein forming the opening portion in the insulating layer comprises patterning the insulating layer using a lithography technique and an etching technique.

19. The method according to claim 16, wherein forming the second buffer layer comprises performing crystal regrowth of the GaAs from the exposed surface of the first buffer layer using the insulating layer as a selective growth mask.

20. The method according to claim 11, wherein the second buffer layer, the oxide layer, and the semiconductor layer are formed in a mesa having a same shape as the opening portion when viewed in a plan view.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

[0024] FIG. 1 is a cross-sectional view illustrating a configuration of a semiconductor laminated structure according to an embodiment of the present invention.

[0025] FIG. 2A is a cross-sectional view illustrating a state during the manufacture of the semiconductor laminated structure according to an embodiment of the present invention.

[0026] FIG. 2B is a cross-sectional view illustrating a state during the manufacture of the semiconductor laminated structure according to an embodiment of the present invention.

[0027] FIG. 2C is a cross-sectional view illustrating a state during the manufacture of the semiconductor laminated structure according to an embodiment of the present invention.

[0028] FIG. 3 is a characteristic diagram illustrating a relationship between a width of an opening portion and a total thickness of a second buffer layer and an oxide layer.

DETAILED DESCRIPTION OF ILLUSTRATIVE EMBODIMENTS

[0029] Hereinafter, a semiconductor laminated structure according to an embodiment of the present invention will be described with reference to FIG. 1. The semiconductor laminated structure includes a first buffer layer 102 formed on a substrate 101, an insulating layer 103 formed on the first buffer layer 102, a second buffer layer 104, an oxide layer 105 formed on the second buffer layer 104, and a semiconductor layer 106 formed on the oxide layer 105.

[0030] The substrate 101 is formed of, for example, Si. The substrate 101 can be formed of, for example, sapphire (Al.sub.2O.sub.3). The first buffer layer 102 is formed of a semiconductor (first semiconductor) having a different lattice constant in a plane direction from the substrate 101. The first buffer layer 102 is formed of, for example, GaAs or InP. The insulating layer 103 is formed of, for example, SiO.sub.2. The insulating layer 103 can also be formed of an insulating material such as SiN, SiO.sub.x, or SiON.

[0031] The second buffer layer 104 is formed by being regrown through an opening portion 103a from the surface of the substrate 101 which is exposed through the opening portion 103a. The second buffer layer 104 is formed of the same semiconductor (first semiconductor) as the first buffer layer 102. The oxide layer 105 is formed of an oxide of a semiconductor. This semiconductor is a semiconductor on which crystal growth of the semiconductor layer 106 can be performed. The semiconductor layer 106 is formed of a second semiconductor. The semiconductor layer 106 is used to form an optical device.

[0032] Here, it is desirable to form the first buffer layer 102 and the second buffer layer 104 of the same semiconductor as the semiconductor layer 106. In addition, it is desirable to form the oxide layer 105 of an oxide of a semiconductor having a lattice constant in a plane direction which is substantially equal to that of the semiconductor layer 106. The oxide layer 105 can be formed of, for example, an oxide of a selectively oxidizable semiconductor containing, for example, Al or the like.

[0033] In addition, a total thickness T of the second buffer layer 104 and the oxide layer 105 is larger than a value obtained by multiplying a width W of an opening portion 103a by √{square root over (2)}.

[0034] Next, the manufacture of the semiconductor laminated structure according to an embodiment will be described with reference to FIGS. 2A to 2C.

[0035] First, as illustrated in FIG. 2A, the first buffer layer 102 is formed on the substrate 101. For example, the first buffer layer 102 can be formed by depositing (growing) GaAs on the substrate 101 by a well-known organic metal vapor phase growth method. The growth of GaAs can also be performed by a molecular beam epitaxy method. Subsequently, the insulating layer 103 is formed by depositing SiO.sub.2 on the first buffer layer 102 by, for example, a sputtering method, a CVD method, or the like. Next, the opening portion 103a penetrating the insulating layer 103 is formed by patterning the insulating layer 103 by a known lithography technique and etching technique.

[0036] Next, as illustrated in FIG. 2B, first, the second buffer layer 104 is formed by performing crystal regrowth of GaAs from the surface of the first buffer layer 102 which is exposed through the opening portion 103a by using the insulating layer 103 as a selective growth mask. The second buffer layer 104 is formed to have the same shape as the opening portion 103a when seen in a plan view. Subsequently, an oxide-layer-forming layer 105a is formed by performing crystal growth of AlGaAs on the second buffer layer 104. As described above, the oxide-layer-forming layer 105a is formed of a semiconductor on which crystal growth of the semiconductor layer 106 can be performed. Subsequently, the semiconductor layer 106 is formed by performing crystal growth of GaAs on the oxide-layer-forming layer 105a. The second buffer layer 104, the oxide-layer-forming layer 105a, and the semiconductor layer 106 are formed in a mesa having the same shape as the opening portion 103a when seen in a plan view. Crystal growth of the second buffer layer 104, the oxide-layer-forming layer 105a, and the semiconductor layer 106 can be performed by, for example, an organic metal vapor phase growth method or a molecular beam epitaxy method.

[0037] Next, the oxide-layer-forming layer 105a is oxidized (selectively oxidized) from the lateral surface thereof by, for example, a known vapor oxidation method or the like, and the oxide layer 105 is formed on the second buffer layer 104 as illustrated in FIG. 2C, which leads to a state where the semiconductor layer 106 is formed on the oxide layer 105. The oxide layer 105 is formed of Al(Ga)Ox. According to NPL 5, AlGaAs having an Al composition of 80% or more can be oxidized as described above. Thus, in a case where the oxide-layer-forming layer 105a is formed of AlGaAs, it is preferable that an Al composition be 80% or more.

[0038] Hereinafter, description will be given in more detail. In the semiconductor laminated structure according to an embodiment, it is considered that a large number of dislocations occur at an interface between the substrate 101 formed of Si and the first buffer layer 102 formed of GaAs due to a difference in a lattice constant in a plane direction (lattice mismatch) therebetween. In a GaAs layer having a plane orientation of (100) of a main surface which is formed (grown) on a substrate of single crystal Si having a plane orientation of 100 of a main surface, it is generally known that a dislocation having a (111) plane as a sliding surface is likely to occur. For this reason, as illustrated in FIG. 2C, a dislocation 131 occurring at an interface (GaAs/Si interface) between the substrate 101 and the first buffer layer 102 propagates to an upper layer at an angle of 54.7 degrees (aspect ratio of √{square root over (2)}:1) from the interface.

[0039] As described above, when the width of the opening portion 103a is W and a thickness from the bottom of the opening portion 103a to the top of the oxide layer 105, in other words, a total thickness of the second buffer layer 104 and the oxide layer 105, is T, it is important that “T>W×√{square root over (2)}” be satisfied in order to reduce a dislocation density in the semiconductor layer 106. This relationship is shown as a plot in FIG. 3.

[0040] As described above, according to embodiments of the present invention, a total thickness of a second buffer layer and an oxide layer formed from an opening portion of an insulating layer is made larger than a value obtained by multiplying the width of the opening portion by V, and thus it is possible to simply manufacture a semiconductor layer with a significantly reduced dislocation density and to suppress ascending movement of dislocation after the manufacture.

[0041] According to embodiments of the present invention, when a semiconductor laminated structure is formed, a semiconductor forming method, an insulating film forming method, a lithography technique, an etching technique, and an oxidation technique, which are generally used, may be preferably used, and particular manufacturing techniques and procedures are not required. A reduction in a dislocation density can be realized only by designing a simple structure specified by the expression “T>W×√{square root over (2)}”.

[0042] In addition, an amorphous oxide layer is formed below a semiconductor layer for forming an optical device. Thus, even when ascending movement of a dislocation occurs from an interface between a substrate and a first buffer layer during the operation of the device, it is possible to suppress propagation of the dislocation to the semiconductor layer.

[0043] Incidentally, in the above-described embodiment, a structure in which lattice mismatch occurs only between the substrate formed of Si and the first buffer layer formed of GaAs is formed, and the first buffer layer, the second buffer layer, the oxide-layer-forming layer which is an oxide layer, and the semiconductor layer are formed of semiconductors having substantially the same lattice constant. As long as the same relationship is satisfied, for example, the following combinations can be used for the substrate/the buffer layer (the first buffer layer, the second buffer layer)/the oxide-layer-forming layer/the semiconductor layer: Si/GaAs/AlAs/GaAs, Si/GaAs/AlGaAs/InGaP, Si/InP/AlAsSb/InP, Si/InP/AlAsSb/InGaAsP, Si/InP/AlAsSb/InGaAlAs, Si/InP/AlSb/InGaAs.

[0044] Meanwhile, a combination of the substrate/the buffer layer (the first buffer layer, the second buffer layer)/the oxide-layer-forming layer/the semiconductor layer is not limited to the above-described combinations. Further, in the above-described embodiments, each of the first buffer layer, the second buffer layer, the oxide-layer-forming layer which is an oxide layer, and the semiconductor layer is formed as a single layer. However, this is not limiting, and each of the layers can also be formed using a plurality of materials.

[0045] Meanwhile, embodiments of the present invention are not limited to the above-described embodiments, and it is apparent that various modifications and combinations can be made by those skilled in the art without departing from the spirit and scope of the invention.

REFERENCE SIGNS LIST

[0046] 101 Substrate [0047] 102 First buffer layer [0048] 103 Insulating layer [0049] 103a Opening portion [0050] 104 Second buffer layer [0051] 105 Oxide layer [0052] 106 Semiconductor layer