IMAGE SENSOR

Abstract

An image sensor that operates at high speed and high accuracy with low power consumption. A CMOS image sensor includes: a pixel unit including a plurality of pixels two-dimensionally arranged in a row direction and a column direction, each of the plurality of pixels including a sensor element configured to detect a physical amount existing in nature and to convert the physical amount into an electric signal; a resistance type digital-to-analog converter including a plurality of unit circuits connected in parallel to one another and configured to generate a ramp wave, each of the plurality of unit circuits including a resistor connected to an output end of a CMOS inverter; and an analog-to-digital conversion unit including a plurality of integral type analog-to-digital converters and configured to convert signals from the pixels into digital signals by comparing the signals from the pixels with the ramp wave.

Claims

1. An image sensor, comprising: a pixel unit including a plurality of pixels two-dimensionally arranged in a row direction and a column direction, each of the plurality of pixels including a sensor element configured to detect a physical amount existing in nature and to convert the physical amount into an electric signal; a resistance type digital-to-analog converter including a plurality of unit circuits connected in parallel to one another and configured to generate a ramp wave, each of the plurality of unit circuits including a resistor connected to an output end of a CMOS inverter; and an analog-to-digital conversion unit including a plurality of integral type analog-to-digital converters and configured to convert signals from the pixels into digital signals by comparing the signals from the pixels with the ramp wave, wherein when a time rate of change of a voltage of the ramp wave is varied, a prescribed offset value is input to the resistance type digital-to-analog converter.

2. The image sensor according to claim 1, wherein the resistance type digital-to-analog converter includes a high-order bit conversion unit and a low-order bit conversion unit, the high-order bit conversion unit including the unit circuits connected in parallel to one another for number corresponding to high-order bits, each of the unit circuits of the high-order bit conversion unit including the resistor having one end connected to the output end of the CMOS inverter and another end connected to an output end of the resistance type digital-to-analog converter, the low-order bit conversion unit including the unit circuits connected in parallel to one another for number corresponding to low-order bits, each of the unit circuits of the low-order bit conversion unit including the resistor having one end connected to the output end of the CMOS inverter and another end connected to a resistor between terminals.

3. (canceled)

4. The image sensor according to claim 1, wherein the resistance type digital-to-analog converter is provided at each of both ends of a signal line supplying the ramp wave to the analog-to-digital conversion unit.

5. (canceled)

6. The image sensor according to claim 1, wherein the time rate of change of the voltage of the ramp wave is varied a plurality of times with time, and the offset value is also varied based on variation of the time rate of change.

7. The image sensor according to claim 1, wherein the offset value is calculated based on a first standard voltage, a second standard voltage different from the first standard voltage, a first time point when the voltage of the ramp wave becomes the first standard voltage, and a second time point when the voltage of the ramp wave becomes the second standard voltage.

Description

BRIEF DESCRIPTION OF DRAWINGS

[0031] FIG. 1 is a block diagram illustrating a configuration of an image sensor according to a first embodiment of the present invention.

[0032] FIG. 2A is a circuit diagram illustrating a configuration example of a resistance type D/A converter 8 illustrated in FIG. 1, and FIG. 2B is a diagram illustrating an inverter 81 of the resistance type D/A converter 8.

[0033] FIG. 3 is a circuit diagram to determine a current consumption and a power consumption of the resistance type D/A converter 8 illustrated in FIG. 1.

[0034] FIG. 4 is a circuit diagram illustrating an equivalent circuit viewed from an output end of the resistance type D/A converter 8 illustrated in FIG. 1.

[0035] FIG. 5 is a graph illustrating a current consumption of a current type D/A converter and a current consumption and an average current consumption of a resistance type D/A converter, to an output voltage of a D/A converter.

[0036] FIG. 6 is a circuit diagram illustrating a D/A converter generating a ramp wave and a distributed RC circuit serving as a load.

[0037] FIG. 7 is a circuit diagram illustrating a distributed RC circuit and D/A converters driving the distributed RC circuit from both sides, in the image sensor according to the first embodiment of the present invention.

[0038] FIG. 8 is a circuit diagram illustrating an equivalent circuit of a D/A converter considering a load.

[0039] FIG. 9 is a block diagram illustrating a configuration of a resistance type D/A converter of an image sensor according to a second embodiment of the present invention.

[0040] FIG. 10 is a waveform diagram illustrating an output voltage of a resistance type D/A converter 28 illustrated in FIG. 9 and a voltage of a load circuit having a capacity, in a case where a prescribed offset value is added when a time rate of change of a voltage of a ramp wave is varied.

[0041] FIG. 11 is a waveform diagram illustrating an output voltage V.sub.DAC of the resistance type D/A converter and a voltage V.sub.out of the load circuit having a capacity, in a case where no correction value is added when the time rate of change is varied twice.

[0042] FIG. 12 is a waveform diagram illustrating the output voltage of the D/A converter and the voltage of the load circuit having the capacity, in a case where a time rate of change of the ramp wave is varied a plurality of times with time and the offset value is accordingly varied when the time rate of change of the voltage of the ramp wave is varied.

[0043] FIG. 13 is a diagram illustrating a configuration of a calibration circuit.

[0044] FIG. 14 is a diagram illustrating relationship of an output voltage, a standard voltage, and a time in the calibration circuit illustrated in FIG. 13.

[0045] FIG. 15 is a block diagram illustrating a configuration of a conventional CMOS image sensor.

[0046] FIG. 16 is a circuit diagram illustrating a basic configuration of an integral type A/D converter used for the CMOS image sensor.

[0047] FIG. 17 is a diagram illustrating a waveform of a ramp wave input to the integral type A/D converter.

[0048] FIG. 18 is a circuit diagram illustrating a current type D/A converter used for a conventional CMOS image sensor.

[0049] FIG. 19 is a circuit diagram illustrating a configuration of a unit current source of the current type D/A converter.

[0050] FIG. 20 is a diagram illustrating a waveform of a ramp wave in a case where a minute voltage section is swept a number of times.

[0051] FIG. 21 is a diagram illustrating an ideal waveform and an actual waveform of a ramp wave generated by using the D/A converter.

DESCRIPTION OF EMBODIMENTS

[0052] Some embodiments of the present invention are described in detail below with reference to accompanying drawings. Note that the present invention is not limited to the embodiments described below.

First Embodiment

[0053] First, an image sensor according to a first embodiment of the present invention is described. FIG. 1 is a block diagram illustrating a configuration of the image sensor according to the present embodiment. As illustrated in FIG. 1, an image sensor 10 according to the present embodiment includes a pixel unit 1 including a plurality of pixels 1a, an A/D conversion unit 5 converting pixel signals into digital signals, a resistance type D/A converter 8 supplying a ramp wave as a reference voltage to the A/D conversion unit 5, and the like. Thus, the image sensor 10 according to the present embodiment uses not a current type D/A converter but the resistance type D/A converter 8 as the D/A converter generating the ramp wave to be supplied to the A/D conversion unit 5.

[0054] For example, as with the CMOS image sensor illustrated in FIG. 15, the image sensor 10 according to the present embodiment may further include a vertical control circuit 2 controlling row access lines 3 connected to the pixels 1a, pixel signal lines 4 connected to the pixels 1a and transmitting the pixel signals to the A/D conversion unit 5, a horizontal control circuit 6 controlling output of the digital signals generated by the A/D conversion unit 5, an entire control circuit 7, a clock circuit 9, and the like.

[Pixel Unit 1]

[0055] In the pixel unit 1, the plurality of pixels 1a are two-dimensionally arranged in a row direction and a column direction. Each of the pixels 1a of the pixel unit 1 includes a sensor element that detects a physical amount existing in nature and converts the physical amount into an electric signal. The physical amount existing in nature includes visible light, infrared light, an ultraviolet ray, an X-ray, an electromagnetic wave, an electric field, a magnetic field, temperature, pressure, and the like.

[A/D Conversion Unit 5]

[0056] The A/D conversion unit 5 converts the pixel signals from the respective pixels 1a of the pixel unit 1, into the digital signals by performing comparison with the ramp wave from the resistance type D/A converter 8. The A/D conversion unit 5 includes a plurality of integral type A/D converters 5a.

[Resistance type D/A Converter 8]

[0057] FIG. 2A is a circuit diagram illustrating a configuration example of the resistance type D/A converter 8 illustrated in FIG. 1, and FIG. 2B is a circuit diagram of an inverter 81 of the resistance type D/A converter 8. In the resistance type D/A converter 8 illustrated in FIG. 2A, unit circuits are connected in parallel to one another. In each of the unit circuits, one end of a resistor is connected to an output terminal of the inverter 81. Further, a power supply of each of the inverters 81 of the resistance type D/A converter 8 uses a reference voltage V.sub.REF. In the resistance type D/A converter 8, input signals are input to a decoder circuit 82, and decoded signals are input to the inverters 81.

[0058] The resistance type D/A converter 8 includes, for example, a segment type D/A converter using a thermometer code for high-order 2 bits and a binary type D/A converter using an R-2R resistor ladder for low-order 2 bits, and operates as a 4-bit D/A converter. The segment type D/A converter configuring a high-order bit conversion unit includes unit circuits connected in parallel to one another, the number of the unit circuits corresponding to the number of high-order bits. In each of the unit circuits, the other end of the resistor is connected to an output end of the resistance type D/A converter 8.

[0059] In contrast, a low-order bit conversion unit performing conversion of low-order bits includes the binary type D/A converter using the R-2R resistor ladder. The binary type D/A converter includes unit circuits connected in parallel to one another, the number of the unit circuits corresponding to the number of low-order bits. In each of the unit circuits, one end of a resistor is connected to an output end of a CMOS inverter, and the other end of the resistor is connected to a resistor provided between terminals. In this case, an accurate output voltage can be obtained by setting resistance values to a ratio illustrated in FIG. 2A. Bit distribution between the high-order bits and the low-order bits can be appropriately set depending on an application and a specification; however, the high-order bits and the low-order bits are preferably set to the numbers of bits substantially equal to each other in terms of accuracy and an area.

[0060] As each of the inverters 81, for example, a CMOS inverter including an NMOS transistor and a PMOS transistor illustrated in FIG. 2B can be used. A transistor used for a conventional current type D/A converter is not a core transistor using a fine gate used for an internal logic, but an I/O transistor having a withstand voltage of about 3.3 V because the transistor is required to have a withstand voltage of at least 1.8 V. Therefore, the current type D/A converter is large not only in area but also in capacity, which makes it difficult to perform high-speed operation and increases the power consumption.

[0061] In contrast, the resistance type D/A converter 8 used for the image sensor 10 according to the present embodiment is required to have the transistor withstand voltage of only about 1.0 V to about 1.2 V. Therefore, for example, a fine core transistor that can minimize a channel length to 90 nm or less. As described above, the resistance type D/A converter can obtain sufficiently low on-resistance even by using a small transistor, which makes it possible to realize excellent linearity of the D/A converter. As a result, using the resistance type D/A converter makes it possible to reduce the occupied area and the power consumption of the D/A converter, and to accelerate the processing. Further, the D/A converter includes such a configuration, which makes it possible to considerably reduce the power consumption as compared with the conventional current type D/A converter.

[0062] FIG. 3 is a circuit diagram to determine the current consumption and the power consumption of the resistance type D/A converter 8, and FIG. 4 is a circuit diagram illustrating an equivalent circuit viewed from an output end of the resistance type D/A converter 8. As illustrated in FIG. 3, in the resistance type D/A converter 8, a conductance to the output end on the reference voltage V.sub.REF side can be denoted by Gx, and a conductance to the output end on an installation side can be denoted by G(1−x). At this time, the output resistance R.sub.L is represented by the following expression 3 and is constant.

#1 (where, 0<x<1)  [Expression 3]

[0063] Further, the output voltage V.sub.out is represented by the following expression 4, and is proportional to x.

V.sub.out=V.sub.REF.Math.x  [Expression 4]

[0064] Accordingly, as illustrated in FIG. 4, the output voltage V.sub.out can be varied while the output resistance R.sub.L is constant. Further, a current I flowing through a voltage source is represented by the following expression 5.

[Expression 5]

[0065] Accordingly, a power consumption Pc is represented by the following expression 6.

[Expression 6]

[0066] As a result, the current flowing through the resistance type D/A converter 8 becomes maximum at x=0.5, and the maximum current becomes ¼ of the current of the current type D/A converter represented by the above-described expression 1. Since the D/A converter used for the image sensor generates the ramp wave between zero to the reference voltage V.sub.REF, an average current I.sub.AVE is determined from the following expression 7.

[Expression 7]

[0067] Accordingly, the current consumption of the resistance type D/A converter that essentially generates the ramp wave is small like ⅙ of the current consumption of the current type D/A converter. Further, in the case of the current type D/A converter, a power supply voltage V.sub.DD is higher by about 0.6 V than the reference voltage V.sub.REF. Therefore, when the reference voltage V.sub.REF is set to 1.2 V and the power supply voltage V.sub.DD is set to 1.8 V, a power consumption ratio is calculated from the following expression 8.

[Expression 8]

[0068] FIG. 5 is a graph illustrating the current consumption of the current type D/A converter and the current consumption and the average current consumption of the resistance type D/A converter, to the output voltage of the D/A converter. As illustrated in FIG. 5 and the expression 8, using the resistance type D/A converter makes it possible to reduce the power consumption to 1/9 of the power consumption of the current type D/A converter even at the same output resistance.

[0069] In the CMOS image sensor, in order to capture an image of a dark scene with high quality, only a signal of about 0 mV to about 50 mV as illustrated in FIG. 20 is converted, and in some cases, to reduce noise, a plurality of times of sweeping by the ramp wave is performed and the signal is converted a number of times to determine an average value. In this case, when the amplitude is regarded as β times of a full scale, the current consumption of the resistance type D/A converter is represented by the following expression 9.

[Expression 9]

[0070] In the above-described expression 9, for example, when β is set to 0.05, β/2 is 0.025. The average current becomes extremely small current consumption that is 0.15 times of the current, described in the above-described expression 7, when full scale sweeping is performed.

[0071] In contrast, in the case of the current type D/A converter, the current is constant irrespective of the sweeping level. Therefore, such reduction of the current consumption is not performed. Accordingly, using the resistance type D/A converter for the CMOS image sensor is extremely beneficial in terms of reduction of the power consumption. Depending on cases, the D/A converter that sweeps partial voltage illustrated in FIG. 20 is provided instead of the D/A converter that performs full-scale sweeping; however, even when such a D/A converter is provided, using the resistance type D/A converter makes it possible to effectively suppress increase of the power consumption.

[0072] As illustrated in FIG. 15, in the CMOS image sensor, the output of the D/A converter is supplied to a number of comparators spatially distributed. FIG. 6 is a circuit diagram illustrating a D/A converter generating a ramp wave and a distributed RC circuit serving as a load. To be precise, a load circuit is an RC distributed constant circuit in which resistances and capacities are distributed as illustrated in FIG. 6. Therefore, a signal is delayed, and reduction of an amplitude occurs at a drive end of the D/A converter and an open end. At this time, when a resistance per unit length is denoted by R.sub.u, a capacity is denoted by C.sub.u, and a length is denoted by L, a standard time constant τ of the RC distributed constant circuit is represented by the following expression 10.

[Expression 10]

[0073] Influence is larger as the standard time constant τ is larger. FIG. 7 is a circuit diagram illustrating the distributed RC circuit and the D/A converters driving the distributed RC circuit from both sides, in the image sensor according to the present embodiment. In the image sensor 10 according to the present embodiment, the ramp waves may be supplied to the comparator from both sides as illustrated in FIG. 7. As a result, the length L of the RC distributed constant circuit for each of the D/A converter is equivalently ½. Therefore, the time constant is reduced to ¼, and the influence thereof can be reduced. As a result, it is possible to realize A/D conversion with higher accuracy and high-speed A/D conversion. Further, the load capacity of each of the D/A converter is equivalently ½, and the entire power consumption is hardly increased because the output resistance may be twice.

[0074] As described in detail above, the image sensor according to the present embodiment includes: the resistance type D/A converter that is configured by connecting, in parallel to one another, the unit circuits each including the resistor connected to the output end of the CMOS inverter, and generates the ramp wave; and the A/D conversion unit including the plurality of A/D converters converting signals from the pixels into digital signals by comparing the signals from the pixels with the ramp wave. Therefore, the image sensor according to the present embodiment can considerably reduce the power consumption as compared with the conventional CMOS image sensor.

Second Embodiment

[0075] Next, an image sensor according to a second embodiment of the present invention is described. FIG. 8 is a circuit diagram illustrating an equivalent circuit of the D/A converter considering a load. One of issues of the D/A converter provided in the CMOS image sensor is generation of the ramp wave at high speed. As illustrated in FIG. 21, in the D/A converter, an effectively-usable time range is limited by distortion of the waveform. Therefore, high-speed conversion is difficult. The cause thereof is presence of a capacity C.sub.L in the circuit as illustrated in FIG. 8. A response when the ramp wave is input to such a circuit is represented by the following expression 11.

V.sub.DAC(t)=kt  [Expression 11]

[0076] Further, when Laplace transform is performed on the voltage V.sub.out in the load circuit that receives the waveform represented by the above-described expression 11, the following expression 12 is obtained.

#1 (where, τ=R.sub.LC.sub.L)  [Expression 12]

[0077] Further, when inverse Laplace transform is performed on the above-described expression 12 to obtain a time response, the following expression 13 is obtained.

[Expression 13]

[0078] In the above-described expression 13, a first term represents an ideal ramp wave, and a second term represents a voltage error. The voltage error represents a response of a step wave. Therefore, the offset voltage V.sub.off is represented by the following expression 14.

V.sub.off=kτ  [Expression 14]

[0079] Therefore, it is found that application of the offset voltage V.sub.off represented by the above-described expression, when the output voltage of the D/A converter being varied, makes it possible to cancel the variation of the output voltage. FIG. 9 is a block diagram illustrating a configuration of a resistance type D/A converter in the image sensor according to the present embodiment. When the D/A converter generates the ramp wave, the image sensor according to the present embodiment does not perform addition or subtraction of a clock to/from a set initial value but performs addition or subtraction of a clock after adding a correction value (offset value) corresponding to the offset voltage V.sub.off represented by the above-described expression 14 to the set initial value, as illustrated in FIG. 19. This makes it possible to solve the issue of generation of the ramp wave at high speed.

[0080] FIG. 10 is a waveform diagram illustrating an output voltage V.sub.DAC of a resistance type D/A converter 28 illustrated in FIG. 9 and the voltage V.sub.out of the load circuit having the capacity, in a case where a prescribed offset value is added when the time rate of change of the voltage of the ramp wave is varied. It is found from FIG. 10 that an accurate ramp wave can be generated by adding the correction value corresponding to the offset voltage V.sub.off when the rate of change of the voltage over time is varied.

[0081] Further, even in a case where a time rate of change of the ramp wave is varied a plurality of times with time, it is possible to generate the accurate ramp wave by varying the offset value based on change of the time rate of change of the ramp wave. FIG. 11 is a waveform diagram illustrating the output voltage V.sub.DAC of the resistance type D/A converter and the voltage V.sub.out of the load circuit having the capacity, in a case where no correction value is added when the time rate of change is varied twice. As illustrated in FIG. 11, when the ramp wave is generated at 0 s, the time rate of change is varied at this time and an error V.sub.error is generated, which causes waveform distortion. When the time rate of change is quadrupled at 50 ns, a large error V.sub.error is generated, and a large waveform distortion is generated.

[0082] FIG. 12 is a waveform diagram illustrating the output voltage V.sub.DAC of the D/A converter and the voltage V.sub.out of the load circuit having the capacity, in a case where the time rate of change of the ramp wave is varied a plurality of times with time and the offset value is accordingly varied when the time rate of change of the voltage of the ramp wave is varied. As illustrated in FIG. 12, when the ramp wave is generated at 0 s, the time rate of change is varied at this time, and the error V.sub.error is zero. When the time rate of change is quadrupled at 50 ns, the error V.sub.error can be made zero by varying the correction value, and the waveform distortion is not generated. Therefore, it is found that the method can effectively suppress the waveform distortion.

[0083] As described above, in a case where the ramp wave, the time rate of change of which is varied a plurality of times with the time, is used for the CMOS image sensor, it is possible to reduce the conversion time and to increase the frame rate by increasing the time rate of change of the ramp wave after the signal intensity is increased to a certain degree. This makes it possible to advantageously realize low power consumption by acceleration or conversion time reduction.

[0084] In contrast, in a case where the above-described method is applied to the actual image sensor, a calibration circuit is necessary because it is difficult to previously determine the time constant of the load. FIG. 13 is a diagram illustrating a configuration of the calibration circuit, and FIG. 14 is a diagram illustrating relationship of an output voltage, a standard voltage, and a time in the calibration circuit. As illustrated in FIG. 13, the calibration circuit includes an output voltage of the resistance type D/A converter 28 appearing in a load circuit, two types of standard voltages (first standard voltage and second standard voltage), a correction A/D converter 23, and a correction logic circuit 24.

[0085] In FIG. 14, the ideal ramp wave is illustrated by a dashed line. When a voltage at a time point 0 is set to zero, an actual response is shifted due to an RC time constant as illustrated by a solid line in FIG. 14. Although the voltage is positive, a negative voltage is illustrated by an auxiliary dashed line. In such a state, when a voltage at a time point T.sub.1 is set to V.sub.1 and a voltage at a time point T.sub.2 is set to V.sub.2, the offset voltage V.sub.off is determined from the following expression 15.

[Expression 15]

[0086] Therefore, in the image sensor according to the present embodiment, it is sufficient to add the offset voltage V.sub.off calculated by the above-described expression 15, as the correction value. More specifically, as illustrated in FIG. 13, the output of the resistance type D/A converter 28 is compared with the standards voltages V.sub.1 and V.sub.2, and the time points T.sub.1 and T.sub.2 are determined from counter values by using a time-domain correction A/D converter 23 that includes a comparator 21 outputting time information on the comparison and a counter 22. Further, the correction value is calculated from the above-described expression 15, and a necessary offset voltage (offset value) is output from the correction logic circuit 24.

[0087] It goes without saying that the offset voltage is preferably asymptotically brought close to the ideal value by supplying the correction value determined by the correction logic circuit 24 to an adder-subtractor 20 outputting an input value for the resistance type D/A converter 28, again comparing the output of the resistance type D/A converter 28 with the standard voltages V.sub.1 and V.sub.2, and determining the time points T.sub.1 and T.sub.2 from the counter values by using the correction A/D converter 23. Further, the correction value can be calculated from one voltage and one time point without using the two voltages and the two time points; however, in this case, an error is easily generated due to the offset voltage of the comparator and delay. Therefore, the method using the two voltages and the two time points can calculate the accurate offset voltage.

[0088] As described above, the resistance type D/A converter in the image sensor according to the present embodiment can reduce the waveform distortion of the ramp wave by adding the prescribed offset value when the time rate of change of the voltage of the ramp wave is varied, and can realize the A/D conversion at high speed with high accuracy. Note that configurations and effects other than the above-described configurations and effects in the image sensor according to the present embodiment are similar to the configurations and effects in the above-described first embodiment.

[0089] In the above-described first and second embodiments, the CMOS image sensor is described as an example; however, the present invention is not limited thereto. The above-described first and second embodiments are applicable to a two-dimensional image sensor for other applications. Further, the image sensor according to the present invention includes an infrared sensor, a terahertz sensor, a magnetic sensor, a pressure sensor, and the like.

REFERENCE SIGNS LIST

[0090] 1, 101 Pixel unit [0091] 1a, 101a Pixel [0092] 2, 102 Vertical control circuit [0093] 3, 103 Row access line [0094] 4, 104 Pixel signal line [0095] 5, 105 A/D conversion unit [0096] 5a Integral type A/D conversion device [0097] 6, 106 Horizontal control circuit [0098] 7 Entire control circuit [0099] 8, 28 Resistance type D/A converter [0100] 9 Clock circuit [0101] 10, 100 CMOS image sensor [0102] 20 Adder-subtractor [0103] 21, 111 Comparator [0104] 22, 112 Counter [0105] 23 Correction A/D converter [0106] 24 Correction logic circuit [0107] 81 Inverter [0108] 82 Decoder circuit [0109] 121 Decoder [0110] 122 Current source [0111] 123 Switch [0112] 124 Load resistor [0113] 125 Power supply