Testing device, overcurrent protector, and method of testing an overcurrent protector

Abstract

Testing device for testing an overcurrent protector, and method of operating the same. First and second switches are provided for connecting the first and second terminals of the overcurrent protector to first and second capacitors, respectively. The first and second capacitors are pre-charged to first and second voltages, where the second voltage is lower than the first. A controller switches the first and second switches to their test positions, which establishes a current path from the first capacitor to the second capacitor through the overcurrent protector. The first and second voltages are selected so that the peak current that would be generated in the current path is greater than the overcurrent threshold of the overcurrent protector.

Claims

1. An apparatus comprising: a testing device for testing a current between first and second terminals of an overcurrent protector that is configured to interrupt the current when the current exceeds an overcurrent threshold, the testing device comprising: a first switch configured to switch to a test position for connecting the first terminal to a first capacitor; a second switch configured to switch to a test position for connecting the second terminal to a second capacitor; a pre-charging circuit configured to charge the first capacitor to a first voltage and charge the second capacitor to a second voltage, the second voltage being lower than the first; and a controller configured to switch the first and second switches to the test positions for establishing a current path for the current to pass through the overcurrent protector from the first capacitor to the second capacitor, the first and second voltages are selected to generate a peak current in the current path greater than the overcurrent threshold voltage.

2. The apparatus according to claim 1, further comprising: the first capacitor for connection to the first terminal; and the second capacitor for connection to the second terminal.

3. The apparatus according to claim 2, wherein at least one of the first and second capacitors is grounded.

4. The apparatus according to claim 1, further comprising: a resistor connected to the current path and configured to limiting the current.

5. The apparatus according to claim 4, wherein the resistor is connected between the first capacitor and the first switch.

6. The apparatus according to claim 1, wherein the first and second switches are further configured to switch to an operating position where the first and second switches connect the first and second terminals to, respectively, a power source and a load.

7. The apparatus according to claim 1, wherein the pre-charging circuit comprises one or more pre-charging switches configured to connect the first and second capacitors to a pre-charging power source for charging to, respectively, the first and second voltages.

8. The apparatus according to claim 1, wherein the controller is configured to switch the first and second switches to the test positions for a predetermined test duration that is longer than a specified maximum reaction time of the overcurrent protector.

9. The apparatus according to claim 8, further comprising: an evaluation module configured to identify a fault in the overcurrent protector, after the predetermined test duration, based the voltage at one of the first and second capacitors.

10. A system comprising: an overcurrent protector configured to interrupt a current between first and second terminals when the current exceeds an overcurrent threshold; and a testing device configured to test whether the current exceeds the overcurrent threshold, the testing device comprising: a first switch configured to switch to a test position for connecting the first terminal to a first capacitor; a second switch configured to switch to a test position for connecting the second terminal to a second capacitor; a pre-charging circuit configured to charge the first capacitor to a first voltage and charge the second capacitor to a second voltage, the second voltage being lower than the first; and a controller configured to switch the first and second switches to the test positions for establishing a current path for the current to pass through the overcurrent protector from the first capacitor to the second capacitor, the first and second voltages are selected to generate a peak current in the current path greater than the overcurrent threshold.

11. The system of claim 10, further comprising: the first capacitor for connection to the first terminal; and the second capacitor for connection to the second terminal.

12. The system of claim 11, wherein at least one of the first and second capacitors is grounded.

13. The system of claim 10, further comprising: a resistor connected to the current path and configured to limit the current.

14. The system of claim 13, wherein the resistor is connected between the first capacitor and the first switch.

15. The system of claim 10, wherein the system is configured for use in a vehicle, the system further comprising: a power source configured for use in the vehicle; and a load configured for use in the vehicle, wherein the first and second switches are further configured to switch to an operating position where the first and second switches connect the first and second terminals to, respectively, the power source and the load.

16. A method comprising: testing a current between first and second terminals of an overcurrent protector that is configured to interrupt the current when the current exceeds an overcurrent threshold, the testing comprising: pre-charging, using a pre-charging circuit, a first capacitor to a first voltage and a second capacitor to a second voltage, wherein the second voltage is lower than the first; and controlling, using a test device, first and second switches to operate in test positions for connecting the first and second terminals to the first and second capacitors for establishing a current path for the current through the overcurrent protector between the first capacitor and the second capacitor, wherein the first and second voltages are selected to generate a peak current in the current path greater than the overcurrent threshold.

17. The method of claim 16, wherein controlling the first and second switches comprises switching the first and second switches, from operating positions in which the first and second switches connect the first and second terminals to a power source and a load, to the test positions of the first and second switches.

18. The method of claim 16, wherein pre-charging the first and second capacitors comprises switching one or more pre-charging switches to connect the first and second capacitors to a pre-charging power source for charging to the first and second voltages, respectively.

19. The method of claim 16, wherein controlling the first and second switches comprises switching the first and second switches to the test positions for a predetermined test duration that is longer than a specified maximum reaction time of the overcurrent protector.

20. The method of claim 19, wherein controlling the first and second switches identifying, using an evaluation module, a fault in the overcurrent protector based the voltage at one of the first and second capacitors after the predetermined test duration.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

(1) Illustrative embodiments will now be described with reference to the accompanying drawing in which:

(2) FIG. 1 shows a schematic overview of a power supply incorporating a self-test testing circuit;

(3) FIG. 2 shows a schematic circuit diagram of a first embodiment of a testing circuit;

(4) FIG. 3 shows a graph illustrating the change in current flowing through the testing circuit during an example test;

(5) FIGS. 4 and 5 show graphs illustrating the change in voltage at the first and second capacitors during an example test;

(6) FIGS. 6 to 10 show schematic circuit diagrams of a testing circuit according to a second embodiment though the steps of the test sequence; and

(7) FIG. 11 shows a schematic circuit diagram of a testing circuit according to a third embodiment.

DETAILED DESCRIPTION

(8) FIG. 1 shows an illustrative arrangement of a power supply 2 supplying a Multi-Domain Safety Controller 9. The power supply 2 receives power from the battery 1, and comprises a protection circuit 3 and a DC/DC converter 7, which may be part of a power management integrated circuit (PMIC). The protection circuit 3 comprises an overcurrent protector 4 which includes a switch 5 which provides a circuit breaker for protecting the Safety Controller 9 from an over current event. In this example, the protection block 3 is placed in front of the pre-regulator of the DC/DC converter 7. However, it will be understood that the protection block 3 may be located after the pre-regulator.

(9) In an overcurrent event, such as short 8 around the pre-regulator high side transistor, the rising input current will be detected by sensor 6 within the overcurrent protector 4, which then prompts the switch 5 to break the circuit and thereby stop the current flow.

(10) In order to comply with Automotive Safety Integrity Level (ASIL) requirements, the protection block 3 is provided with a self-test circuit 10 for testing the operating status of the overcurrent protector 4.

(11) FIG. 2 shows a self-test circuit 10 according to an illustrative embodiment. The self-test circuit 10 is connectable to the first and second terminals 12,13 of the overcurrent protector 4, via switches 11 and 14. In this embodiment, the switches are provided as back-to-back NMOSFETs. The switches 11 and 14 are operable to switch between an operating position and a test position. In the operating position, the first and second terminals 12,13 are respectively connected to the battery 1 and the PMIC 7 and safety controller 9. In the test position, the first and second terminals 12,13 are connected to the first and second capacitors 15,16 for performing a test. Therefore, when in the test position, the device under test, namely the overcurrent protector 4, is dis-connected from its regular power supply (i.e. battery 1) and load (safety controller 9) and is instead connected to the self-test circuit.

(12) The first capacitor 15 is connectable to the first terminal 12, and the second capacitor 16 is connectable to the second terminal 13. A balancing resistor 17 is further provided between the first capacitor 15 and the first terminal 12. A pre-charging circuit (not shown) is further provided to pre-charge the first and second capacitors prior to a test sequence being initiated.

(13) When a test sequence is initiated, the controller 18 switches the first and second switches 11,14 to connect the first and second terminals 12,13 to the first and second capacitors 15,16. This establishes a current balancing arrangement between the pre-charged capacitors 15,16 and through the overcurrent protector 4. By pre-charging the first capacitor 15 to a higher voltage than the second capacitor 16, a balancing current is thereby established through the overcurrent protector 4. For instance, the first and second capacitors 15,16 may be pre-charged with voltages V.sub.1 and V.sub.2, respectively, where for example V.sub.1=2.Math.V.sub.2. The component values of the resistor 17 and first and second capacitors 15,16, and the pre-charge voltages V.sub.1 and V.sub.2 are selected such that balancing current between the capacitors during the test is above the overcurrent detection threshold for a longer period of time than the overcurrent protector's maximum specified reaction time.

(14) In this connection, if the overcurrent protector 4 is working correctly, balance between the voltage levels of the capacitors 15,16 will not be reached by the end of the testing period because the overcurrent protector 4 will have broken the circuit. Consequently, a test PASS or FAIL decision about the operational status of the overcurrent protector can be made based on the voltage levels across either of the capacitors at the end of the test. Accordingly, this arrangement avoids the need to actively monitor current during the test, and at the same time the maximum voltage and current levels are limited by the inherent properties of the components used, rather than necessitating complex control.

(15) The arrangement also eliminates the need for a high-side current monitor since the test current is neither directly measured nor controlled. Moreover, the input power supply (i.e the battery 1 in this embodiment), is not required to provide the instantaneous peak energy needed for the test current, since this is instead provided by the pre-charged first capacitor 15 acting as a buffer. Furthermore, the elimination of the shunt resistor reduces losses in the main current path during normal operation. At the same time, neither voltage nor current regulation is required because all signals are pre-defined by component selection.

(16) As an illustrative example, the circuit shown in FIG. 2 may be configured with the following specification:

(17) 1.sup.st Capacitor 15=2.sup.nd Capacitor 16=20 μF±30%

(18) Voltage of 1.sup.st Capacitor 15 at start of test=10V±5%

(19) Voltage of 2.sup.nd Capacitor 16 at start of test=5V±5%

(20) Resistor 17=0.5 Ω±5%

(21) Overcurrent protector 4 current threshold=4 A

(22) Maximum specified reaction time (t.sub.react.DUT.spec.max)=2 μs±100 ns

(23) Test duration (t.sub.test.dur)=3 μs

(24) With the above test parameters, the following calculated voltage and current levels will apply:

(25) Peak Current=lOA

(26) Current at 2 μs after test start(treact.DUT.spec.max)≈6.7 A

(27) Voltage at 1st Capacitor 15 at test end≈9.2V

(28) Voltage at 2nd Capacitor 16 at test end≈5.8V

(29) With the above specification, the tolerance of the expected voltage of the second capacitor 16 by the end of the test can be calculated as:

(30) Tolerated difference in V at end of test≈0.61V

(31) Tolerated difference in Vat end of test≈10.3%

(32) The additional decrease of the expected voltage of the 2.sup.nd capacitor 16 by the end of the test resulting from the losses caused by the voltage drop of the test current on both the resistor 17 and the circuit components of the overcurrent protector 4 may also be estimated as:
R.sub.tot=R.sub.Bal+ESR.sub.c1+ESR.sub.c2+R.sub.DUT(≈100 mQ)

(33) where R.sub.tot is the total resistance, R.sub.Bal is the resistance of resistor 17 (500 mΩ in this example), ESR.sub.c1 and ESR.sub.c2 are the equivalent series resistance values for the first and second capacitors, and R.sub.DUT is the internal resistance of the device under test (i.e. overcurrent protector 4).

(34) FIGS. 3 to 5 shows graphs illustrating the change in current, and the voltage at each capacitor, during an example test. As shown in FIG. 3, once the capacitors are connected to the overcurrent protector, the generated current exceeds the overcurrent protector's detection threshold. As shown in FIGS. 4 and 5, this coincides with the discharging of voltage from the first capacitor 15 to the second capacitor 16. If the overcurrent device 4 is working correctly, the current will be interrupted by the specified maximum reaction time, as shown in FIG. 3, which thereby fixes the voltages at each capacitor at an expected level. However, if the overcurrent device 4 is not working correctly, the current will continue to flow beyond the specified maximum reaction time, as shown in FIG. 3. This results in a greater change in voltage at each of the capacitors, with the first capacitor 15 discharging to a lower voltage level than expected, and the second capacitor 16 charging to a higher voltage than expected. Accordingly, a fault can be identified by evaluating the voltage level at one of the capacitors at the end of the test. Furthermore, because the first and second switches 11,14 can disconnect the capacitors 15,16 at the end of the test, there is no need to undertake a very rapid evaluation of the capacitor voltage.

(35) FIGS. 6 to 10 show a self-test circuit according to a second illustrative embodiment, with the figures showing the switching sequence through the various stages of the test. This embodiment is substantially the same as the first embodiment, but the first and second switches 11,14 are 3-way switches, and the circuit 10 further comprises a first pre-charging source 19 connected to the first capacitor 15 via a first pre-charging switch 20, and a second pre-charging source 21 connected to the second capacitor 16 via a second pre-charging switch 22. The first and second pre-charging switches 20 and 22 are operable under the control of the self-test controller 18.

(36) In FIG. 6, the circuit is in a pre-charging configuration where the first and second pre-charging switches 20,22 connect the first and second capacitors 15,16 to charge them to the voltages V.sub.1 and V.sub.2, respectively. Once the capacitors 15,16 are charged, the first and second pre-charging switches 20,22 disconnect the pre-charging sources 19,21, as shown in FIG. 7.

(37) FIG. 8 shows the circuit is in the start test configuration, with the first and second switches 11,14 operated to connect the first and second capacitors 15,16 to the first and second terminals 12,13 via the resistor 17. This establishes the current flow from the first capacitor 15 to the second capacitor 16. If the over current protector 4 is operating correctly, it should interrupt the current flow within the maximum specified reaction time t.sub.react.DUT.spec.max.

(38) After a predetermined test duration, t.sub.test.dur, which is longer than t.sub.react.DUT.spec.max, the self-test controller 18 switches the circuit to the disconnected configuration shown in FIG. 9 and evaluates the voltage at the second capacitor 16 using an evaluation circuit (not shown). If the second capacitor 16 voltage exceeds a threshold indicating that the overcurrent protector 4 did not interrupt the current flow within t.sub.react.DUT.spec.max, a fault is identified. Conversely, if the second capacitor 16 voltage is below the threshold, the current flow was successfully interrupted, and the overcurrent protector 4 has passed the self-test. In other embodiments, the self-test controller 18 may alternatively evaluate the retained voltage at the first capacitor 15, with a voltage drop below to a threshold indicating an overcurrent protector failure and a voltage drop within the threshold indicating a pass.

(39) In the event of a self-test pass, the self-test controller 18 may operate the first and second switches 11,14 to connect the terminals 12,13 to the battery 1 and the PMIC 7 and safety controller 9.

(40) FIG. 11 shows a third embodiment in which existing capacitors within the application circuit are re-purposed for use in the self-test circuit. In this example, the overcurrent protector 4 comprises associated input circuitry including existing capacitors 15e and 16e. The existing capacitors 15e and 16e can be switched by pre-charging switches 20,22 to disconnect them from the input circuitry (as shown in FIG. 11) to first pre-charge them using pre-charge sources 19,21, and then to an unconnected state for running the self-test in line with the previous embodiments. In this way, existing capacitors may be temporarily re-purposed for the self-test, thereby providing component cost and space savings.

(41) With the above arrangements, an overcurrent protector may be tested without having the device shorted to ground. This thereby allows the self-test circuit to be used with a broader range of overcurrent protection devices. Furthermore, as the maximum voltages and currents are pre-defined by component selection, higher voltages and currents cannot occur, even in the event of a fault. This thereby improves safety and reliability. Moreover, as the self-test circuit does not require a shunt resistor or active current monitoring, the arrangement saves space, and reduces losses and costs. Moreover, because the current is not monitored actively, the control and test evaluation steps may be implemented relatively slowly, thereby increasing the simplicity of the self-test controller and hence further reducing costs.

(42) It will be understood that the embodiments illustrated above show applications only for the purposes of illustration. In practice, embodiments may be applied to many different configurations, the detail of which being straightforward for those skilled in the art to implement.

(43) For example, although in the above illustrative embodiments the testing circuit has been described as a separate device, it will be understood that the circuit may be incorporated into the overcurrent protector unit.