Integrating volterra series model and deep neural networks to equalize nonlinear power amplifiers

Abstract

The nonlinearity of power amplifiers (PAs) has been a severe constraint in performance of modern wireless transceivers. This problem is even more challenging for the fifth generation (5G) cellular system since 5G signals have extremely high peak to average power ratio. Non-linear equalizers that exploit both deep neural networks (DNNs) and Volterra series models are provided to mitigate PA nonlinear distortions. The DNN equalizer architecture consists of multiple convolutional layers. The input features are designed according to the Volterra series model of nonlinear PAs. This enables the DNN equalizer to effectively mitigate nonlinear PA distortions while avoiding over-fitting under limited training data. The non-linear equalizers demonstrate superior performance over conventional nonlinear equalization approaches.

Claims

1. A distortion-compensating processor, comprising: an input port configured to receive a distorted signal y(n) representing information x(n) distorted by a channel h; at least one automated processor, configured to: decompose the distorted signal y(n) as a Volterra series expansion $y\left(n\right)=\underset{d=0}{\overset{D}{.Math.}}\underset{k=0}{\overset{P}{.Math.}}{b}_{kd}x\left(n-d\right){.Math.x\left(n-d\right).Math.}^{k-1};$  and implement an equalizer operating on separate terms of the Volterra series expansion to produce an output z(n) having reduced distortion with respect to the distorted signal y(n), the equalizer comprising a deep neural network comprising a plurality of neural network hidden layers trained with respect to distortion of the channel h to provide an input-output response and $z\left(n\right)=\underset{k=1}{\overset{P}{.Math.}}\underset{d_1=0}{\overset{D}{.Math.}}.Math.\underset{d_k=0}{\overset{D}{.Math.}}{f}_{d_1,.Math.,d_k}\underset{i=1}{\overset{k}{.Math.}}r\left(n-d_i\right);$ and an output port configured to present the output, wherein: r(n) is a response of the channel h to the nonlinearly distorted radio frequency signal y(n); p is a respective nonlinearity order; d is a memory depth parameter; D is a total memory length; P is a total nonlinearity order; k is a nonlinear order; and b.sub.kd are nonlinear response parameters.

2. The distortion-compensating processor according to claim 1, wherein the distorted signal is received from a radio receiver.

3. The distortion-compensating processor according to claim 1, wherein the distorted signal is distorted by amplification by a radio frequency power amplifier and transmission through a radio frequency communication channel.

4. The distortion-compensating processor according to claim 1, wherein: the undistorted radio frequency signal x(n) is distorted by an analog process to produce the nonlinearly distorted radio frequency signal y(n), which passes through the channel h; $r\left(n\right)=\underset{\ell =0}{\overset{L}{.Math.}}{h}_{\ell }y\left(n-\ell \right)+v\left(n\right)$ is a response signal sequence, wherein r(n) is stacked together into M+1 dimensional vectors r(n)=[r(n), . . . , r(n−M)].sup.T, where (⋅).sup.T denotes transpose, such that r(n)=HG(n)×(n)+v(n); is a set of finite-impulse response channel coefficients; is an equalization delay; v(n) is an additive white Gaussian noise component signal sequence; H is an (M+1)×(M+L+1) dimensional channel matrix $H=\left[\begin{array}{ccccc}{h}_o& .Math.& h_L& & \\ & \ddots & & \ddots & \\ & & h_o& .Math.& h_L\end{array}\right];$ G(n)=diag{V.sub.y(n)e.sup.jψ.sup.y(n), . . . , V.sub.n(y-M-L)e.sup.jψ.sup.y(n-M-L)} is an (M+L+1)×(M+L+1) dimensional diagonal matrix of the nonlinear responses,
x(n)=[x(n), . . . ,x(n−M−L)].sup.T, and
v(n)=[v(n), . . . ,v(n−M)].sup.T; f.sup.T=G′(n)[ƒ.sub.0, . . . , ƒ.sub.M], where [ƒ.sub.0, . . . , ƒ.sub.M]H≈[0, . . . , 1, . . . , 0] is computed by the equalizer to equalize the channel h; $G^{\prime }\left(n\right)=\frac{1}{V_{y\left(n-d\right)}}{e}^{-j{\psi }_{y\left(n-d\right)}}$ is computed by the equalizer to equalize the analog process; {circumflex over (r)}(n) is a resulting sequence after linear channel equalization; z(n)=ƒ.sup.T r(n)≈x(n−d) represents the output with equalization delay d; and $z\left(n\right)=\underset{d=0}{\overset{D}{.Math.}}\underset{p=0}{\overset{P}{.Math.}}{g}_{kd}\hat{r}\left(n-d\right){.Math.\hat{r}\left(n-d\right).Math.}^{k-1}$ is a Volterra series model of the equalizer with coefficients g.sub.kd such that z(n)≈x(n−) for some equalization delay , wherein: coefficients g.sub.kd are determined according to $\underset{\left\{g_{\mathrm{kd}}\right\}}{\min }\underset{n=L}{\overset{N}{.Math.}}{.Math.x\left(n-L\right)-\underset{d=0}{\overset{D}{.Math.}}\underset{k=1}{\overset{P}{.Math.}}{g}_{kd}\hat{r}\left(n-d\right){.Math.\hat{r}\left(n-d\right).Math.}^{k-1}.Math.}^2$ with training symbols x(n) and received samples {circumflex over (r)}(n), z(n)=arg min.sub.∀x(n)|{circumflex over (r)}(n)−V.sub.ye.sup.jψ.sup.yx(n)|.sup.2 is a maximum likelihood estimation operator for a nonlinear equalization output signal sequence having reduced distortion, V.sub.y is an amplitude of a signal sequence y(n), ψ.sub.y is a phase change of the signal sequence y(n); and the deep neural network equalizer is trained to determine the channel coefficients , analog process responses V.sub.y, ψ.sub.y, and the channel equalizer ƒ.sup.T.

5. The distortion-compensating processor according to claim 4, wherein: $$\begin{gathered} \mathrm{vector}a={\left[g_{00},g_{01},.Math.,g_{PD}\right]}^T, \\ \mathrm{vector}x={\left[x\left(0\right);.Math.,x\left(N-L\right)\right]}^T, \\ \mathrm{vector}B=\left[\begin{array}{cccc}\hat{r}\left(L\right)& \hat{r}\left(L\right).Math.\hat{r}\left(L\right).Math.& .Math.& \hat{r}\left(L-D\right){.Math.\hat{r}\left(L-D\right).Math.}^{P-1}\\ .Math.& & & .Math.\\ \hat{r}\left(N\right)& \hat{r}\left(N\right).Math.\hat{r}\left(N\right).Math.& .Math.& \hat{r}\left(N-D\right){.Math.\hat{r}\left(N-D\right).Math.}^{P-1}\end{array}\right],\mathrm{and}\underset{\left\{g_{\mathrm{kd}}\right\}}{\min }\underset{n=L}{\overset{N}{.Math.}}{.Math.x\left(n-L\right)-\underset{d=0}{\overset{D}{.Math.}}\underset{k=1}{\overset{P}{.Math.}}{g}_{kd}\hat{r}\left(n-d\right){.Math.\hat{r}\left(n-d\right).Math.}^{k-1}.Math.}^2\approx \underset{a}{\min }{.Math.x-\mathrm{Ba}.Math.}^2, \end{gathered}$$ having solution a=B.sup.+x, where B.sup.+=(B.sup.HB).sup.−1B is the pseudo-inverse of the matrix B.

6. The distortion-compensating processor according to claim 1, wherein the Volterra series expansion comprises at least fifth order terms, and the deep neural network comprises at least two convolutional network layers.

7. The distortion-compensating processor according to claim 1, wherein the deep neural network comprises at least three one-dimensional layers, each layer having at least 10 feature maps, and a fully connected layer subsequent to the at least three layers.

8. The distortion-compensating processor according to claim 1, wherein the distorted signal comprises a transmitted orthogonal frequency multiplexed radio frequency signal.

9. The distortion-compensating processor according to claim 1, further comprising a demodulator, configured to demodulate the output as the set of symbols representing the information.

10. A method of compensating for a distortion, comprising: receiving a distorted signal y(n) representing information x(n) distorted and communicated through a channel h; decomposing the distorted signal y(n) with a Volterra processor to produce a Volterra series expansion of form $y\left(n\right)=\underset{d=0}{\overset{D}{.Math.}}\underset{k=0}{\overset{P}{.Math.}}{b}_{kd}x\left(n-d\right){.Math.x\left(n-d\right).Math.}^{k-1};$ and equalizing the distorted signal y(n) with an automated nonlinear equalizer, comprising a deep neural network having a plurality of neural network hidden layers trained with respect to distortion of the channel h to have an input-output response $z\left(n\right)=\underset{k=1}{\overset{P}{.Math.}}\underset{d_1=0}{\overset{D}{.Math.}}.Math.\underset{d_k=0}{\overset{D}{.Math.}}{f}_{d_1,}{.Math.}_{,d_k}\underset{i=1}{\overset{k}{.Math.}}r\left(n-d_i\right),$ which receives the Volterra series expansion, and produces an output z(n) having reduced distortion with respect to the distorted signal y(n), wherein: r(n) is a response of channel h to the nonlinearly distorted radio frequency signal y(n); p is a respective nonlinearity order; d is a memory depth parameter; D is a total memory length; P is a total nonlinearity order; k is a nonlinear order; and b.sub.kd are nonlinear response parameters.

11. The method according to claim 10, wherein the input comprises a radio frequency orthogonal frequency multiplexed signal amplified and distorted by a radio frequency power amplifier, received though a radio receiver.

12. The method according to claim 10, further comprising: computing a maximum likelihood estimation for a nonlinear equalization z(n)=arg min.sub.∀x(n)|({circumflex over (r)}(n)−V.sub.ye.sup.jψ.sup.yx(n)|.sup.2, to produce the output z(n)=ƒ.sup.T r(n)≈x(n−d), with equalization delay d; training the deep neural network to determine the channel coefficients of the channel h, having a channel amplitude response V.sub.y, a channel phase response ψ.sub.y, and a channel equalization response ƒ.sup.T; approximating G′(n) with a Volterra series model $z\left(n\right)=\underset{d=0}{\overset{D}{.Math.}}\underset{k=0}{\overset{P}{.Math.}}{g}_{kd}\hat{r}\left(n-d\right){.Math.\hat{r}\left(n-d\right).Math.}^{k-1},$ with coefficients g.sub.kd designed such that z(n)≈x(n−) for equalization delay , and estimated according to $\underset{\left\{g_{\mathrm{kd}}\right\}}{\min }\underset{n=L}{\overset{N}{.Math.}}{.Math.x\left(n-L\right)-\underset{d=0}{\overset{D}{.Math.}}\underset{k=1}{\overset{P}{.Math.}}{g}_{kd}\hat{r}\left(n-d\right){.Math.\hat{r}\left(n-d\right).Math.}^{k-1}.Math.}^2,$ with training symbols x(n) and received samples {circumflex over (r)}(n); wherein: channel h, produces response $r\left(n\right)=\underset{\ell =0}{\overset{L}{.Math.}}{h}_{\ell }y\left(n-\ell \right)+v\left(n\right)$ from y(n); is a set of finite-impulse response channel coefficients; is an equalization delay; v(n) is an additive white Gaussian noise component; r(n) is stacked together into M+1 dimensional vectors r(n)=[r(n), . . . , r(n−M)].sup.T, where (⋅).sup.T denotes transpose, such that r(n)=HG(n)×(n)+v(n); H is an (M+1)×(M+L+1) dimensional channel matrix $H=\left[\begin{array}{ccccc}{h}_o& .Math.& h_L& & \\ & \ddots & & \ddots & \\ & & h_o& .Math.& h_L\end{array}\right];$ G(n)=diag{V.sub.y(n)e.sup.jψ.sup.y(n), . . . , V.sub.n(y-M-L)e.sup.jψ.sup.y(n-M-L)} is an (M+L+1)×(M+L+1) dimensional diagonal matrix which consists of the nonlinear responses, x(n)=[x(n), . . . , x(n−M−L)].sup.T, and v(n)=[v(n), . . . , v(n−M)].sup.T; f.sup.T=G′(n)[ƒ.sub.0, . . . , ƒ.sub.M], where [ƒ.sub.0, . . . , ƒ.sub.M]H≈[0, . . . , 1, . . . , 0] represents a channel equalization; $G^{\prime }\left(n\right)=\frac{1}{V_{y\left(n-d\right)}}{e}^{-j{\psi }_{y\left(n-d\right)}}$ represents an analog processor equalization; and {circumflex over (r)}(n) is a linearized representation of r(n).

13. The method according to claim 12, wherein: $$\begin{gathered} \mathrm{vector}a={\left[g_{00},g_{01},.Math.,g_{PD}\right]}^T, \\ \mathrm{vector}x={\left[x\left(0\right);.Math.,x\left(N-L\right)\right]}^T, \\ \mathrm{vector}B=\left[\begin{array}{cccc}\hat{r}\left(L\right)& \hat{r}\left(L\right).Math.\hat{r}\left(L\right).Math.& .Math.& \hat{r}\left(L-D\right){.Math.\hat{r}\left(L-D\right).Math.}^{P-1}\\ .Math.& & & .Math.\\ \hat{r}\left(N\right)& \hat{r}\left(N\right).Math.\hat{r}\left(N\right).Math.& .Math.& \hat{r}\left(N-D\right){.Math.\hat{r}\left(N-D\right).Math.}^{P-1}\end{array}\right],\mathrm{and}\underset{\left\{g_{\mathrm{kd}}\right\}}{\min }\underset{n=L}{\overset{N}{.Math.}}{.Math.x\left(n-L\right)-\underset{d=0}{\overset{D}{.Math.}}\underset{k=1}{\overset{P}{.Math.}}{g}_{kd}\hat{r}\left(n-d\right){.Math.\hat{r}\left(n-d\right).Math.}^{k-1}.Math.}^2\approx \underset{a}{\min }{.Math.x-\mathrm{Ba}.Math.}^2, \end{gathered}$$ having solution a=B.sup.+x, where B.sup.+=(B.sup.HB).sup.−1B is the pseudo-inverse of the matrix B.

14. The method according to claim 10, wherein: the Volterra series expansion comprises at least fifth order terms; and the deep neural network comprises at least three layers, each layer having at least 10 feature maps, and a fully connected layer subsequent to the at least three layers.

15. The method according to claim 10, further comprising demodulating the output z(n) as the set of information symbols.

16. A non-linear distortion-compensating processor, comprising: an input configured to receive a non-linearly distorted radio frequency signal r(n) representing information x(n) distorted by a radio frequency communication system to produce a distorted signal y(n) communicated through a channel h; at least one automated processor, configured to: decompose the non-linearly distorted radio frequency signal r(n) received from the channel h as a Volterra series expansion $y\left(n\right)=\underset{d=0}{\overset{D}{.Math.}}\underset{k=0}{\overset{P}{.Math.}}{b}_{kd}x\left(n-d\right){.Math.x\left(n-d\right).Math.}^{k-1};$ process the Volterra series expansion with a deep neural network comprising a plurality of neural network hidden layers trained with respect to the distortion of the radio frequency communication system comprising the non-linear distortion and channel distortion, to equalize the distortion, the process having an input-output response $z\left(n\right)=\underset{k=1}{\overset{P}{.Math.}}\underset{d_1=0}{\overset{D}{.Math.}}.Math.\underset{d_k=0}{\overset{D}{.Math.}}{f}_{d_1,}{.Math.}_{,d_k}\underset{i=1}{\overset{k}{.Math.}}r\left(n-d_i\right);$  and demodulate z(n) to extract the information x(n) modulated in the non-linearly distorted radio frequency signal r(n), wherein: p is a respective nonlinearity order; d is a memory depth parameter; D is a total memory length; P is a total nonlinearity order; k is a nonlinear order; and b.sub.kd are nonlinear response parameters.

17. The non-linear distortion-compensating processor according to claim 16, wherein the non-linearly distorted radio frequency signal is an orthogonal frequency multiplexed signal which is distorted by amplification by a power amplifier and transmission over the communication channel h.

18. The non-linear distortion-compensating processor according to claim 16, wherein the deep neural network comprises at least three convolutional network layers, each layer having at least 10 feature maps, and a fully connected layer subsequent to the at least three layers.

19. The non-linear distortion-compensating processor according to claim 16, wherein the deep neural network is trained with data comprising symbol-specific pairs of the information x(n) and the corresponding non-linearly distorted radio frequency signal r(n) representing the non-linearly distorted information y(n) communicated through the channel h.

20. The non-linear distortion-compensating processor according to claim 16, wherein the response r(n) of the channel h is $r\left(n\right)=\underset{\ell =0}{\overset{L}{.Math.}}{h}_{\ell }y\left(n-\ell \right)+v\left(n\right);$ and the at least one automated processor is further configured to: compute a maximum likelihood estimation for a nonlinear equalization z(n)=arg min.sub.∀x(n)|{circumflex over (r)}(n)−V.sub.ye.sup.jψ.sup.y x(n)|.sup.2, to produce output z(n)=ƒ.sup.T r(n)≈x(n−d), with equalization delay d; train the deep neural network equalizer to determine a set of finite-impulse response channel coefficients of the channel h, having a channel amplitude response V.sub.y, a channel phase response ψ.sub.y, and a channel equalization response ƒ.sup.T; and approximate G′(n) with a Volterra series model $z\left(n\right)=\underset{d=0}{\overset{D}{.Math.}}\underset{k=0}{\overset{P}{.Math.}}{g}_{kd}\hat{r}\left(n-d\right){.Math.\hat{r}\left(n-d\right).Math.}^{k-1},$ with g.sub.kd designed such that z(n)≈x(n−) for equalization delay , and coefficients g.sub.kd estimated according to $\underset{\left\{g_{\mathrm{kd}}\right\}}{\min }\underset{n=L}{\overset{N}{.Math.}}{.Math.x\left(n-L\right)-\underset{d=0}{\overset{D}{.Math.}}\underset{k=1}{\overset{P}{.Math.}}{g}_{kd}\hat{r}\left(n-d\right){.Math.\hat{r}\left(n-d\right).Math.}^{k-1}.Math.}^2,$ with training symbols x(n) and received samples {circumflex over (r)}(n); wherein: is an equalization delay; v(n) is an additive white Gaussian noise component; r(n) is stacked together into M+1 dimensional vectors r(n)=[r(n), . . . , r(n−M)].sup.T, where (⋅).sup.T denotes transpose, such that r(n)=HG(n)×(n)+v(n); H is an (M+1)×(M+L+1) dimensional channel matrix $H=\left[\begin{array}{ccccc}{h}_o& .Math.& h_L& & \\ & \ddots & & \ddots & \\ & & h_o& .Math.& h_L\end{array}\right];$ G(n)=diag {V.sub.y(n)e.sup.jψ.sup.y(n), . . . , V.sub.n(y-M-L)e.sup.jψ.sup.y(n-m-L)} is an (M+L+1)×(M+L+1) dimensional diagonal matrix which consists of the nonlinear responses, x(n)=[x(n), . . . , x(n−M−L)].sup.T, and v(n)=[v(n), . . . , v(n−M)].sup.T; f.sup.T=G′(n)[ƒ.sub.0, . . . , ƒ.sub.M], where [ƒ.sub.0, . . . , ƒ.sub.M]H≈[0, . . . , 1, . . . , 0] represents a channel equalization, and $G^{\prime }\left(n\right)\approx \frac{1}{V_{y\left(n-d\right)}}{e}^{-j{\psi }_{y\left(n-d\right)}}$ represents an analog processor equalization; and {circumflex over (r)}(n) is a linearized representation of r(n).

Description

BRIEF DESCRIPTION OF THE DRAWINGS

(1) FIG. 1 shows a system block diagram with nonlinear power amplifier and deep neural network equalizer.

(2) FIG. 2 shows a block diagram of DNN equalizer.

(3) FIGS. 3A-3D show constellations of 16 QAM over a simulated PA. FIG. 3A: received signal. FIG. 3B: Volterra equalizer output. FIG. 3C: time-delayed NN output. FIG. 3D: Volterra+NN output.

(4) FIGS. 4A-4D show constellation of 16 QAM over a real PA. FIG. 4A: received signal. FIG. 4B: Volterra equalizer output. FIG. 4C: time-delayed NN output. FIG. 4D: Volterra+NN output.

(5) FIG. 5 shows a comparison of three equalization methods for 16-QAM under various NLD levels.

(6) FIG. 6: shows a table comparing MSE/SER improvement in percentage for the three equalization methods.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

Volterra-Based DNN Equalizer

(7) The present technology therefore employs deep neural networks to implement the nonlinear equalizer in the receiver, which can mitigate the nonlinear effects of the received signals due to not only PAs but also nonlinear channels and propagations. The architecture of the DNN equalizer is shown in FIG. 2, which shows an input X, which undergoes a series of three 1-d convolutions, am FC dropout, to produce the output Y.

(8) Different from [10], multi-layer convolutional neural networks (CNNs) are employed. Different from conventional neural network predistorters proposed in [6], neural networks are used as equalizers at the receivers. Different from conventional neural network equalizers such as those proposed in [14] [15], in the present DNN equalizer, not only the linear delayed samples r(n), but also the CNN and the input features in X are used. The Volterra series models are applied to create input features.

(9) We can assume that the linear channel H has already been equalized by a linear equalizer, whose output signal is r(n). In fact, this equalization is not required, but simplifies the presentation of the analysis.

(10) According to Volterra series representation of nonlinear functions, the input-output response of the nonlinear equalizer can be written as

(11) $\begin{array}{cc}z\left(n\right)=\underset{k=1}{\overset{P}{.Math.}}\underset{d_1=0}{\overset{D}{.Math.}}.Math.\underset{d_k=0}{\overset{D}{.Math.}}{f}_{d_1,.Math.,d_k}\underset{i=1}{\overset{k}{.Math.}}r\left(n-d_i\right).& \left(20\right)\end{array}$

(12) One of major problems is that the number of coefficients ƒ.sub.d.sub.1.sub., . . . ,d.sub.k increases exponentially with the increase of memory length D and nonlinearity order P. There are many different ways to develop more efficient Volterra series representations with reduced number of coefficients. For example, [23], exploits the fact that higher-order terms do not contribute significantly to the memory effects of PAs to reduce the memory depth d when the nonlinearity order k increases.

(13) This technique can drastically reduce the total number of coefficients. In [24] [25] and [26], a dynamic deviation model was developed to reduce the full Volterra series model (20) to the following simplified one:

(14) $z\left(n\right)=z_s\left(n\right)+z_d\left(n\right)=\underset{k=1}{\overset{P}{.Math.}}{f}_{k,0}{r}^k\left(n\right)+\underset{k=1}{\overset{P}{.Math.}}\underset{j=1}{\overset{k}{.Math.}}{r}^{k-j}\left(n\right)\underset{d_1=0}{\overset{D}{.Math.}}.Math.\underset{d_j=d_{j-1}}{\overset{D}{.Math.}}{f}_{k,j}\underset{i=1}{\overset{j}{.Math.}}r\left(n-d_i\right)$

(15) where z.sub.s(n) is the static term, and z.sub.d(n) is the dynamic term that includes all the memory effects. We can see that the total number of coefficients can be much reduced by controlling the dynamic order j which is a selectable parameter.

(16) We construct the input features of the DNN based on the model (21). Corresponding to the static term z.sub.s(n), we change it to:

(17) ${\hat{z}}_s\left(n\right)=\underset{1\le k\le P}{.Math.}{f}_{k,0}r\left(n\right){.Math.r\left(n\right).Math.}^{k-1}.$

(18) The reason that (22) changes r.sup.k(n) to r(n)|r(n)|.sup.k-1 is that only the signal frequency within the valid passband is interested. This means the input feature vector X should include terms r(n)|r(n)|.sup.k-1. Similarly, corresponding to the dynamic term z.sub.d(n), we need to supply

(19) $r^{k-j}\left(n\right)\underset{i=1}{\overset{j}{.Math.}}r\left(n-d_i\right)$
in the features where half of the terms r(n) and r(n−d.sub.i) should be conjugated. For simplicity, in the DNN equalizer, the vector X includes r(n−q)|r(n−q)|.sup.k-1 for some q and k.

(20) By applying Volterra series components directly as features of the input X, the DNN can develop more complex nonlinear functions with a fewer number of hidden layers and a fewer number of neurons. This will also make the training procedure converge much faster with much less training data.

(21) In FIG. 2, the input X is a tensor formed by the real and imaginary parts of r(n−q)|r(n−q)|.sup.k-1 with appropriate number of delays q and nonlinearities k. There are three single dimension convolutional layers, each with 20 or 10 feature maps. After a drop-out layer for regularization, this is followed by a fully connected layer with 20 neurons. Finally, there is a fully-connected layer to form the output tensor Y which has two dimensions. The output Y is used to construct the complex z(n), where z(n)={circumflex over (x)}(n−d) for some appropriate delay d. All the convolutional layers and the first fully connected layer use the sigmoid activation function, while the output layer uses the linear activation function. The mean square error loss function L.sup.loss=E[|x(n−d)−z(n)|.sup.2] is used, where z(n) is replaced by Y and x(n−d) is replaced by training data labels.

Experiment Evaluations

(22) Experiments are presented on applying the Volterra series based DNN equalizer (Volterra+NN) for nonlinear PA equalization. The (Volterra+NN) scheme with the following equalization methods: a Volterra series-based equalizer (Volterra) and a conventional time-delay neural network equalizer (NN). The performance metrics are mean square error (MSE)
√{square root over (E[|z(n)−x(n−d)|.sup.2]/E[|x(n−d)|.sup.2])}

(23) and symbol error rate (SER).

(24) Both simulated signals and real measurement signals were employed. To generate simulated signals, a Doherty nonlinear PA model consisting of 3rd and 5th order nonlinearities was employed. Referring to (2), the coefficients b.sub.k,q were
b.sub.0,0:2={1.0513+0.0904j,−0.068−0.0023j,0.0289−0.0054j}
b.sub.2,0:2={−0.0542−0.29j,0.2234+0.2317j,−0.0621−0.0932j}
b.sub.4,0:2={−0.9657−0.7028j,−0.2451−0.3735j,0.1229+0.1508j},

(25) which was used in [5] to simulate a 5th order dominant nonlinear distortion derived from PA devices used in the satellite industry. For real measurement, our measurement signals were obtained from PA devices used in the cable TV (CATV) industry, which are typically dominated by 3.sup.rd order nonlinear distortion (NLD). Various levels of nonlinear distortion, in terms of dBc, were generated by adjusting the PAs.

(26) For the Volterra equalizer, the approximate response of the nonlinear equalizer with delays including 8 pre- and post-main taps and with nonlinearities including even and odd order nonlinearity up to the 5th order was employed. To determine the values of the Volterra coefficients, N=4; 096 training symbols were transmitted through the PA and then collected the noisy received samples r(n).

(27) For the conventional time-delay NN equalizer, a feedforward neural network with an 80-dimensional input vector X and 5 fully-connected hidden layers with 20, 20, 10, 10, 10 neurons, respectively, was applied.

(28) FIG. 3 shows the constellation and MSE of the equalizer's outputs. It can be seen that the proposed scheme provides the best performance.

(29) FIG. 4 shows the constellation of 16 QAM equalization over the real PA. The corresponding SER were 0.0067, 0.0027, 0.00025, respectively. It can be seen that the Volterra+NN scheme has the best performance.

(30) FIG. 5 provides MSE measurements for 16-QAM under various nonlinear distortion level dBc. For each 1 dB increase in NLD, the resultant MSE is shown for the “Measured”, “Volterra”, “NN”, and the proposed “Volterra+NN” cases. MSE reduction diminishes appreciably as modulation order increases from QPSK to 64-QAM, but small improvements in MSE have been observed lead to appreciable SER improvement, especially for more complex modulation orders. The 4,096 symbol sample sizes have limited the measurements to a minimum measurable 0.000244 SER, which represents 1 symbol error out of 4,096 symbols.

(31) FIG. 6 summarizes equalization performance, which shows the averaged percent reduction/improvement in MSE and SER from the NLD impaired data for multiple modulation orders. Note that 0% SER improvement for QPSK was because the received signal's SER was already very low.

(32) The nonlinear equalization scheme presented by integrating the Volterra series non-linear model with deep neural networks yields superior results over conventional nonlinear equalization approaches in mitigating nonlinear power amplifier distortions. It finds application for many 5G communication scenarios.

(33) The technology may be implemented as an additional component in a receiver, or within the digital processing signal chain of a modern radio. A radio is described in US 20180262217, expressly incorporated herein by reference.

(34) In an implementation, a base station may include a SDR receiver configured to allow the base station to operate as an auxiliary receiver. In an example implementation, the base station may include a wideband receiver bank and a digital physical/media access control (PHY/MAC) layer receiver. In this example, the SDR receiver may use a protocol analyzer to determine the protocol used by the source device on the uplink to the primary base station, and then configure the digital PHY/MAC layer receiver for that protocol when operating as art auxiliary receiver. Also, the digital PHY/MAC layer receiver may be configured to operate according to another protocol when operating as a primary base station. In another example, the base station may include a receiver hank for a wireless system, for example, a fifth Generation (5G) receiver bank, and include an additional receiver having SDR configurable capability. The additional receiver may be, for example, a digital Wi-Fi receiver configurable to operate according to various Wi-Fi protocols. The base station may use a protocol analyzer to determine the particular Wi-Fi protocol used by the source device on the uplink to the primary base station. The base station may then configure the additional receiver as the auxiliary receiver for that Wi-Fi protocol.

(35) Depending on the hardware configuration, a receiver may be used to flexibly provide uplink support in systems operating according to one or more protocols such as the various IEEE 802.11 Wi-Fi protocols, 3.sup.rd Generation Cellular (3G), 4.sup.th Generation Cellular (4G) wide band code division multiple access (WCDMA), Long Term Evolution (LTE) Cellular, and 5.sup.th generation cellular (5G).

(36) See, 5G References, infra.

(37) Processing unit may comprise one or more processors, or other control circuitry or any combination of processors and control circuitry that provide, overall control according to the disclosed embodiments. Memory may be implemented as any type of as any type of computer readable storage media, including non-volatile and volatile memory.

(38) The example embodiments disclosed herein may be described in the general context of processor-executable code or instructions stored on memory that may comprise one or more computer readable storage media (e.g., tangible non-transitory computer-readable storage media such as memory). As should be readily understood, the terms “computer-readable storage media” or “non-transitory computer-readable media” include the media for storing of data, code and program instructions, such as memory, and do not include portions of the media for storing transitory propagated or modulated data communication signals.

(39) While the functionality disclosed herein has been described by illustrative example using descriptions of the various components and devices of embodiments by referring to functional blocks and processors or processing units, controllers, and memory including instructions and code, the functions and processes of the embodiments may be implemented and performed using any type of processor, circuit, circuitry or combinations of processors and or circuitry and code. This may include, at least in part, one or more hardware logic components. For example, and without limitation, illustrative types of hardware logic components that can be used include field programmable gate arrays (FPGAs), application specific integrated circuits (ASICs), application specific standard products (ASSPs), system-on-a-chip systems (SOCs), complex programmable logic devices (CPLDs), etc. Use of the term processor or processing unit in this disclosure is mean to include all such implementations.

(40) The disclosed implementations include a receiver, one or more processors in communication with the receiver, and memory in communication with the one or more processors, the memory comprising code that, when executed, causes the one or more processors to control the receiver to implement various features and methods according to the present technology.

(41) Although the subject matter has been described in language specific to structural features and/or methodological acts, it is to be understood that the subject matter defined in the appended claims is not necessarily limited to the specific features or acts described above. Rather, the specific features and acts described above are disclosed as example embodiments, implementations, and forms of implementing the claims and these example configurations and arrangements may be changed significantly without departing from the scope of the present disclosure. Moreover, although the example embodiments have been illustrated with reference to particular elements and operations that facilitate the processes, these elements, and operations may be combined with or, be replaced by, any suitable devices, components, architecture or process that achieves the intended functionality of the embodiment. Numerous other changes, substitutions, variations, alterations, and modifications may be ascertained to one skilled in the art and it is intended that the present disclosure encompass all such changes, substitutions, variations, alterations, and modifications a falling within the scope of the appended claims.

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VOLTERRA SERIES PATENTS

(46) U.S. Patent and Published Patent Application Nos.: U.S. Pat. Nos. 4,615,038; 4,669,116; 4,870,371; 5,038,187; 5,309,481; 5,329,586; 5,424,680; 5,438,625; 5,539,774; 5,647,023; 5,692,011; 5,694,476; 5,744,969; 5,745,597; 5,790,692; 5,792,062; 5,815,585; 5,889,823; 5,924,086; 5,938,594; 5,991,023; 6,002,479; 6,005,952; 6,064,265; 6,166,599; 6,181,754; 6,201,455; 6,201,839; 6,236,837; 6,240,278; 6,288,610; 6,335,767; 6,351,740; 6,381,212; 6,393,259; 6,406,438; 6,408,079; 6,438,180; 6,453,308; 6,504,885; 6,510,257; 6,512,417; 6,532,272; 6,563,870; 6,600,794; 6,633,208; 6,636,115; 6,668,256; 6,687,235; 6,690,693; 6,697,768; 6,711,094; 6,714,481; 6,718,087; 6,775,646; 6,788,719; 6,812,792; 6,826,331; 6,839,657; 6,850,871; 6,868,380; 6,885,954; 6,895,262; 6,922,552; 6,934,655; 6,940,790; 6,947,857; 6,951,540; 6,954,476; 6,956,433; 6,982,939; 6,992,519; 6,999,201; 6,999,510; 7,007,253; 7,016,823; 7,061,943; 7,065,511; 7,071,797; 7,084,974; 7,092,043; 7,113,037; 7,123,663; 7,151,405; 7,176,757; 7,209,566; 7,212,933; 7,236,156; 7,236,212; 7,239,301; 7,239,668; 7,251,297; 7,268,620; 7,272,594; 7,286,009; 7,295,961; 7,304,591; 7,305,639; 7,308,032; 7,333,559; 7,348,844; 7,400,807; 7,403,884; 7,412,469; 7,423,699; 7,436,883; 7,443,326; 7,489,298; 7,512,900; 7,542,518; 7,551,668; 7,570,856; 7,571,401; 7,576,606; 7,589,725; 7,590,518; 7,602,240; 7,606,539; 7,610,183; 7,657,405; 7,720,232; 7,720,236; 7,728,658; 7,729,446; 7,733,177; 7,746,955; 7,755,425; 7,760,887; 7,773,692; 7,774,176; 7,795,858; 7,796,960; 7,808,315; 7,812,666; 7,821,337; 7,821,581; 7,822,146; 7,826,624; 7,847,631; 7,852,913; 7,853,443; 7,864,881; 7,873,172; 7,885,025; 7,885,797; 7,889,007; 7,894,788; 7,895,006; 7,899,416; 7,902,925; 7,903,137; 7,924,942; 7,929,375; 7,932,782; 7,970,150; 7,970,151; 7,979,837; 7,991,073; 7,991,167; 7,995,674; 8,005,858; 8,023,668; 8,031,882; 8,039,871; 8,045,066; 8,046,199; 8,065,060; 8,089,689; 8,105,270; 8,139,630; 8,148,983; 8,149,950; 8,160,191; 8,165,854; 8,170,508; 8,185,853; 8,193,566; 8,195,103; 8,199,399; 8,213,880; 8,244,787; 8,260,732; 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