APPARATUS AND METHOD FOR REDUCING TEMPERATURE INFLUENCE IN MEASURING SWITCHING CURRENT

20220286115 · 2022-09-08

Assignee

Inventors

Cpc classification

International classification

Abstract

An apparatus for reducing a temperature influence in measuring a switching current based on stray inductance. The apparatus includes a current detector configured to output a voltage derived from a differential component of a current so as to detect a switching current of a power module, a filter configured to filter the voltage output from the current detector, an integrator configured to integrate a voltage output from the filter, an ADC configured to convert an analog voltage output from the integrator into a digital voltage and sample the digital voltage, a scaler configured to convert a sampled integrator output value output from the ADC into a scaled current value, and a compensator configured to remove a temperature dependent DCR effect from the scaled current value.

Claims

1. An apparatus, comprising: a current detector configured to output a voltage derived from a differential component of a current to detect a switching current of a power module; a filter configured to filter the voltage output from the current detector; an integrator configured to integrate a voltage output from the filter; an analog-to-digital converter (ADC) configured to convert an analog voltage output from the integrator into a digital voltage and to sample the digital voltage; a scaler configured to convert a sampled integrator output value output from the ADC into a scaled current value; and a compensator configured to remove a temperature dependent direct current resistance (DCR) effect from the scaled current value.

2. The apparatus of claim 1, wherein the filter is a high pass filter (HPF).

3. The apparatus of claim 1, wherein the filter is a low pass filter (LPF).

4. The apparatus of claim 1, wherein the integrator comprises an operational amplifier (OP AMP) and is configured to operate by receiving a pulse width modulation (PWM) switching signal from a controller.

5. The apparatus of claim 1, further comprising a reset circuit configured to perform resetting such that an integral value is not accumulated when the integrator performs an integration operation.

6. The apparatus of claim 5, wherein, during a PWM-ON sequence, the integrator is configured to perform the integration operation, and during a PWM-OFF sequence, the reset circuit is configured to perform a reset operation.

7. The apparatus of claim 5, wherein the reset circuit is configured to perform a reset operation through at least one switch opened and closed in response to a pulse width modulation (PWM) switching signal.

8. The apparatus of claim 1, wherein the compensator is configured to perform a compensation process on a current sampled by the ADC using a software algorithm to output a current from which a stray resistance component is removed.

9. The apparatus of claim 1, wherein the compensator comprises a software algorithm using parameters for compensating for a current variation flowing in stray inductance and stray resistance, a filtered current variation of an Rs error component and an inverter resistor-inductor (RL) circuit, and the Rs error component to remove a stray resistance component from the switching current.

10. A method, comprising: filtering a voltage output from a current detector configured to output a voltage derived from a differential component of a current to detect a switching current of a power module; integrating the filtered voltage; converting an integrated analog voltage into a digital voltage to sample the digital voltage; converting a sampled integrator output value into a scaled current value; and compensating for a current by removing a temperature dependent direct current resistance (DCR) effect from the scaled current value.

11. The method of claim 10, wherein the filtering is high-pass filtering.

12. The method of claim 10, wherein the filtering is low-pass filtering.

13. The method of claim 10, wherein the integrating is performed using an operational amplifier (OP AMP), which is configured to operate by receiving a received pulse width modulation (PWM) switching signal.

14. The method of 10, further comprising performing resetting such that an integral value is not accumulated when an integration operation is performed.

15. The method of claim 14, wherein during a PWM-ON sequence, the integration operation is performed, and during a PWM-OFF sequence, the resetting is performed.

16. The method of claim 14, wherein, in the resetting, a reset operation is performed by at least one switch opened and closed in response to a pulse width modulation (PWM) switching signal.

17. The method of claim 10, wherein the compensating comprises performing a compensation process on a sampled current using a software algorithm to output a current from which a stray resistance component is removed.

18. The method of 10, wherein the compensating is performed by a software algorithm using parameters for compensating for a current variation flowing in stray inductance and stray resistance, a filtered current variation of an Rs error component and a current variation of an inverter resistor-inductor (RL) circuit, and the Rs error component to remove a stray resistance component from the switching current.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

[0024] The above and other objects, features and advantages of the present invention will become more apparent to those of ordinary skill in the art by describing exemplary embodiments thereof in detail with reference to the accompanying drawings, in which:

[0025] FIG. 1 is an exemplary diagram of a current detector (20) for measuring a switching current for each phase of a power module (power semiconductor) (10);

[0026] FIG. 2 is a block diagram of an apparatus for reducing a temperature influence in measuring a switching current based on stray inductance according to the present invention;

[0027] FIGS. 3A and 3B are exemplary circuit diagrams of a current detector (20), a filter (30), and an integrator (40) of FIG. 2, FIG. 3A illustrates an embodiment in which a high pass filter (HPF) is used as a filter, and FIG. 3B illustrates an embodiment in which a low pass filter (LPF) is used as a filter;

[0028] FIGS. 4 to 7 are for describing an integrator (40), FIG. 4 illustrates an embodiment when a filter (30) is provided as an HPF, FIGS. 5A-5Cc are waveform diagrams for describing operations of an integration mode and a reset mode, FIG. 6 illustrates an embodiment when a filter 30′ is provided as an LPF, and FIG. 7 illustrates another embodiment of the HPF, that is, the filter (30) shown in FIG. 4; and

[0029] FIGS. 8A-8D show simulation result graphs showing a result of compensating for a stray resistance component according to the present invention.

DETAILED DESCRIPTION OF EXEMPLARY EMBODIMENTS

[0030] The advantages and features of the present invention and methods for accomplishing the same will be more clearly understood from embodiments to be described in detail below with reference to the accompanying drawing. However, the present invention is not limited to the following embodiments but may be implemented in various different forms. Rather, these embodiments are provided only to complete the disclosure of the present invention and to allow those skilled in the art to understand the category of the present invention. The present invention is defined by the category of the claims. Meanwhile, terms used in this specification are to describe the embodiments and are not intended to limit the present invention. As used herein, singular expressions, unless defined otherwise in context, include plural expressions. It will be further understood that the terms “comprises,” “comprising,” “includes,” and/or “including,” when used herein, specify the presence of stated elements, steps, operations, and/or components but do not preclude the presence or addition of one or more other elements, steps, operations, and/or components.

[0031] FIG. 2 is a block diagram of an apparatus for reducing a temperature influence in measuring a switching current based on stray inductance according to the present invention.

[0032] As described in FIG. 1, a current detector 20 detects a switching current i.sub.sw flowing between a Kelvin pin and a source pin, having therebetween stray inductance L.sub.s and stray resistance R.sub.s, through which the switching current i.sub.sw of a power module 10 flows. the current detector 20 outputs the voltage v.sub.didt derived from a differential component of the current i.sub.sw.

[0033] The apparatus of the present invention includes: a filter 30 which filters a voltage v.sub.didt by being connected in parallel to the current detector 20; an integrator 40 which integrates a voltage of output from the filter 30; an analog-to-digital converter (ADC) 50 which converts an analog voltage v.sub.intg output from the integrator 40 into a digital voltage, and performs sampling of the converted digital voltage; a scaler 60 which converts a sampled integrator output value v.sub.intg_samp output from the ADC 50 into a current value i.sub.sw_samp; and a compensator 70 which removes a temperature dependent dc resistance (DCR) effect from the scaled current i.sub.sw_samp.

[0034] Each component of FIG. 2 will be described in detail.

[0035] FIGS. 3A and 3B are exemplary circuit diagrams of the current detector 20, the filter 30, and the integrator 40 of FIG. 2. Specifically, FIG. 3A illustrates an embodiment in which a high pass filter (HPF) is used as the filter 30, and FIG. 3B illustrates an embodiment in which a low pass filter (LPF) is used as the filter 30.

[0036] In FIG. 3A, a Kelvin-to-source voltage V_KS derived from the switching current i.sub.sw flowing in the power module 10 is

[00003] V didt = L s di sw dt + R s i sw .

The Kelvin-to-source voltage V_KS(=v.sub.didt) is indicated by V.sub.stray in FIGS. 3A and 3B. The V.sub.stray passes through the filter 30 and is input to the integrator 40. The filter 30 may be implemented as a resistor-capacitor (RC) filter as shown in the drawing and may be implemented as the HPF of FIG. 3A or the LPF of FIG. 3B. Filter parameters of the filter 30 may be set to R.sub.f*C.sub.f=L.sub.s/R.sub.s. (R.sub.f and C.sub.f will be described later)

[0037] The integrator 40 may be implemented using an OP AMP. The integrator 40 operates by receiving a PWM switching signal from a controller (for example, a microcomputer). An integrator output v.sub.intg and the switching current i.sub.sw have a relationship of

[00004] v intg = ( 1 sR i C i ) .Math. sR f C f R s .Math. ( s L s R s + 1 ) sR f C f + 1 i sw .

(wherein s denotes a constant, and R.sub.i and C.sub.i will be described later)

[0038] Meanwhile, a reset circuit may be required to perform resetting for every switching period such that an integral value should not be accumulated when the integrator performs an integration operation. The reset circuit may be included in the integrator 40. Alternatively, the reset circuit may not be included in the integrator 40 and may be provided as a separate circuit. The integrator 40 and the reset circuit will be described in detail later.

[0039] Returning to FIG. 2, the scaler 60 applies a scaling constant

[00005] K scale = R i C i R f C f R s

to V.sub.intg_samp provided from the ADC 50 to output a sampled switching current i.sub.sw_samp.

[0040] The compensator 70 performs a compensation process on the sampled switching current i.sub.sw_samp using a software algorithm, and thereby outputs a current i.sub.s_hat from which a temperature dependent DCR (stray resistance) component is removed.

[0041] An integrator 40 will be described in detail with reference to FIGS. 4 to 7.

[0042] FIG. 4 illustrates an embodiment when a filter 30 is provided as an HPF. The HPF is an RC filter based HPF in which a filter capacitor C.sub.f is connected to a source pin of a current detector 20 and a filter resistor R.sub.f is connected to a Kelvin pin of the current detector 20, and the filter capacitor C.sub.f and the filter resistor R.sub.f are connected in series. An output voltage V_HPF of the filter 30 is applied to a negative input terminal of an integrator OP AMP through an integrator resistor R.sub.i. A positive input terminal of the OP AMP is connected to the Kelvin pin and is grounded. An integrating capacitor C.sub.i is connected between the negative input terminal and an output terminal of the OP AMP.

[0043] A reset circuit has been described above. The reset circuit is illustrated in FIG. 4. The reset circuit is formed such that a switch 1 configured to connect both ends the integrating capacitor C.sub.i interworks with a switch 2 configured to connect both ends the filter capacitor C.sub.f. The switch 1 and the switch 2 operate in response to a PWM switching signal S (=1 or =0) applied to a switching device(s) of a power module 10. As an example, a separate circuit may be provided to generate a reset signal V.sub.reset (see FIG. 4) for opening or short-circuiting the switch 1 and the switch 2 when the PWM switching signal is 1 or 0.

[0044] That is to say, during a switching device's PWM-ON sequence in which the PWM switching signal S=1 is applied to the switching device, the reset signal V.sub.reset=0 opens both the switch 1 and the switch 2, and thus, the OP AMP operates as an integrator to measure a current. On the other hand, during a switching device's PWM-OFF sequence in which the PWM switching signal S=0 is applied to the switching device, the reset signal V.sub.reset=1 short-circuits both the switch 1 and the switch 2, and thus, energy (voltage) having been charged in the integrating capacitor C.sub.i and the filter capacitor C.sub.f is discharged to reset the OP AMP.

[0045] FIGS. 5A-5C show waveforms of an A-phase switching current Ia_sw, an output voltage of an integrator (Vintg*K.sub.scale), PWM ON/OFF signal S, and a capacitor voltage Vcf of an RC filter 30, for describing operations of the integration mode and the reset mode.

[0046] FIG. 6 illustrates an embodiment when a filter 30′ is provided as an LPF. Unlike that shown in FIG. 4, the LPF is an RC filter based LPF in which a filter resistor R.sub.f is connected to a source pin of a current detector 20, a filter capacitor C.sub.f is connected to a Kelvin pin of the current detector 20, and the filter resistor R.sub.f and the filter capacitor C.sub.f are connected together. An output voltage V_LPF of the filter 30′ is applied to a positive input terminal of an integrator, i.e., OP AMP. A negative input terminal of the OP AMP is connected to the source pin through an integrator resistor R.sub.i. An integrating capacitor C.sub.i is connected between the negative input terminal and an output terminal of the OP AMP. In addition, similar to the case of FIG. 4, a reset circuit is formed such that a switch 1 configured to connect both ends the integrating capacitor C.sub.i interworks with a switch 2 configured to connect both ends of the filter capacitor C.sub.f. As described above, the switch 1 and the switch 2 operate in response to a PWM switching signal S (=1 or 0). A reset operation is the same as that of FIG. 4.

[0047] In addition, FIG. 7 illustrates another embodiment of the HPF, that is, the filter 30 shown in FIG. 4. While as a reset circuit there remains only the switch 1 connecting both ends of an integrating capacitor C.sub.i, the switch 2 connecting both ends of a capacitor C.sub.f is omitted. During a PWM-OFF sequence, the integrating capacitor C.sub.i is reset using the switch 1, and during a PWM-OFF sequence, the capacitor C.sub.f of an HPF is reset through a path 42 for connecting the switch 2 and the capacitor C.sub.f. Therefore, the separate switch 2 is not used.

[0048] Next, the compensator 70 will be described in detail.

[0049] The compensator 70 is implemented through a compensation algorithm using response characteristics of a three-phase inverter circuit (resistor-inductor (RL) circuit) and an RC filter. Since a power module has a temperature sensor (e.g., NTC), the compensator 70 may calculate a variation of a stray resistance value using the temperature sensor.

[0050] The compensator 70 provides a current value i.sub.s_hat by removing a DCR component from a current value i.sub.sw (to be exact, i.sub.sw_samp shown in FIG. 2) using Equation below. The current value i.sub.s_hat is a measured value of a switching current from which a stray resistance component is removed. That is,

[00006] i s - hat ( t ) = I sw , meas ( t ) - Δ i sw ( t ) - Δ i sw _ fil t ( t ) k R s ( t ) + Δ i sw ( t ) = i sw , meas ( t ) k R s ( t ) + ( 1 - 1 k R s ( t ) ) Δ i sw ( t ) - Δ i sw _ fil t ( t ) k R s ( t )

[0051] In Equation above, a current variation, which flows in an inverter RL circuit (i.e., stray inductance and stray resistance present between a Kelvin pin K and a source pin S of a power module), may be calculated as in Equation below.

[00007] Δ i sw ( t ) = ( 1 - e - Rm L m t ) .Math. ( V s * - E s ) R m .Math. u ( t ) t L m ( V s * - E s ) .Math. u ( t )

[0052] In addition, in Equation above, a filtered current variation of an Rs error (or variation) component and the inverter RL circuit may be calculated as in Equation below.

[00008] Δ i sw _ fil t ( t ) = k 2 ( t ) .Math. ( V s * - E s ) .Math. u ( t ) = Δ R s R s , 25 .Math. 1 R m ( 1 - L m e - R m L m t - R f C f R m e - 1 R f C f t ( L m - R f C f R m ) ) .Math. ( V s * - E s ) .Math. u ( t )

[0053] In addition, in Equation above, a parameter for compensating for the R.sub.s error (or variation) component may be calculated as in Equation below.

[00009] k R s ( t ) = 1 + f ( R f , C f ) = 1 + Δ R s R s , 25 ( 1 - e - t R f C f )

[0054] In Equations above, 0<t<D*Ts, wherein D refers to a duty cycle having a value between 0 and 1, R.sub.s and L.sub.s refer to stray resistance and stray inductance, R.sub.f and C.sub.f refer to RC filter parameters (of an HPF or an LPF), R.sub.m and L.sub.m refer to RL circuit parameters (for a three-phase inverter), R.sub.s,25 refers to an original R.sub.s value at temperature 25° C., and ΔR.sub.s refers to an error or variation of R.sub.s.

[0055] FIGS. 8A-8D show simulation results showing a result of compensating for a stray resistance component according to the present invention. It shows a comparison between results before and after a compensational operation of the compensator 70.

[0056] Simulation conditions are as follows.

[0057] A stray resistance R.sub.s=1.5×R.sub.s,25 (at power module temperature T.sub.c=125° C.)

[0058] When a filter is applied, a sensing error is 22.5% (45 A)

[0059] When a filter and a compensation algorithm are applied, a sensing error is 2% (4 A)

[0060] The meanings of variables and parameters shown in FIG. 8 are as follows.

Ias, Ibs, and Ics: A-phase, B-phase, and C-phase currents [A]
Ias_hat: sampled switching current [A] of A-phase
Ias_hat_f1: compensated current [A]
Ia_sw: switching current [A] of A-phase
Ia_sw_meas: output of the integrator multiplied by R.sub.i×C.sub.i/L.sub.s [A]
Ias_samp: sampled switching current [A] of A-phase
Delta_IL: current variation Δi.sub.sw(t)
Delta_IL_filt: filtered current variation Δi.sub.sw_filt(t)
Krs: parameter for compensation
d_calc: duty ratio

[0061] According to the present invention, it is possible to increase current measurement accuracy by minimizing the influence of dc resistance (DCR) that is changed as a temperature. It is possible to reduce costs required for a switching current measuring sensor. That is, a current transducer or a Hall effect sensor is used in the existing products, but according to the present invention, costs are reduced because a magnetic core required to constitute such sensors does not need to be used. In addition, since the magnetic core is not used, a size of an inverter product including a power module can be thereby effectively reduced.

[0062] Ultimately, accurate switching current can be measured by the present invention, thereby quickly and accurately detecting sensing an arm short circuit or an overcurrent phenomenon to protect a power semiconductor.

[0063] While configurations of the present invention have been described above with reference to the accompanying drawings, it is by way of example only. Those skilled in the art can make various modifications and changes within the technical spirit of the present invention. Therefore, the scope of the present invention should not be limited to the above-described embodiments but should be determined by the appended claims.