Crystallisation of amorphous silicon from a silicon-rich aluminium substrate

Abstract

The invention relates to a method for manufacturing a semiconductor component comprising a thin layer of crystalline silicon on a substrate, comprising the steps of: providing a silicon-rich aluminum substrate (S0), depositing a thin layer of amorphous silicon on the substrate (S1), and applying thermal annealing (S2) to the thin layer of amorphous silicon to obtain a thin layer of crystalline silicon on the substrate.

Claims

1. A method of manufacturing a semiconductor component comprising a thin layer of crystalline silicon on a substrate, said method comprising: providing a substrate comprising an aluminum and silicon alloy initially having between 12% and 50% of silicon, depositing a thin layer of amorphous silicon, said thin layer of amorphous silicon being in direct contact with the aluminum and silicon alloy of the substrate, and applying thermal annealing to the thin layer of amorphous silicon to obtain the thin layer of crystalline silicon, said thin layer of crystalline silicon being in direct contact with the aluminum and silicon alloy of the substrate, wherein the substrate, after thermal annealing, comprises the same proportion of silicon than before thermal annealing.

2. The method according to claim 1, wherein the thin layer of crystalline silicon comprises a surface coating of silicon mixed with aluminum, and wherein the method further comprises etching the surface of the thin layer of crystalline silicon to remove the surface coating.

3. The method according to claim 1, wherein the thermal annealing temperature is between 450 and 550° C. for periods of between twenty minutes and twelve hours, and is applied to an amorphous silicon layer of thickness between 1 and 10 μm.

4. The method according to claim 1, wherein the thin layer of crystalline silicon is a thin layer of P+ doped poly-crystalline silicon with aluminum.

5. The method according to one claim 1, further comprising depositing a second thin layer of silicon on the thin layer of crystalline silicon, wherein the thin layer of crystalline silicon forms a seed to promote the deposition of the second thin layer of silicon.

Description

(1) Other features and advantages of the invention will become apparent upon examining the detailed description below, and the appended drawings, wherein:

(2) FIG. 1 shows an exemplary embodiment of the method according to the invention, of the crystallization of amorphous silicon on a silicon-rich aluminum substrate;

(3) FIG. 2 schematically shows a solar cell comprising a P+ doped thin layer obtained by implementing the method of the invention.

(4) The invention provides a low temperature crystallization method for an amorphous silicon layer on a silicon-rich aluminum substrate. The silicon-rich aluminum substrate is used as a catalyst for the crystallization of amorphous silicon and provides a continuous polycrystalline silicon layer that may be used as a back surface field (BSF) of photovoltaic solar cells. It has been observed that a pure aluminum substrate is not suitable for direct use because of the high diffusivity and solubility of silicon in aluminum. The use of the silicon-rich aluminum substrate thus makes it possible to limit the diffusion and crystallization of amorphous silicon on the surface.

(5) Such a method makes it possible to obtain a crystalline silicon film a few microns thick, directly on a silicon-rich aluminum substrate.

(6) In an exemplary embodiment, the method comprises three steps: (i) deposition of the intrinsic amorphous silicon on a silicon-rich aluminum substrate, (ii) annealing at low temperature (for example less than 550° C.), and (iii) a chemical etching process for etching the residual surface layer consisting essentially of aluminum and silicon in order to access the underlying polycrystalline layer.

(7) Thus, with reference to FIG. 1, the crystallization of the amorphous silicon on a silicon-rich aluminum substrate may be obtained as follows.

(8) In a first step S1, a deposit of the intrinsic amorphous silicon 110 is carried out in a reactor, for example of the PECVD type (Plasma Enhanced Chemical Vapor Deposition), or other, on the silicon-rich aluminum substrate 10. Thicknesses between 1 and 10 μm are deposited at a growth rate of the order of 50 to 100 nm/s, for example about 90 nm/s. More precisely, the deposition conditions may be as follows: a microwave power of between 600 and 700 W, preferably of the order of 650 W, a substrate temperature of between 200 and 300° C., preferably of the order of 250° C., a flow rate of SiH.sub.4 of between 20 and 50 sccm, preferably of the order of 30 sccm, a flow rate of argon-type neutral gas of between 20 and 50 sccm, preferably of the order of 35 sccm, and a pressure of between 30 and 50 mTorr, preferably of the order of 40 mTorr.

(9) In a second step S2, the annealing is carried out in a conventional tubular furnace under controlled nitrogen flow (flow rate of the order of 120 sccm) at temperatures of between 450° C. and 550° C., as, for example, in embodiments at 490° C., 520° C. or 550° C., and durations between twenty minutes and twelve hours. The higher the annealing temperature, the shorter the annealing time. It should be further noted that the melting point of the substrate (eutectic at atmospheric pressure) is only slightly higher or close to 550° C. In addition, under the conditions of a conventional Al—Si alloy substrate with more than 50% aluminum, the annealing temperature should be limited to about 550° C., and, if necessary (depending on the thickness of the amorphous Si layer or other parameter), the duration of annealing should be increased.

(10) During this thermal annealing step S2, a physicochemical phenomenon may possibly be explained as follows. Silicon atoms of the amorphous layer have a sufficiently high energy to leave their bond and diffuse towards the substrate. They interact with aluminum, which promotes their crystallization. These atoms then use just the amount of energy needed for their crystallization, and release the excess. Simultaneously, silicon atoms of the substrate are released and move towards the interface with the layer and also initiate crystallization. Moreover, the amount of aluminum that may also migrate to the overlying layer is limited by a “natural” barrier constituted by an oxide layer (for example alumina Al.sub.2O.sub.3) at the interface between the substrate and the overlying amorphous silicon layer.

(11) Thus, at the end of this annealing step, a polycrystalline silicon layer 11 is formed on the silicon-rich aluminum substrate 10. There is furthermore a surface layer 111 of aluminum-silicon mixture, that then needs to be stripped in a third subsequent step.

(12) In this third step S3, the silicon/aluminum mixture created on the top of the substrate is etched in a solution of HNO.sub.3, HF, H.sub.2O (in exemplary proportions of the order of 72.5 ml/1.5 ml/28 ml). Thus, as illustrated in FIG. 1, at the end of this step S3, there remains a layer 11 of P+ doped polycrystalline silicon with aluminum, on the silicon-rich aluminum substrate 10.

(13) A possible prior step S0 may be required to obtain the silicon-rich aluminum substrate 10. In reality, such a substrate is very simple to manufacture because aluminum and silicon are very miscible and the Al/Si alloy is very easy to achieve.

(14) For a photovoltaic application, the absorbent layer of the cell may then be created by deposition of amorphous, or micro-amorphous, silicon, or by epitaxial growth of a thicker polycrystalline layer, on the first crystalline layer obtained from step S3 above.

(15) Reference is then made to FIG. 2 to describe the structure of a photovoltaic cell comprising such layers.

(16) The photovoltaic cell comprises, in particular: an aluminum substrate rich in silicon (metal), and a layer 11 of poly-crystalline silicon P+ doped with aluminum, which comprise, with the substrate 10, the minimum elements of such a photovoltaic cell.

(17) It will thus be understood that the substrate 10 and the layer 11 form characteristic elements of a semiconductor component within the meaning of the invention (and directly obtained by the implementation of the method of the invention), in particular, but not exclusively, for a photovoltaic application.

(18) In this particular application, the cell may further comprise a layer of silicon 12 (P doped), which may be amorphous or crystalline, wherein the underlying layer 11 forms a seed to promote the deposition of this layer 12. In addition, deposition of an N doped additional layer 13, (for example doped amorphous silicon) may be provided to form the “diode” corresponding to the complete cell. Conventionally, provision is furthermore made for a layer 14 of transparent conductive oxide (TCO), typically made of ITO (Indium-Tin-Oxygen) or zinc oxide ZnO, on which metal contacts 15 of the cell are deposited.

(19) Such an embodiment has many advantages.

(20) The aluminum plates used as substrates may be produced in an industrial manner (pouring, extrusion, etc.), thus without any industrial limit. The amorphous silicon layer precursor to crystallization is produced from a gas (silane), but alternatively it is also possible to use trichlorosilane (first by-product of the combustion of sand, and thus widely available). Annealing furnaces for heat treatment and crystallization are widely used in electronics, photovoltaics and metallurgy. Consequently, there is no limit to the method of the invention in order to obtain such a layer 11 deposited on the substrate 10. However, the limit in temperature elevation of the aluminum substrate may be given as around 550° C. maximum. In this case, however, it is sufficient to extend the duration of the annealing and the possible durations of deposition by epitaxy, if necessary.

(21) Of course, the present invention is not limited to the embodiments described above by way of example; it extends to other variants.

(22) For example, to overcome the difficulty of the temperature limit of 550° C. that is not to be exceeded a priori, an annealing furnace may be provided that is optimized to crystallize plates in large series for periods of a few hours (between 20 minutes to 12 hours) as previously described). Furthermore, it may be advantageous to treat amorphous, micro-amorphous or polycrystalline silicon layers containing, in fact, aluminum incrustation defects which affect the performance of the final solar cell. To this end, passivation of the defects in a hydrogen atmosphere at low temperature makes it possible to improve the performances.

(23) Furthermore, P doping of the second silicon layer has been described above as an example. Of course, alternatively, it may be an I (intrinsic) or N doping. In addition, the third N doped (amorphous) silicon layer may be more particularly n+ doped.