Semiconductor wafer made of single-crystal silicon and process for the production thereof

Abstract

A semiconductor wafer made of single-crystal silicon has an oxygen concentration (new ASTM) of not less than 4.9×10.sup.17 atoms/cm.sup.3 and not more than 6.5×10.sup.7 atoms/cm.sup.3 and a nitrogen concentration (new ASTM) of not less than 8×10.sup.12 atoms/cm.sup.3 and not more than 5×10.sup.13 atoms/cm.sup.3, wherein a frontside of the semiconductor wafer is covered with an epitaxial layer made of silicon, wherein the semiconductor wafer comprises BMDs of octahedral shape whose mean size is 13 to 35 nm, and whose mean density is not less than 3×10.sup.8 cm.sup.−3 and not more than 4×10.sup.9 cm.sup.−3, as determined by IR tomography.

Claims

1. A semiconductor wafer comprising single-crystal silicon with an oxygen concentration of not less than 4.9×10.sup.17 atoms/cm.sup.3 and not more than 6.5×10.sup.17 atoms/cm.sup.3 as measured by FTIR according to SEMI MF1188, and a nitrogen concentration of not less than 8×10.sup.12 atoms/cm.sup.3 and not more than 5×10.sup.13 atoms/cm.sup.3 as measured by FTIR against a known standard, wherein a frontside of the semiconductor wafer is covered with an epitaxial layer comprising silicon, and wherein the semiconductor wafer comprises BMDs of octahedral shape whose mean size is from 13 to 35 nm and whose mean density is not less than 3×10.sup.8 cm.sup.−3 and not more than 4×10.sup.9 cm.sup.−3 as determined by IR tomography, wherein the octahedral BMD shape is stable after a thermal treatment at 1000° C. for 5 hours to a depth of at least 100 μm.

2. The wafer of claim 1, wherein the wafer has a nickel getter efficiency of at least 80%.

3. The wafer of claim 1, wherein the TIS (total inner surface) of BMDs, defined as TIS=4*π*r.sup.2*D, where r=mean radius of BMD and D is the mean BMD density, is from 4.0×10.sup.11 nm.sup.2/cm.sup.3 to 7.0×10.sup.12 nm.sup.2/cm.sup.3.

4. The wafer of claim 1, wherein the nitrogen concentration is not less than 9×10.sup.12 atoms/cm.sup.3 and not more than 3.5×10.sup.13 atoms/cm.sup.3.

5. The wafer of claim 1, wherein the oxygen concentration is not less than 5.15×10.sup.17 atoms/cm.sup.3 and not more than 5.75×10.sup.17 atoms/cm.sup.3.

6. The wafer of claim 1, wherein the BMDs of octahedral shape have a mean size of 20 to 27 nm.

7. The wafer of claim 1, wherein the mean density of octahedral BMDs is not less than 1.0×10.sup.9 cm.sup.−3 and not more than 3.0×10.sup.9 cm.sup.−3, as determined by IR tomography.

8. A process for producing a semiconductor wafer of claim 1 made of single-crystal silicon, comprising pulling a single crystal from a melt according to the CZ method in an atmosphere comprising hydrogen, wherein nitrogen has been added to the melt, so that in a section of the single crystal having a uniform diameter the oxygen concentration is not less than 4.9×10.sup.17 atoms/cm.sup.3 and not more than 6.5×10.sup.17 atoms/cm.sup.3, the nitrogen concentration is not less than 8×10.sup.12 atoms/cm.sup.3 and not more than 5×10.sup.13 atoms/cm.sup.3; and the hydrogen concentration is not less than 3×10.sup.13 atoms/cm.sup.3 and not more than 8×10.sup.13 atoms/cm.sup.3; controlling a pulling velocity V such that it is within a span ΔV within which the single crystal in the section having a uniform diameter grows in a Pv region, wherein the pulling velocity V is in a subrange of the span which comprises 39% of the span and a lowest pulling velocity of the span is 26% greater than a pulling velocity at the transition from the Pv region to a Pi region; and separating the semiconductor wafer from the section of the single crystal having a uniform diameter; depositing an epitaxial layer of silicon on a frontside of the separated semiconductor wafer to form an epitaxial wafer; heat treating the epitaxial wafer at a temperature of 1015-1035° C. for 1 to 1.75 hours in an ambient comprising Ar, N.sub.2, O.sub.2 or mixtures thereof.

9. The process of claim 8, wherein the epitaxial wafer is heat treated at a temperature of 770-790° C. for 20 to 200 minutes in a first step and at a temperature of 1015-1035° C. for 1 to 1.75 hours in a second and final step.

10. A semiconductor wafer sawn from a single crystal silicon ingot grown in a P.sub.v region in the present of hydrogen, comprising single-crystal silicon with an oxygen concentration of not less than 4.9×10.sup.17 atoms/cm.sup.3 and not more than 6.5×10.sup.17 atoms/cm.sup.3 as measured by FTIR according to SEMI MF1188, and a nitrogen concentration of not less than 8×10.sup.12 atoms/cm.sup.3 and not more than 5×10.sup.13 atoms/cm.sup.3 as measured by FTIR against a known standard, wherein a frontside of the semiconductor wafer is covered with an epitaxial layer comprising silicon, and wherein the semiconductor wafer comprises BMDs of octahedral shape whose mean size is from 13 to 35 nm and whose mean density is not less than 3×10.sup.8 cm.sup.−3 and not more than 4×10.sup.9 cm.sup.−3 as determined by IR tomography, wherein the octahedral BMD shape is stable after a thermal treatment at 1000° C. for 5 hours to a depth of at least 100 μm.

11. The semiconductor wafer of claim 10 which has been treated following deposition of the epitaxial layer comprising silicon, by thermally treating at a temperature of 1015 to 1035° C. for 1 to 1.75 hours in an ambient comprising Ar, N.sub.2, O.sub.2, or a mixture thereof, to form the octahedral BMDs.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

(1) FIG. 1 shows the TIS over the ingot position for Examples 1 and 2.

(2) FIG. 2 shows the nickel getter efficiency over the ingot position for Example 1.

(3) FIG. 3 shows the mean BMD size over the ingot position for Examples 1 and 2.

(4) FIG. 4 shows the mean BMD density over the ingot position for Examples 1 and 2.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

(5) The inventors found that octahedral shaped BMDs of a semiconductor wafer as described above is stable after thermal treatments at 1000° C. for 5 hours in a depth of at least 100 μm.

(6) In one embodiment, the density of BMDs varies by not more than 50% based on a mean density.

(7) In one embodiment, the size of BMDs varies by not more than 50% based on a mean size.

(8) According to one embodiment, the nickel getter efficiency is at least 80%. More preferred is a nickel getter efficiency of at least 90%. The nickel getter efficiency is defined as by the amount of Ni on both wafer surfaces compared to the total intentional contamination of Ni.

(9) In one embodiment the nickel getter efficiency is at least 95′%.

(10) According to one embodiment the TIS (total inner surface) is from 4.0×10.sup.11 nm.sup.2/cm.sup.3 to 7×10.sup.12 nm.sup.2/cm.sup.3, preferably from 2.5×10.sup.12 nm.sup.2/cm.sup.3 to 7×10.sup.12 nm.sup.2/cm.sup.3.

(11) TIS is defined as BMD density (all)×avg. BMD surface.

(12) TIS=4*π*r.sup.2*D(BMD), where r=mean radius of BMD and D(BMD) is the BMD density.

(13) Total inner surfaces are determined by experimental data sets for each of individual measured getter efficiencies.

(14) According to one embodiment, the semiconductor wafer has an oxygen concentration (new ASTM) of not less than 5.25×10.sup.17 atoms/cm.sup.3 and not more than 6.25×10.sup.17 atoms/cm.sup.3.

(15) According to one embodiment, the semiconductor wafer has a nitrogen concentration (new ASTM) of not less than 0.7×10.sup.13 atoms/cm.sup.3 and not more than 1.3×10.sup.13 atoms/cm.sup.3.

(16) To be able to achieve adequate activity as internal getters, the density of BMDs must be not less than 3×10.sup.8/cm.sup.3. The oxygen concentration should not exceed the upper limit of 6.5×10.sup.17 atoms/cm.sup.3 because otherwise the semiconductor wafer tends to form twin dislocations on the surface of the epitaxial layer.

(17) The infrared absorption of the interstitial oxygen concentration at a wave length of 1107 cm.sup.−1 is determined by using an FTIR spectrometer. The method is performed according to SEMI MF1188. The method is calibrated with international traceable standards.

(18) The infrared absorption of the nitrogen concentration at wave lengths of 240 cm.sup.−1, 250 cm.sup.−1 and 267 cm.sup.−1 is determined by using an FTIR spectrometer. The tested material is heated to 600° C. for 6 hours prior to the measurement. The sample is cooled to 10 K during the measurement. The method is calibrated by standards with known nitrogen concentrations.

(19) The correlation to SIMS is as follows: Nitrogen conc. FTIR (at/cm.sup.3)=0.6*Nitrogen conc. SIMS(atoms/cm.sup.3).

(20) BMD size and density are determined from the center to the edge of the semiconductor wafer with an edge exclusion of 2 mm and evaluated by infrared laser scattering tomography.

(21) In the method of inspecting a wafer section by laser scattering (IR-LST=infrared laser scattering tomography) the BMD scatters the incident light which is recorded by a CCD camera close to the cleaved edge of the sample. The measurement of the density of BMDs by IR-LST is effected along a radial broken edge of the heat treated semiconductor wafer. The method of measurement is known per se (Kazuo Moriya et al., J. Appl. Phys. 66, 5267 (1989)).

(22) As an example, the LST-300A and new generations of the Light Scattering to Tomograph Micro- and Grown-in Defect Analyzer manufactured by Semilab Semiconductor Physics Laboratory Co. Ltd. can be used.

(23) The size of a BMD is calculated from its intensity of scattered light, which is measured by a CCD detector. The detectable minimum size is limited by the achievable signal-to-noise ratio—also known as camera sensitivity. The newest IR-LST generation provides a camera with lower spectral noise, offering the possibility to gain sensitivity by a longer integration time at the expense of throughput. The lower size detection limit can be decreased from about 18 nm (standard IR-LST setting) to about 13 nm in high sensitivity mode, meaning a factor of 4 in measurement time.

(24) BMDs with an octahedral shape means BMDs surrounded with plural {111} planes or BMDs surrounded with plural {111} planes and additional {100} planes. BMDs surrounded with planes other than {111} and {100} planes sometimes appear.

(25) In contrast, plate shaped BMDs are surrounded with two comparatively large {100} planes.

(26) The octahedral shape is distinguished from the plate shape as follows:

(27) Of the sizes in the {100} and {010} directions viewed from the {001} direction, the longer one is represented as A and the shorter one is represented as B.

(28) BMDs with an ellipticity (=ratio A/B) of not more than 1.5 have an octahedral shape.

(29) BMDs with an ellipticity exceeding 1.5 are plate-shaped.

(30) The diagonal size of an octahedral BMD means the longer direction A of the above {100} and {010} directions.

(31) Mean size of the octahedral BMDs is defined as mean diagonal size.

(32) The invention is also directed to a process for producing a semiconductor wafer made of single-crystal silicon, comprising pulling a single crystal from a melt according to the CZ method in an atmosphere comprising hydrogen, wherein nitrogen has been added to the melt, so that in a section of the single crystal having a uniform diameter the oxygen concentration is not less than 4.9×10.sup.17 atoms/cm.sup.3 and not more than 6.5×10.sup.17 atoms/cm.sup.3, the nitrogen concentration is not less than 8×10.sup.12 atoms/cm.sup.3 and not more than 5×10.sup.13; and the hydrogen concentration is not less than 3×10.sup.13 atoms/cm.sup.3 and not more than 8×10.sup.13 atoms/cm.sup.3;
controlling a pulling velocity V such that it is within a span ΔV within which the single crystal in the section having a uniform diameter grows in a Pv region, wherein the pulling velocity V is in a subrange of the span which comprises 39% of the span and a lowest pulling velocity of the span is 26% greater than a pulling velocity at the transition from the Pv region to a Pi region;
and separating the semiconductor wafer from the section of the single crystal having a uniform diameter;
depositing an epitaxial layer of silicon on a frontside of the separated semiconductor wafer to form an epitaxial wafer;
heat treating the epitaxial wafer at a temperature of 1015-1035° C. for 1 to 1.75 hours in an ambient comprising Ar, N.sub.2, O.sub.2 or mixtures thereof.

(33) A heat treatment of the semiconductor wafer or of the single crystal which is performed before the deposition of an epitaxial layer on the semiconductor wafer in order to generate and/or stabilize BMD seeds not dissolved during the deposition of the epitaxial layer is not a constituent of the process.

(34) The process according to the invention comprises heat treating the epitaxial wafer at a temperature of 1015-1035° C. for 1 to 1.75 hours in an ambient comprising Ar, N.sub.2, O.sub.2 or mixtures thereof. Preferably, the heat treating is done in an N.sub.2/O.sub.2 ambient.

(35) According to one embodiment, the heat treating comprises a first step at a temperature of 770-790° C. for 20 to 200 minutes and a second and final step at a temperature of 1015-1035° C. for 1 to 1.75 hours.

(36) According to one embodiment, the heat treating is started at a temperature of 600-700° C., wherein the ramp rates are not higher than 8° C./min and not lower than 2.5° C./min.

(37) According to one embodiment, the incorporation of oxygen in a section of the single crystal having a uniform diameter is controlled such that the oxygen concentration is not less than 5.25×10.sup.17 atoms/cm.sup.3 and not more than 6.25×10.sup.17 atoms/cm.sup.3.

(38) According to one embodiment, the incorporation of nitrogen in a section of the single crystal having a uniform diameter is controlled such that the nitrogen concentration is not less than 0.7×10.sup.13 atoms/cm.sup.3 and not more than 2.5×10.sup.13 atoms/cm.sup.3.

(39) The presence of hydrogen suppresses the formation of seeds of OSF defects and contributes to a uniform radial progression of the density of BMDs, in particular in the edge region of the semiconductor wafer. For this reason the single crystal of silicon from which the semiconductor wafer is separated is pulled in an atmosphere which comprises hydrogen, wherein the partial pressure of the hydrogen is preferably not less than 5 Pa and not more than 15 Pa.

(40) To determine the hydrogen concentration, a test sample in the form of a cuboid block (3 cm×3 cm×30 cm) is cut from a single crystal. The test sample is treated at a temperature of 700° C. over a period of 5 minutes and thereafter rapidly cooled. Then the hydrogen concentration is measured by FTIR spectroscopy at room temperature. Before the FTIR measurement a portion of the hydrogen that would otherwise be withdrawn from the measurement is activated by irradiating the test sample with gamma rays from a Co.sup.60 source. The energy dose of the radiation is 5000 to 21,000 kGy. A measurement campaign comprises 1000 scans at a resolution of 1 cm.sup.−1 per test sample. Vibrational bands at wavenumbers of 1832, 1916, 1922, 1935, 1951, 1981, 2054, 2100, 2120 and 2143 cm.sup.−1 are evaluated. The concentration of hydrogen is calculated from the sum of the integrated adsorption coefficients of the respective vibrational bands multiplied by the conversion factor 4.413×10.sup.16 cm.sup.−1. When the hydrogen concentration of a semiconductor wafer is to be measured the heat treatment of the test sample at a temperature of 700° C. is eschewed and a strip cut from the semiconductor wafer and having an area of 3 cm×20 cm is used as the test sample.

(41) During pulling of the single crystal the ratio V/G must remain within narrow limits within which the single crystal crystallizes with an appropriate excess of vacancies in the P.sub.v region. This is done by controlling the pulling velocity V to control the ratio V/G. In order that the single crystal grows with an appropriate excess of vacancies in the P.sub.v region the pulling velocity V is controlled with the proviso that the velocity may not take every value in a span ΔV of pulling velocities that ensure growth of the single crystal in the P.sub.v region. The allowed pulling velocity is in a sub range of the span ΔV which comprises 39% of ΔV and whose lowest pulling velocity is 26% greater than the pulling velocity V.sub.Pv/Pi at the transition from the P.sub.v region to the P.sub.i region.

(42) The pulling velocity V.sub.Pv/Pi and the span ΔV are experimentally determined, for example by pulling a test single crystal with linearly increasing or falling progress of the pulling velocity. The same hot zone as is intended for pulling a single crystal according to the invention is used. Every axial position in the test single crystal has a pulling velocity assigned to it. The test single crystal is cut axially and is examined for point defects for example by decoration with copper or by measuring the lifetime of minority charge carriers. The span ΔV extends from the lowest pulling velocity up to the highest pulling velocity at which P.sub.v region can be detected from the center to the edge of the test single crystal over a radial length of not less than 98% of the radius of the test single crystal. The lowest pulling velocity in this context is the pulling velocity V.sub.Pv/Pi.

(43) The pulling velocity V is preferably controlled in the recited fashion in the entire section of the single crystal having a uniform diameter so that all semiconductor wafers cut from this section have the intended properties. The diameter of the single crystal in this section and the diameter of the resulting semiconductor wafers is preferably not less than 200 mm, more preferably not less than 300 mm.

(44) It is further advantageous to cool the single crystal to impede the formation of defects, for example the formation of seeds of OSF defects. The cooling rates are preferably not lower than:

(45) 1.7° C./min in the temperature range from 1250° C. to 1000° C.;

(46) 1.2° C./min in the temperature range from below 1000° C. to 800° C.; and 0.4° C./min in the temperature range from below 800° C. to 500° C.

(47) The semiconductor wafer according to the invention is separated from a single crystal that has been pulled in an atmosphere comprising hydrogen from a melt doped with nitrogen (N+H codoping). The single-crystal is grown in the P.sub.v region as described above. The pulling of the single-crystal basically corresponds to the process described in WO 2017/097675 A1, which hereby is incorporated by reference.

(48) The upper lateral surface and the lower lateral surface and also the edge of the semiconductor wafer are subsequently subjected to one or more mechanical processing steps and at least one polishing step.

(49) On the polished upper lateral surface of the semiconductor wafer an epitaxial layer is deposited in a manner known per se.

(50) The epitaxial layer is preferably composed of single-crystal silicon and preferably has a thickness of 2 μm to 7 μm.

(51) The temperature during the deposition of the epitaxial layer is preferably 1100° C. to 1150° C.

(52) After epitaxial deposition the semiconductor wafer does not contain any measurable concentration of hydrogen due to out-diffusion.

(53) The semiconductor wafer and the epitaxial layer are doped with an electrically active dopant, for example boron, preferably analogously to the doping of a pp-doped epitaxial semiconductor wafer.

(54) In a further embodiment the wafer is a nn-doped epitaxial wafer.

(55) The BMDs in the semiconductor wafer are formed by subjecting the semiconductor wafer to heat treatments after the deposition of the epitaxial layer and before the production of electronic components.

(56) According to the invention, the process comprises heat treating the epitaxial wafer at a temperature of 1015-1035° C. for 1 to 1.75 hours.

(57) This is a clear advantage over the invention described in US2001/021574 A1 as the required annealing time is considerably lower. Thus, there is an advantage with regard to manufacturing cost. For a temperature of 1015° C. the annealing time needed according to US2001/021574 A1 would be 2.54 hours. For a temperature of 1035° C. the annealing time proposed by US2001/021574 A1 would be 2.04 hours.

(58) The reason for the sufficiency of lower annealing times according to the invention is the use of a crystal grown in a defined process window of the P.sub.v region using N+H codoping.

(59) According to one embodiment the process comprises heat treating the epitaxial wafer 25 in a first step at a temperature of 770-790° C. for 20 to 200 minutes and in a second and final step at a temperature of 1015-1035° C. for 1 to 1.75 hours. Between first and second step the temperature is increased to a predetermined temperature at a rate of 8° C. per minute.

(60) The inventors developed a substrate for pp- or nn-doped epitaxial wafers having BMDs with a TIS of up to 7.0×10.sup.12 at densities of 3×10.sup.8 cm.sup.−3 to 4×10.sup.9 cm.sup.−3 and sizes of 13-35 nm.

(61) By thermal treatment steps after epitaxial deposition small-sized (<40 nm) radial homogeneous BMDs of octahedral shape are formed in the substrate.

(62) Octahedral shaped BMDs will lead to reduced thermal stress after applied thermal steps at the customer.

(63) The stable octahedral BMD shape ensures a very low local stress Si matrix, thus allowing stability of sub 16 nm design rule device structures (like FinFETs).

(64) The inventive epitaxial wafer is suitable for future customer low thermal budget device cycles. There is no excess built up stress, thus slip and crack events at device structures at the <=10 nm design rule regime are avoided.

(65) Without the heat treatment steps after epitaxial deposition these low thermal budget processes would be too small to generate sufficient BMD total inner surfaces (TIS) for a nickel getter efficiency of at least 80%.

(66) The features specified in relation to the above-specified embodiments of the process for producing a semiconductor wafer made of single-crystal silicon according to the invention can be correspondingly applied to the semiconductor wafer made of single-crystal silicon according to the invention. Furthermore, the above-specified advantages in relation to the embodiments of the semiconductor wafer made of single-crystal silicon according to the invention therefore also relate to the corresponding embodiments of the process for producing a semiconductor wafer made of single-crystal silicon according to the invention. These and other features of specified embodiments of the invention are described in the claims as well as in the specification. The individual features may be implemented either alone or in combination as embodiments of the invention, or may be implemented in other fields of application. Further, they may represent advantageous embodiments that are protectable in their own right, for which protection is claimed in the application as filed or for which protection will be claimed during pendency of this application and/or continuing applications.

(67) Unless stated otherwise, all parameters mentioned above and in the following examples were determined at a pressure of the surrounding atmosphere, i.e. at about 1000 hPa, and at a relative humidity of 50%.

EXAMPLES

(68) 300 mm single-crystal silicon ingots were pulled at a subsection of the so called vacancy rich “Pv” region at a pulling speed higher than 0.45 mm/min using a horizontal magnetic field. Nitrogen was added to the melt and the crystal was pulled in an atmosphere comprising hydrogen. Correct design of the hot zone ensures that the radial V/G is small enough to obtain a silicon wafer free of agglomerated vacancy defects.

(69) The ingot nitrogen concentration measured by RT-FTIR was from 8×10.sup.12 cm.sup.−3 to 3.5×10.sup.13 cm.sup.−3. The concentration of interstitial oxygen measured by RT-FTIR was from 5.15×10.sup.17 cm.sup.−3 to 5.75×10.sup.17 cm.sup.−3.

(70) The ingot was cut into segments, singled into 300 mm silicon wafers, ground, cleaned, double side and mirror polished.

(71) Test wafers from different ingot positions (20, 25, 50, 55, 85 and 90%/seed, middle, tail) were used for epitaxial deposition and heat treatment. On each of the test wafers an epitaxial deposition step with typical epitaxial layer thickness of from 2 μm to 8 μm was applied and the resulting wafer was final cleaned.

(72) Each of the wafers was then annealed in a furnace in a 95% N.sub.2/5% O.sub.2 ambient. Different furnace cycles (one step, two-step) were applied:

Example 1

(73) Start at 650° C. with +8° C./min ramp up to final temperature of 1035° C. at a holding time of 1.1 h and ramp down at 3-5° C./min.

Example 2

(74) Start at 650° C. with +8° C./min ramp up to a temperature of 780° C., holding the temperature for 120 min, then +8° C./min ramp-up to a final temperature of 1015° C. at a holding time of 1.2 h and ramp down at 3-5° C./min.

FIGURES

(75) FIG. 1 shows the TIS over the ingot position for Examples 1 and 2. The TIS is from about 5.0×10.sup.11 nm.sup.2/cm.sup.3 up to 2.5×10.sup.12 nm.sup.2/cm.sup.3. A TIS of 2.5×10.sup.12 nm.sup.2/cm.sup.3 corresponds to a nickel getter efficiency of about 85%.

(76) FIG. 2 shows the nickel getter efficiency over the ingot position for Example 1. For all samples at the different ingot positions the getter efficiency is at least 80%.

(77) The getter test consists of a reproducible spin-on contamination of the wafers with nickel, followed by a metal drive-in at 900° C. for 30 min under argon with a cooling rate of 3° C./min at the end. Then the metal profile in the wafer is evaluated by etching step by step using a mixture of hydrofluoric and nitric acid and subsequent analysis of the respective etching solutions by ICPMS (inductively coupled plasma mass spectrometry).

(78) FIG. 3 shows the mean BMD size over the ingot position for Examples 1 and 2. The mean BMD sizes—determined by IR-LST—are from 22 to 24 nm.

(79) FIG. 4 shows the mean BMD density over the ingot position for Examples 1 and 2. The mean BMD densities—determined by IR-LST—are from 3.51×10.sup.8 to 1.55×10.sup.9 cm.sup.−3.

(80) The L×D.sup.0.6 values for Examples 1 and 2 are from 1.56×10.sup.6 to 6.86×10.sup.6, i.e. far below the 1.0×10.sup.7 lower limit mentioned in US2001/021574 A1.

Example 3

(81) One-step furnace cycles were applied to the test wafers (from ingot positions tail, medium and seed) after epitaxial deposition: Start at 650° C. with +8° C./min ramp up to final temperature of 1020° C. at a holding time of 1.7 h and ramp down at 3-5° C./min.

(82) Then BMD sizes and densities were determined and a getter test was performed as described above. The results are shown in Table 1.

(83) TABLE-US-00001 TABLE 1 Mean BMD Mean BMD Ingot Getter size density Position efficiency 23.7 mm  2.8 × 10.sup.9 cm.sup.−3 tail 98.57% 23.6 mm 1.33 × 10.sup.9 cm.sup.−3 medium 97.46% 25.9 mm 1.28 × 10.sup.9 cm.sup.−3 seed 98.83%

(84) Example 3 shows excellent getter efficiencies for nickel. Thus, this thermal cycle is the most preferred one.

(85) The above description of preferred embodiments has been given by way of example only. From the disclosure given, those skilled in the art will not only understand the present invention and its attendant advantages, but will also find apparent various changes and modifications to the structures and methods disclosed. The applicant seeks, therefore, to cover all such changes and modifications as fall within the spirit and scope of the invention, as defined by the appended claims, and equivalents thereof.