Multi-super lattice for switchable arrays

Abstract

A switchable array includes: a microstructure of interconnected units formed of graphene tubes with open spaces in the microstructure bounded by the graphene tubes; at least one JFET gate in at least one of the graphene tubes; and a control line having an end connected to the at least one JFET gate. The control line extends to a periphery of the microstructure.

Claims

1. A switchable array comprising: a microstructure of interconnected units formed of graphene tubes with open spaces in the microstructure bounded by the graphene tubes; at least one field-effect transistor (FET) gate in at least one of the graphene tubes; and a control line having an end connected to the at least one FET gate, the control line extending to a periphery of the microstructure.

2. The switchable array of claim 1, wherein the graphene tubes are arranged in an ordered structure and form symmetric patterns that repeat along principal directions of three-dimensional space.

3. The switchable array of claim 1, wherein the graphene tubes form a rigid structure.

4. The switchable array of claim 1, wherein the microstructure forms a micro-lattice.

5. The switchable array of claim 1, wherein the graphene tubes are hollow.

6. The switchable array of claim 1, wherein the graphene tubes are interconnected by chemical electronic bonds.

7. The switchable array of claim 1, wherein the control line passes through at least one open space bounded by the microstructure.

8. The switchable array of claim 7, wherein the control line passes through open spaces bounded by the microstructure.

9. The switchable array of claim 1, wherein the control line comprises a polymer plated with an electrically conductive metal.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

(1) FIG. 1A is a schematic drawing of a fabrication process for a metal-based micro-lattice template in accordance with an example.

(2) FIG. 1B is a flowchart of the fabrication process depicted schematically in FIG. 1A.

(3) FIG. 2 is a schematic diagram of the fabrication of an electrically, thermally, or both thermally and electrically conductive composite by embedding a fabricated metal-based or graphene-based micro-lattice within an organic polymer matrix.

(4) FIG. 3 is a schematic diagram of a surface functionalization methodology for functionalizing a fabricated metal-based micro-lattice.

(5) FIG. 4 is a 2D schematic representation of a graphene or graphene/polymer micro-lattice.

(6) FIG. 5 is a 2D schematic representation of the graphene or graphene/polymer micro-lattice depicted in FIG. 4 with polymer applied around the connections between the micro-lattice members.

(7) FIG. 6 is a 2D schematic representation of the graphene or graphene/polymer micro-lattice depicted in FIG. 5 with the micro-lattice members coated with dielectric and metal in the portions not having polymer applied around the connections.

(8) FIG. 7A is a 2D schematic representation of the graphene or graphene/polymer micro-lattice depicted in FIG. 6 with the plating resist removed, leaving gates.

(9) FIG. 7B is a cross-sectional view of the graphene or graphene/polymer micro-lattice shown in FIG. 7A taken along line 7B-7B.

(10) FIG. 8A is a 2D schematic representation of the graphene or graphene/polymer micro-lattice depicted in FIG. 7A with additional polymer applied around the gates.

(11) FIG. 8B is a cross-sectional view of the graphene or graphene/polymer micro-lattice shown in FIG. 8A taken along line 8B-8B.

(12) FIG. 9A is a 2D schematic representation of the graphene or graphene/polymer micro-lattice depicted in FIG. 8 with the additional polymer applied around the gates plated with metal.

(13) FIG. 9B is a cross-sectional view of the graphene or graphene/polymer micro-lattice shown in FIG. 9A taken along line 9B-9B.

(14) FIGS. 10, 11 and 12 are views from various angles of a 3D schematic representation of a graphene or graphene/polymer micro-lattice with connectors to gates on various horizontal lattice members.

(15) FIGS. 13, 14 and 15 are views from various angles of a 3D schematic representation of a graphene or graphene/polymer micro-lattice with connectors to gates on both horizontal and vertical lattice members.

DETAILED DESCRIPTION OF EXAMPLE EMBODIMENTS

(16) An organic/inorganic superstructure may be used as a template for the formation of a 3D metal superstructure that may then be used to grow graphitic carbon on the surface of the metal. The template may be fabricated through a self-propagating photopolymer waveguide technique (see, e.g., Xiaoyu Zheng et. al., Ultralight, Ultrastiff Mechanical Metamaterials; Science 344 (2014) 1373-1377 and T. A. Schaedler, et al., Ultralight Metallic Micro-lattices; Science 334 (2011) 962-965). As illustrated schematically in FIG. 1A, an interconnected 3D photopolymer lattice may be produced upon exposure of an appropriate liquid photomonomer 16 to collimated UV light 12 through a specifically designed (e.g. using a computer-aided design model 10) digital mask 14 that contains openings with certain spacing and size. The fabricated organic polymer template micro-lattice 18 may then be coated by electroless copper or other suitable metal (e.g. Ni, Co, Au, Ag, and alloys thereof) followed by etching away the organic polymeric matrix (scaffold). The resulting metal-based micro-lattice may be treated with oxygen to minimize agglomeration and then used as a template to grow graphene. The light surface oxidation may also act as a source of oxygen to increase the dehydrogenation of the hydrocarbon precursors. The thickness of the electroless plated metal may be controlled in the nanometer to micrometer range by adjusting the plating time, temperature, and/or plating chemistry.

(17) FIG. 1A schematically illustrates an example fabrication process of organic polymeric micro-lattices (scaffolds) 18 before coating with electroless plating.

(18) This description describes a “periodically structured” carbon nanostructure. Conventional carbon nanostructures are irregular and have much larger dimensions than those which may be achieved using the methodology disclosed herein.

(19) The process herein is useful to create a regular array with superstructure dimensions (unit) and structure that may be optimized for strength, thermal and other fundamental properties.

(20) Several aspects of this procedure are noteworthy: it provides a regular structure with specific defined dimensions; it can form very thin metal (e.g. Ni, Co, Ru, Cu, Ag, Au, and alloys thereof) micro-lattices; it enables the formation of graphitic carbon on very thin metals and thin metal wires or tubes.

(21) The process herein uses a polymeric structure as a template for such fabrication with the subsequent formation of a metal superstructure that may then be exposed to a hydrocarbon (e.g. methane, ethylene, acetylene, benzene) to form graphene, followed by etching of the metal from under the resulting graphene microstructure using appropriate etchants such as, for example, FeCl.sub.3 or potassium permanganate.

(22) Collimated UV light 12 through a photomask 14 or multi-photon lithography may be used in a photo-initiated polymerization process to produce a polymer micro-lattice 18 including interconnected units. Example polymers include polystyrene and poly(methyl methacrylate) (PMMA). Once polymerized in the desired pattern, the remaining un-polymerized monomer may be removed.

(23) The polymer structure (polymer scaffold) may then be plated with a suitable metal using an electroless plating process.

(24) Electroless nickel plating (EN) is an auto-catalytic chemical technique that may be used to deposit a layer of nickel-phosphorus or nickel-boron alloy on a solid workpiece, such as metal, plastic, or ceramic. The process relies on the presence of a reducing agent, for example hydrated sodium hypophosphite (NaPO.sub.2H.sub.2.H.sub.2O) which reacts with the metal ions to deposit the metal. Alloys with different percentages of phosphorus, ranging from 2-5 weight percent (low phosphorus) to up to 11-14 weight percent (high phosphorus) are possible. The metallurgical properties of the alloys depend on the percentage of phosphorus.

(25) Electroless plating has several advantages over electroplating. Free from flux-density and power supply issues, it provides an even deposit regardless of workpiece geometry, and with the proper pre-plate catalyst, may be used to deposit metals on non-conductive surfaces. In contrast, electroplating can only be performed on electrically conductive substrates.

(26) Before performing electroless plating, the material to be plated must be cleaned by a series of chemicals; this is known as a pre-treatment process. Failure to remove surface contaminants may result in poor plating. Each chemical pre-treatment must be followed by water rinsing (normally two to three times) to remove residual chemicals that may adhere to the surface. For example, de-greasing chemicals can be used to remove oils from surfaces, whereas acid cleaning is used to remove metal oxides.

(27) Activation may be done with an immersion into a sensitizer/activator solution—for example, a mixture of palladium chloride, tin chloride, and hydrochloric acid.

(28) The pre-treatment required for the deposition of metals on a non-conductive surface usually consists of an initial surface treatment to render the substrate hydrophilic. Following this initial step, the surface may be activated by a solution of a noble metal, e.g., palladium chloride. The substrate is then ready for electroless deposition.

(29) The electroless plating reaction is accomplished when hydrogen is released by a reducing agent, normally sodium hypophosphite (with the hydrogen leaving as a hydride ion) or thiourea, and oxidized, thus producing a negative charge on the surface of the part. The most common electroless plating method is electroless nickel plating, although silver, gold and copper layers can also be applied in this manner.

(30) In principle, any hydrogen-based reducing agent can be used although the redox potential of the reducing half-cell must be high enough to overcome the energy barriers inherent in liquid chemistry. Electroless nickel plating most often employs hypophosphite as the reducer while plating of other metals like silver, gold and copper typically makes use of low-molecular-weight aldehydes.

(31) A benefit of this approach is that the technique can be used to plate diverse shapes and types of surfaces.

(32) As illustrated in FIG. 1B, the organic polymeric micro-lattice may be electrolessly plated 20 with metal followed by dissolving out 22 the organic polymer scaffold. The resulting metal-based micro-lattice may be used in several applications 24; for example, it may then be coated with a thin layer of immersion tin to prevent the metal from oxidizing during subsequent processing steps which may include a heat treatment. Alternatively, the surface of the metal-based micro-lattice may be functionalized with appropriate functional groups 26 to provide anchoring or reactions sites for subsequent interaction with a polymer matrix. The fabricated and surface-treated metallic network 30 may be embedded within an organic polymeric matrix 32 to fabricate electrically and/or thermally conductive composites 34 (see FIG. 2). Alternatively, the fabricated metallic network 30 may be used as a template 28 to synthesize a graphitic carbon superstructure. The metal may then be etched out to produce a graphene microstructure including interconnected units formed of graphene tubes that are connected to other graphene tubes while still maintaining the sp.sup.2-bonded nature.

(33) FIG. 3 schematically illustrates a surface treatment methodology for functionalizing the fabricated metal-based micro-lattice. As shown in the drawing, the surface of the metal micro-lattice 36 may be exposed to a mercaptan-based compound. The mercaptan-based compound may be a hydroxylated alkyl mercaptan such as 3-mercapto-1,2 dihydroxy propane or it may be based on an isocyanate function group such as isocyanate alkyl trialkoxy silane. The mercaptan-based compound bonds to the metal (such as e.g. copper, silver or gold) through the sulfur atom of the mercapto moiety resulting in a hydroxylated metal surface 38. The hydroxyl functional groups grafted on the metal surface may then react with a reactive functional group from the pre-polymer matrix. In the case of isocyanate-based mercaptan compounds, the free isocyanate functional groups may subsequently be reacted with certain functional groups of the organic polymeric matrix such as —OH, —NH, etc. resulting in the formation of chemical bonds at the copper-organic polymer interface. The polymer for the composite may be selected for its mechanical properties and/or electronic properties. Example polymers include fluorocarbons (such as polytetrafluoroethylene) and polybutadiene.

(34) In an example, the growth of graphene on the metal tubes may be omitted in order to produce a microlattice of interconnected metal tubes. A process for forming such a metal microstructure may include: photo-initiating the polymerization of a monomer in a pattern of interconnected units to form a polymer micro-lattice; removing unpolymerized monomer; coating the polymer micro-lattice with a metal; and removing the polymer micro-lattice to leave a micro-lattice of interconnected metal tubes in a pattern of interconnected units.

(35) In another example, a metal/graphene microstructure of graphene-coated metal tubes in a pattern of interconnected units which may be prepared by the process including steps of: photo-initiating the polymerization of a monomer in a pattern of interconnected units to form a polymer micro-lattice; removing unpolymerized monomer; coating the polymer micro-lattice with a metal; removing the polymer micro-lattice to leave a metal micro-lattice; and forming graphene on the metal micro-lattice.

(36) As illustrated in FIGS. 4-15, the micro-lattice may form a switched array of connections. Among graphene's uncommon properties is its high electrical conductivity. This property makes the material attractive for many applications, but the lack of a bandgap makes it difficult to use for high-performance transistors due to its low I.sub.on/T.sub.off.

(37) Various methods are known to introduce a bandgap into graphene—e.g. by fabricating graphene in specific shapes (like ribbons), or by forming bi-layers of graphene. Further, other 2D materials such as transition metal dichalcogenides, boron-carbon-nitride, or graphene-oxide, -hydride or—fluoride, can form films with a bandgap, and thus can be used instead of or together with graphene.

(38) Referring to FIGS. 4-9, a method for fabricating micro-lattices of graphene/carbon nanotubes suitable for use in switchable arrays includes: a) patterning a graphene/carbon nanotube micro-lattice; b) patterning gates at selected locations in the micro-lattice; and, c) patterning a control-line “superlattice” for controlling the gates.

(39) The following reference numbers are used in the drawings: 10 CAD design model 12 collimated UV light 14 digital mask 16 photomonomer 18 organic polymer template 20 electroless plating on template 22 removal of template 24 applications 26 fillers for polymer matrix application 28 template to grow carbon nanotubes and graphene application 30 graphene or metallic network 32 organic or inorganic polymer 34 composite 36 metallic template 38 hydroxylated metal surface 100 graphene/cnt superlattice 102 interconnected lattice members 104 polymer surrounding connections 106 dielectric and metal coating (on 102) 108 central void 110 graphene 112 insulator 114 metal 116 gate 118 external gate contact 120 polymer surrounding gate 122 metal 124 external surface of superlattice 126 connection 128 opening in lattice 130 gate 132 gate connector

(40) FIG. 4 schematically illustrates a graphene or graphene/polymer micro-lattice 100 including interconnected units of orthogonal, interconnected members 102 as viewed from the top or side of the micro-lattice made up of graphene/polymer or graphene interconnected tubes. This stage of the process is through the graphene/polymer etch step. The portion indicated at “A” is further illustrated in FIGS. 5-9. Such a graphene or graphene/polymer micro-lattice may be fabricated by the method described above which involves a photo-initiated polymerization using multi-photon lithography or collimated light through a photomask.

(41) In FIG. 5, polymer 104 has been applied around the connections between the members 102 of the graphene or graphene/polymer micro-lattice 100 depicted in FIG. 4. This may be accomplished by immersing the micro-lattice in additional monomer and sending in a wider beam of light to photo-initiate polymerization around the connections.

(42) In FIG. 6, portions of the micro-lattice members 102 not covered by the polymer applied around the connections between them have been coated with dielectric and metal 106.

(43) In FIG. 7, the plating resist has been removed, leaving gates 116. A cross-sectional view of the gate is shown on the left of FIG. 7, in which 108 is the central void space left when the polymer is removed, 110 is the resulting graphene tube, 112 is a dielectric insulator layer, and 114 is the metal coating. Electrical contacts 118 may extend to an edge of the die.

(44) FIG. 8 depicts the result of a third polymerization step in which the micro-lattice is again immersed in monomer and beams of light slightly wider than the diameter of the gate are sent in to photo-initiate polymerization around the gates. A cross-sectional view of the gate surrounded by polymer is shown on the left of FIG. 8.

(45) In FIG. 9, the additional polymer applied around the gates is shown plated with metal 122. This is done so as to provide electrical connections to the gates. Alternatively, other electrical conductors (such as graphene, for example) could be used as the coating material.

(46) FIGS. 10-15 show how certain gates in a six-unit-cell portion of micro-lattice switchable array 100 may be controlled. Gate connectors 132 may be routed through openings 128 in micro-lattice 100 to reach selected gates 130 from external surface 124 of the superlattice via external gate contacts 118′.

(47) In FIGS. 10, 11 and 12, the gates 130 are all located in horizontal members of the lattice. In this situation, gate connectors 132 may be co-planar. FIGS. 13, 14 and 15 illustrate how a gate 130′ in a vertical member of the lattice may be reached with a “skewed” gate connector 132′ without interfering with other gate connectors 132 and lattice members.

(48) Modifications are possible in the described embodiments, and other embodiments are possible, within the scope of the claims.