PRODUCTION METHOD FOR A MICROMECHANICAL COMPONENT
20220081285 · 2022-03-17
Inventors
- Heribert Weber (Nuertingen, DE)
- Peter Schmollngruber (Aidlingen, DE)
- Thomas Friedrich (Moessingen-Oeschingen, DE)
- Andreas Scheurle (Leonberg, DE)
- Joachim Fritz (Tuebingen, DE)
- Sophielouise Mach (Reutlingen, DE)
Cpc classification
B81B2201/0257
PERFORMING OPERATIONS; TRANSPORTING
B81C2201/0132
PERFORMING OPERATIONS; TRANSPORTING
G01L9/0042
PHYSICS
B81B3/0021
PERFORMING OPERATIONS; TRANSPORTING
B81B2203/0127
PERFORMING OPERATIONS; TRANSPORTING
B81B2207/012
PERFORMING OPERATIONS; TRANSPORTING
International classification
B81C1/00
PERFORMING OPERATIONS; TRANSPORTING
Abstract
A production method for a micromechanical component for a sensor or microphone device. The method includes: patterning a plurality of first trenches through a substrate surface of a monocrystalline substrate made of at least one semiconductor material using anisotropic etching, covering the lateral walls of the plurality of first trenches with a passivation layer, while bottom areas of the plurality of first trenches are kept free or are freed of the passivation layer, etching at least one first cavity, into which the plurality of first trenches opens, into the monocrystalline substrate using an isotropic etching method, in which an etching medium of the isotropic etching method is conducted through the plurality of first trenches, and by covering the plurality of first trenches by epitaxially growing a monocrystalline sealing layer on the substrate surface of the monocrystalline substrate made of the at least one identical semiconductor material as the monocrystalline substrate.
Claims
1. A production method for a micromechanical component for a sensor or microphone device, comprising the following steps: patterning a plurality of first trenches through a substrate surface of a monocrystalline substrate, made of at least one semiconductor material, using an anisotropic etching method; covering lateral walls of the plurality of first trenches with a passivation layer, while bottom areas of the plurality of first trenches are kept free or are freed of the passivation layer; etching at least one first cavity, into which the plurality of first trenches opens, into the monocrystalline substrate using an isotropic etching method, in which an etching medium of the isotropic etching method is conducted through the plurality of first trenches; and covering the plurality of first trenches by epitaxially growing a monocrystalline sealing layer on the substrate surface of the monocrystalline substrate made of at least one identical semiconductor material as the monocrystalline substrate; forming at least one semiconductor and/or metal layer and/or at least one insulating layer, as a layer stack on and/or over the monocrystalline sealing layer, forming at least one second cavity by removing at least one partial area of the at least one semiconductor and/or metal layer and/or of the at least one insulating layer on a side of the monocrystalline sealing layer oriented away from the at least one first cavity; wherein a partial area, adjoining the at least one second cavity, of an outermost silicon layer of the layer stack is developed as a deformable diaphragm, and at least one connecting channel is formed, by which the at least one first cavity formed within the monocrystalline substrate is connected to the at least one second cavity embedded in the layer stack.
2. The production method as recited in claim 1, wherein the monocrystalline sealing layer is epitaxially grown as a monocrystalline silicon layer on the monocrystalline substrate made of silicon.
3. A micromechanical component for a sensor or microphone device, comprising: a monocrystalline substrate made of at least one semiconductor material, a plurality of first trenches being patterned through a substrate surface of the monocrystalline substrate, which opens into at least one first cavity etched into the monocrystalline substrate; and a monocrystalline sealing layer, epitaxially grown on the substrate surface of the monocrystalline substrate, made of at least one identical semiconductor material as the monocrystalline substrate, which covers the plurality of first trenches; and at least one semiconductor and/or metal layer and/or at least one insulating layer, formed as a layer stack on a side of the monocrystalline sealing layer facing away from the at least one first cavity, the at least one semiconductor and/or metal layer and/or the at least one insulating layer surrounding at least one second cavity; wherein a partial area, adjoining the at least one second cavity, of an outermost silicon layer of the layer stack is developed as a deformable diaphragm, and at least one connecting channel is formed, by which the at least one first cavity formed within the monocrystalline substrate is connected to the at least one second cavity embedded in the layer stack.
Description
BRIEF DESCRIPTION OF THE DRAWINGS
[0010] Additional features and advantages of the present invention are explained below with reference to the figures.
[0011]
[0012]
[0013]
[0014]
[0015]
[0016]
[0017]
[0018]
[0019]
DETAILED DESCRIPTION OF EXAMPLE EMBODIMENTS
[0020]
[0021] In the production method described below, a plurality of trenches 10 are patterned through a substrate surface 12a of a monocrystalline substrate 12 made of at least one semiconductor material. The plurality of trenches 10 are patterned using an anisotropic etching method. Monocrystalline substrate 12 may be a monocrystalline silicon substrate, for example. In this case, any conventional anisotropic etching method for a conventional monocrystalline silicon substrate may be carried out for patterning the plurality of trenches 10.
[0022] Prior to patterning trenches 10, an etching mask 14 may be formed on substrate surface 12a of monocrystalline substrate 12, whose straight-through cut-outs 16 define the positions, shapes and dimensions of the trenches 10 to be etched later. Etching mask 14 may be made of silicon dioxide for example, which in the case of a monocrystalline substrate 12 made of silicon may be produced in particular by thermal oxidation. Standard semiconductor processes may be used to form the straight-through cut-outs 16 in etching mask 14. Trenches 10 may then be etched having at least a height h, which is respectively definable by a duration of the isotropic etching method.
[0023] The lateral walls of the plurality of trenches 10 are covered following their formation by a passivation layer 18, while bottom areas of the plurality of trenches 10 are kept free or are freed of passivation layer 18. Passivation layer 18 may be for example a silicon dioxide layer, which in the case of a monocrystalline substrate 12 may be formed from silicon in particular by thermal oxidation, it being subsequently possible to free the bottom areas of trenches 10 of passivation layer 18 using an anisotropic etching process such as an anisotropic plasma etching process, for example. (An unwanted exposure of substrate surface 12a during the anisotropic etching process may be prevented by a sufficient layer thickness of etching mask 14 made of silicon dioxide.) As an alternative to a passivation layer 18 made of silicon dioxide, it is also possible to use a polymer layer as passivation layer 18.
[0024] In a further method step, at least one cavity 20 and 22, into which the plurality of trenches 10 opens, is etched into monocrystalline substrate 12 using an isotropic etching method, in which an etching medium of the isotropic etching method is conducted through the plurality of trenches 10.
[0025] As the isotropic etching method, it is possible to perform for example a plasma etching process, such as specifically an SF6 plasma etching process, or a gas phase etching process, in particular a ClF3 gas phase etching process or an XeF2 gas phase etching process. All of the isotropic etching methods mentioned here ensure that in a monocrystalline substrate 12 made of silicon, material of the monocrystalline substrate 12 is isotropically removed starting from the bottom areas of trenches 10 kept free or freed. A sufficiently small distance between two adjacent trenches 10 ensures that the etching fronts starting from the respective bottom areas of trenches 10 meet each other.
[0026] If the etching of the at least one cavity 20 and 22 is performed using etching mask 14 and/or passivation layer 18, etching mask 14 and/or passivation layer 18 are removed following the etching of the at least one cavity 20 or 22. If etching mask 14 and/or passivation layer 18 are made of silicon dioxide, it is possible to perform e.g. an HF gas phase etching process to remove the respective layer 14 or 18 reliably. Monocrystalline surfaces made of the at least one semiconductor material of monocrystalline substrate 12 are now exposed on substrate surface 12a, on the lateral walls of trenches 10 and possibly also on the lateral walls of the at least one cavity 20 and 22. For this reason, the plurality of trenches 10 may now be covered by epitaxial growth of a monocrystalline sealing layer 24 made of the at least one identical semiconductor material as the monocrystalline substrate 12 on substrate surface 12a of monocrystalline substrate 12. In particular, the plurality of trenches 10 may now be completely filled/closed by epitaxial growth of the monocrystalline sealing layer 24 made of the at least one identical semiconductor material as the monocrystalline substrate 12. For example, for monocrystalline substrate 12 made of silicon, monocrystalline sealing layer 24 is epitaxially grown as a monocrystalline silicon layer. Optionally, following the epitaxial deposition of the monocrystalline sealing layer 24, an annealing step may be performed in order to smooth out unwanted topographies/spikes in the at least one cavity 20 and 22. A monocrystalline silicon layer is possibly epitaxially grown even on the walls of the at least one cavity 20 and 22 until the plurality of trenches 10 is completely closed.
[0027]
[0028]
[0029] Alternatively, access opening 26 may also be patterned through a back side 12b of monocrystalline 12 facing away from substrate surface 12a.
[0030] Following the patterning of access opening 26, a first cavity 22 for example, into which access opening 26 opens, may be used as access channel 22 for a second cavity, into which first cavity 22 opens. Second cavity 20 may be used for example as a sensor cavity 20 of the micromechanical component. The position of the opening of the at least one access channel 22 into the at least one second cavity 20 may be selected in such a way that a stress-related influence on the function and/or the mechanical stability of an area of the monocrystalline sealing layer 24, which is used later as diaphragm 24m, may be minimized/excluded. Via access opening 26 and access channel 22, a defined internal pressure may be set in sensor cavity 20 and/or at least one gas may be introduced into sensor cavity 20. Following the setting of the desired internal pressure and/or the introduction of the at least one gas into sensor cavity 20, access opening 26 may be sealed in a media-tight manner. This may be done for example with the aid of a laser reseal method by melting the at least one semiconductor material of monocrystalline substrate 12 and/or of sealing layer 24 in the area of access opening 26.
[0031] The micromechanical component illustrated in
[0032]
[0033] The micromechanical component illustrated schematically in
[0034] Regarding further features of the micromechanical component of
[0035]
[0036] In the micromechanical component of
[0037] Regarding further features of the micromechanical component of
[0038]
[0039] As may be seen in
[0040] The micromechanical component of
[0041] To determine the first pressure p.sub.1 and the second pressure p.sub.2, at least one piezoresistive resistor (not shown) may be integrated both in the first partial area 24e of monocrystalline sealing layer 24 used as the first pressure-sensitive diaphragm 24e as well as in the second partial area 24f of monocrystalline sealing layer 24 used as the second pressure-sensitive diaphragm 24f. A piezoelectric dynamic pressure sensor is realized in this manner. With the aid of a further layer construction (not shown), it is also possible to determine the first pressure p.sub.1 and the second pressure p.sub.2 capacitively.
[0042] Regarding further features of the micromechanical component of
[0043]
[0044] As represented schematically in
[0045] Regarding further features of the micromechanical component of
[0046]
[0047] In the production method represented schematically by
[0048] By way of example, in the specific embodiment described here, a monocrystalline sealing layer 24 is produced at a thickness that allows for the production of a further cavity 38 in sealing layer 24. Alternatively, a further monocrystalline layer may be grown on sealing layer 24, in order to produce a sufficiently thick monocrystalline layer. The further monocrystalline layer may be formed/deposited on monocrystalline sealing layer 24 from the at least one identical semiconductor material as monocrystalline substrate 12 and/or at least one other semiconductor material (than the at least one semiconductor layer). The further monocrystalline layer may also be made of silicon, for example. Moreover, in the production method described here, in order to form the at least one further cavity 38, first a plurality of trenches 40 are patterned through a surface 24a of monocrystalline sealing layer 24. The patterning of the plurality of trenches 40 occurs by way of a further anisotropic etching method, preferably by using an etching mask 42 having straight-through cut-outs 44 formed therein. For patterning the plurality of trenches 40 in a monocrystalline sealing layer 24, any conventional anisotropic etching method for this material may be carried out. Etching mask 42 may be made of silicon dioxide for example, which in the case of a monocrystalline sealing layer 24 made of silicon may be produced in particular by thermal oxidation. The lateral walls of the plurality of trenches 40 are then covered by a further passivation layer 46, while bottom areas of the plurality of trenches 40 are kept free or are freed of the further passivation layer 46. Passivation layer 46 may be for example a silicon dioxide layer, in the case of a monocrystalline sealing layer 24 made of silicon in particular a silicon dioxide layer formed by thermal oxidation, or a polymer layer.
[0049] Subsequently, the at least one further cavity 38 is etched into the monocrystalline sealing layer 24 using a further isotropic etching method, in which an etching medium of the further isotropic etching method is conducted through the plurality of trenches 40. As the further isotropic etching method, it is possible to perform for example a plasma etching process, such as specifically an SF6 plasma etching process, or a gas phase etching process, in particular a ClF3 gas phase etching process or an XeF2 gas phase etching process.
[0050] If the etching of the at least one cavity 38 occurs using etching mask 42 and/or passivation layer 46, etching mask 42 and/or passivation layer 46 are removed following the etching of the at least one further cavity 38. If etching mask 42 and/or passivation layer 46 are made of silicon dioxide, it is possible to perform e.g. an HF gas phase etching process to remove the respective layers 42 or 46 reliably.
[0051]
[0052] Regarding further method steps of the production method of
[0053]
[0054] As a further development to previously explained specific embodiments, micromechanical component illustrated schematically in
[0055] The micromechanical component illustrated schematically in
[0056] The at least one cavity 20 formed within monocrystalline substrate 12 is thus connected to cavity 38a embedded in layer stack 52 via the at least one connecting channel 54. The at least one purposefully introduced connecting channel 54 allows for an exchange of gas between the at least one cavity 38a embedded in layer stack 52 and the at least one cavity 20 formed within monocrystalline substrate 12. Outgassing substances, such as for example hydrogen, nitrogen, oxygen (e.g. outgassed from TEOS, tetraethyl orthosilicate), doping substances and carbonaceous gases forming in the process, such as in particular methane or ethane, are thus able to spread out in a larger volume across the cavities 20 and 38a connected to each other via the at least one connecting channel 54. One can also paraphrase the interconnection of cavities 20 and 38a via the at least one connecting channel 54 as a “volume enlargement” of cavity 38a. In an appropriately enlarged cavity volume, an identical quantity of outgassing substances results in a smaller change of the internal pressure. Outgassing effects within cavity 38a, as they occur in particular at higher temperatures, therefore have hardly any influence on pressure measurements performed using deformable diaphragm 53.
[0057] In conventional pressure sensors, outgassing effects frequently result in an increase of an internal pressure in a hollow space of the respective pressure sensor and thus in a drift of sensor signals of the respective pressure sensor. In contrast, in the micromechanical component of
[0058] As an advantageous development, it is also possible to use the at least one cavity 20 formed within monocrystalline substrate 12 and the at least one connecting channel 54 to conduct an etching gas from outside the micromechanical component into the volume of the at least one subsequent cavity 38a of layer stack 52 in order to expose the at least one cavity 38a embedded in layer stack 52. To expose the at least one cavity 38a embedded in layer stack 52, it is possible to perform a sacrificial oxide layer etching process for example, such as in particular HF gas phase etching. Moreover, the at least one cavity 20 formed within monocrystalline substrate 12 and the at least one connecting channel 54 also contribute toward decoupling the stress of the micromechanical component.
[0059] Regarding further features of the micromechanical component of
[0060]
[0061] In the micromechanical component illustrated schematically in
[0062] Furthermore, a sensing area 56 equipped with the cavity 38a used for pressure measurements is separated/insulated from a remaining area of the micromechanical component by a trench 58 surrounding sensing area 56 at least partially and by a cavity 20a formed on a side facing away from deformable diaphragm 53 of cavity 38a, which is formed within monocrystalline substrate 12 and into which trench 58 opens. A low-stress suspension of sensing area 56 is thus realized by trench 58 and by cavity 20a formed within monocrystalline substrate 12.
[0063] Regarding further features of the micromechanical component of
[0064]
[0065] The micromechanical component illustrated schematically in
[0066] Regarding further features of the micromechanical component of
[0067] The micromechanical components described above and the products obtained by the production methods explained above may be used as (parts of) pressure sensors such as piezoresistive pressure sensors or capacitive pressure sensors, temperature sensors, micromirrors, micromechanical valves, micromechanical pumps and/or inertial sensors.
[0068] As a further development, in all of the specific embodiments described above, local support structures (e.g. made of silicon) may be additionally developed in the cavities 20, 20a, 20b, 20c, 20d, 20e, 20f, 22, 38 and 38a for increasing the stability of sealing layer 24 or 48 or of the diaphragm structures produced by the latter. The extents, positions and shapes of the local support structures may be selected with great freedom of design. Alternatively, in all of the specific embodiments described above, cavities 20, 20a, 20b, 20c, 20d, 20e, 20f, 22, 38 and 38a and sensing area 56 may be developed further by an at least partially circumferential trench 58 as a stress-optimized-decoupled sensing area 56.
[0069] It is pointed out once more that cavities 20, 20a, 20b, 20c, 20d, 20e, 20f, 22, 38 and 38a may be developed in any position of the respective specific embodiment and in a multitude of different shapes. It is also pointed out once more that, in addition to volume expansion, cavities 20, 20a, 20b, 20c, 20d, 20e, 20f, 22, 38 and 38a and their access channels 22, 22a, 22b and 22c may also be used for supplying a sacrificial layer etching medium.