Apparatus of preventing ESD and EMP using semiconductor having a wider band gap and method thereof

Abstract

An apparatus of preventing ESD and EMP coupled between a signal input and a signal output is provided with a first diode of forward bias including a positive terminal and a negative terminal connected to the signal input and ground respectively; and a first diode of reverse bias including a negative terminal and a positive terminal connected to the signal input and the ground respectively. The semiconductor is a diode including a p-type semiconductor region made of semiconductor material having a predetermined band gap and an n-type semiconductor region made of semiconductor material having a predetermined band gap. The predetermined band gap is greater than 3 eV. The diode operates in forward bias to discharge current generated by ESD and/or EMP. A method of preventing ESD and EMP is also provided.

Claims

1. A method of preventing electrostatic discharge (ESD) and electromagnetic pulse (EMP) comprising: using a semiconductor coupled between a signal input and a signal output, wherein the semiconductor is a diode consisting of a p-type semiconductor region made of semiconductor material having a predetermined band gap and an n-type semiconductor region made of semiconductor material having a predetermined band gap, wherein the predetermined band gap is greater than 3 eV, and wherein the diode is configured to operate in forward bias to discharge current generated by ESD and/or EMP.

2. The method of claim 1, wherein the semiconductor material is TiO.sub.2, SnO.sub.2, ZrO.sub.2, ZnO, ZnS, SiC, GaN, AlN, BN, or Ga.sub.2O.sub.3.

3. The method of claim 1, wherein the diode is incorporated into one of an ESD protection circuit, an EMP protection circuit, and the ESD protection circuit and the EMP protection circuit.

4. An apparatus for preventing ESD and EMP coupled between a signal input and a signal output, comprising: a first diode of forward bias including a positive terminal and a negative terminal connected to the signal input and ground respectively; and a first diode of reverse bias including a negative terminal and a positive terminal connected to the signal input and the ground respectively, wherein each of the first diode of forward bias and the first diode of reverse bias consists of a p-type semiconductor region made of semiconductor material having a predetermined band gap and an n-type semiconductor region made of semiconductor material having a predetermined band gap, wherein the predetermined band gap is greater than 3 eV, and wherein the diode is configured to operate in forward bias to discharge current generated by ESD and/or EMP.

5. The apparatus of claim 4, wherein the signal input is a pin in an IC and the signal output is a signal input of a first class circuit in the IC.

6. The apparatus of claim 4, wherein the semiconductor material is TiO.sub.2, SnO.sub.2, ZrO.sub.2, ZnO, ZnS, SiC, GaN, AlN, BN, or Ga.sub.2O.sub.3.

7. An apparatus for preventing ESD and EMP coupled between a signal input and a signal output, comprising: a first diode of forward bias including a positive terminal and a negative terminal connected to the signal input and ground respectively; a second diode of forward bias connected either in series with or in parallel to the first diode of forward bias; a third diode of forward bias connected either in series with or in parallel to the second diode of forward bias; and a first diode of reverse bias including a negative terminal and a positive terminal connected to the signal input and the ground respectively; a second diode of reverse bias connected either in series with or in parallel to the first diode of reverse bias; a third diode of reverse bias connected either in series with or in parallel to the second diode of reverse bias; and wherein each of the first, second and third diodes of forward bias and the first, second and third diodes of reverse bias consists of a p-type semiconductor region made of semiconductor material having a predetermined band gap and an n-type semiconductor region made of semiconductor material having a predetermined band gap; wherein the predetermined band gap is greater than 3 eV; and wherein each of the first, second and third diodes is configured to operate in forward bias to discharge current generated by ESD and/or EMP.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

(1) FIG. 1 is a circuit diagram of a conventional low pass filter circuit;

(2) FIG. 2 is a circuit diagram of a conventional voltage protection device;

(3) FIG. 3 plots time versus conducted current for a TVS diode;

(4) FIG. 4 shows a schematic circuit diagram of a chip of a conventional discharge circuit;

(5) FIG. 5 is a circuit diagram of an apparatus of preventing ESD and EMP according to a first preferred embodiment of the invention;

(6) FIG. 6 schematically shows a diode of forward bias (or reverse bias);

(7) FIG. 7A is a first circuit diagram of an apparatus of preventing ESD and EMP according to a second preferred embodiment of the invention;

(8) FIG. 7B is a second circuit diagram of the apparatus in FIG. 7A;

(9) FIG. 8 is a circuit diagram of an apparatus of preventing ESD and EMP according to a third preferred embodiment of the invention;

(10) FIG. 9 is a circuit diagram of an apparatus of preventing ESD and EMP according to a fourth preferred embodiment of the invention; and

(11) FIG. 10 is a circuit diagram of an apparatus of preventing ESD and EMP according to a fifth preferred embodiment of the invention.

DETAILED DESCRIPTION OF THE INVENTION

(12) Referring to FIG. 5, a circuit diagram of an apparatus 1 of preventing ESD and EMP in accordance with a first preferred embodiment of the invention is shown. The apparatus 1 is coupled between a signal input 2 and a signal output 3. It is noted that for an IC (i.e., chip) the signal input 2 is a pin and the signal output 3 is a signal input of a first class circuit in the chip.

(13) The apparatus 1 of preventing ESD and EMP includes a first diode DP1 of forward bias and a first diode DN1 of reverse bias. Positive terminal and negative terminal of the first diode DP1 of forward bias are connected to the signal input 2 and ground respectively. Negative terminal and positive terminal of the first diode DN1 of reverse bias are connected to the signal input 2 and the ground respectively.

(14) Referring to FIG. 6, it schematically shows a diode of forward bias (or reverse bias). As shown in FIGS. 5 and 6, each of the first diode DP1 of forward bias and the first diode DN1 of reverse bias includes a p-type semiconductor region PR made of semiconductor material having a wider band gap and an n-type semiconductor region NR made of semiconductor material having a wider band gap. The semiconductor material has the band gap greater than 3 eV. Types of the semiconductor materials and examples thereof and band gaps of the examples are shown in Table 1 below.

(15) TABLE-US-00001 TABLE 1 types examples and band gaps thereof Oxide based semiconductor TiO.sub.2 (3.2 eV), SnO.sub.2 (3.8 eV), ZrO.sub.2 materials (3.6-4.7 eV), ZnO(3.37 eV) Sulfide based semiconductor ZnS (3.54 eV) materials Nitride based semiconductor GaN (3.28 eV), AlN (6.2 eV), h-BN materials (5.9 eV) Gallium compound based GaP (2.24 eV), GaAs (1.42 eV) semiconductor materials Silicon compound based 4H-SiC(3.23 eV), 6H(α)-SiC(3.05 eV) semiconductor materials

(16) As shown in FIGS. 5 and 6, regarding the protection of both ESD and EMP, each of the first diode DP1 of forward bias and the first diode DN1 of reverse bias operates in forward bias to discharge ESD current conducted by ESD and/or EMP current conducted by EMP. It is known that a conduction voltage of a diode having a wider band gap is greater than 3V. Thus, the first diode DP1 of forward bias and the first diode DN1 of reverse bias are connected in parallel. Either surge current from the signal input 2 in a forward direction or surge current from the signal input 2 in a reverse direction will be directed to ground for discharge via the first diode DP1 of forward bias or the first diode DN1 of reverse bias.

(17) Unlike the conventional TVS diode (e.g., Zener diode) utilizing Zener breakdown as ESD or EMP protection, the diode having a wider band gap of the invention uses forward bias as a special ESD and/or EMP protection. The diode having a wider band gap is not liable to avalanche breakdown and thus avalanche breakdown does not occur when the diode operates in forward bias. Thus, the apparatus 1 of preventing ESD and EMP including the first diode DP1 of forward bias and the first diode DN1 of reverse bias connected in parallel but opposite directions can withstand a very large ESD current and/or EMP current. It is envisaged by the invention that the apparatus 1 of preventing ESD and EMP can replace the conventional TVS device formed of silicon based semiconductor as ESD and/or EMP preventing device.

(18) Referring to FIGS. 7A and 7B, first and second circuit diagrams of an apparatus 1 of preventing ESD and EMP according to a second preferred embodiment of the invention is shown. The characteristics of the second preferred embodiment are substantially the same as that of the first preferred embodiment except the following: there are further provided a second diode DP2 of forward bias, a third diode DP3 of forward bias, a second diode DN2 of reverse bias, and a third diode DN3 of reverse bias in which the first diode DP1 of forward bias, the second diode DP2 of forward bias, and the third diode DP3 of forward bias are connected in series (FIG. 7A) or in parallel (FIG. 7B); and the first diode DN1 of reverse bias, the second diode DN2 of reverse bias, and the third diode DN3 of reverse bias are connected in series (FIG. 7A) or in parallel (FIG. 7B). The series or parallel connection is implemented depending on voltage or current.

(19) A diode having a desired band gap diode can be manufactured by a semiconductor material selected from Table 1. Since the selected semiconductor material has a desired (i.e., wider) band gap, it is possible of setting the diode to conduct at a predetermined voltage (e.g., 3v). Further, for a circuit having the signal input 2 and the signal output 3 or a chip operating at a voltage greater than 3v, the circuit in FIG. 7A or FIG. 7B can be used in which a protection circuit includes three diodes DP1, DP2 and DP3 of forward bias connected in series and three diodes DN1, DN2 and DN3 of reverse bias connected in series but opposite directions. In comparison with the circuit in FIG. 5, the circuits in FIGS. 7A and 7B are advantageous because the parasite capacitance of the apparatus 1 of preventing ESD and EMP decreases as the number of the diodes connected in series increases, and the operating frequency also increases. Therefore, the apparatus 1 of preventing ESD and EMP has applications in high frequency circuits.

(20) Referring to FIG. 8, a circuit diagram of an apparatus 1 of preventing ESD and EMP according to a third preferred embodiment of the invention is shown. The characteristics of the third preferred embodiment are substantially the same as that of the first preferred embodiment except the following: both the diode DP1 of forward bias and the diode DN1 of reverse bias are replaced by light-emitting diodes (LEDs).

(21) The LEDs are formed of direct band gap semiconductor material. When external current spikes of forward bias or current spikes of reverse bias enters the circuit, either the diode (i.e., LED) DP1 of forward bias conducts or the diode (i.e., LED) DN1 of reverse bias conducts. As a result, the circuit operates. The current spikes are discharged to ground and either the diode DP1 of forward bias conducts or the diode DN1 of reverse bias converts electrical energy of ESD or EMP into light. The embodiment aims to quickly consume excessive energy by emitting light so that energy of the input current spikes can be quickly decreased.

(22) Referring to FIG. 9, a circuit diagram of an apparatus 1 of preventing ESD and EMP according to a fourth preferred embodiment of the invention is shown. The characteristics of the fourth preferred embodiment are substantially the same as that of the first preferred embodiment except the following: a counter 4 is provided. The apparatus 1 of preventing ESD and EMP is incorporated into a light coupler or implemented as a device similar to the light coupler. The counter 4 is connected to the apparatus 1 of preventing ESD and EMP (i.e., the light coupler) so that the counter 4 can count the number of ESD and/or EMP occurrences by receiving a signal from the light coupler.

(23) Referring to FIG. 10, a circuit diagram of an apparatus 1 of preventing ESD and EMP according to a fifth preferred embodiment of the invention is shown. The characteristics of the fifth preferred embodiment are substantially the same as that of the third preferred embodiment except the following: there is further provided a light receiver 5 interconnecting a counter 4 and the apparatus 1 of preventing ESD and EMP. In detail, the light receiver 5 receives light emitted by the apparatus 1 of preventing ESD and EMP. Thus, the counter 4 can count the number of ESD and/or EMP occurrences by receiving a signal from the light receiver 5.

(24) While the invention has been described in terms of preferred embodiments, those skilled in the art will recognize that the invention can be practiced with modifications within the spirit and scope of the appended claims.